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[PR #198] [MERGED] [Feat][Ascend] Consolidate INT8, RotateQuant, RoPE and ConvRot W4A4 backends #215
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📋 Pull Request Information
Original PR: https://github.com/Comfy-Org/comfy-kitchen/pull/198
Author: @Big2Wheel
Created: 9/25/2026
Status: ✅ Merged
Merged: 9/25/2026
Merged by: @comfyanonymous
Base:
main← Head:codex/ascend-consolidated📝 Commits (6)
3bde6fdfeat(ascend): add INT8 linear backendb8b5692feat(ascend): add guarded fused RotateQuant supporta2224f3feat(ascend): add RoPE and RMS-RoPE with independent capabilitiese42e10bfeat(ascend): add numerically faithful ConvRot W4A4 linearcb04fecfix(ascend): match current linear API and test capability isolation8cb9fdadocs(ascend): explain consolidated capability requirements📊 Changes
6 files changed (+1957 additions, -47 deletions)
View changed files
📝
README.md(+48 -12)📝
comfy_kitchen/backends/ascend/__init__.py(+643 -26)➕
comfy_kitchen/backends/ascend/rope.py(+365 -0)📝
tests/test_ascend_backend.py(+601 -1)➕
tests/test_ascend_rope.py(+292 -0)📝
tests/test_backends.py(+8 -8)📄 Description
Summary and relationship to the previous PRs
Following the suggestion to consolidate the remaining Ascend work after #151 was merged, this PR starts directly from main (
d86e8d7) and replaces the conflicting feature stack:npu_quant_matmulThe base backend from #151 is already in main and is not reintroduced. Feature implementations remain separate signed-off commits, followed by current-main compatibility fixes and documentation. W4A4 does not call the public INT8 linear API or require RotateQuant; RoPE is independent of the quantization features.
Integration changes
rotary_modeanddiv_mode.input_act_weight,input_act_eps,residualandresidual_scalearguments. Input RMSNorm and residual modulation use the shared device-side helpers, not a new fused GEMM implementation.W4A4 correctness and performance scope
This includes the corrected #161 implementation, not the earlier numerically different packed-kernel path:
npu_quant_matmulinto INT32, using a unit scale and no per-token scale.There is no compulsory FP32-to-BF16 input conversion or FP16 intermediate for FP32/BF16 outputs. FP16 retains the reference's own range limitations. This is not zero-copy packed-INT4 GEMM: unpacking adds memory/runtime cost.
The earlier 134 s / 2.73x result from the superseded W4A4 implementation is not a performance claim for this PR. The integration workflow runs below are smoke tests, not repeated hot A/B measurements, and establish no new speedup or multi-seed quality guarantee.
User-facing changes
Eligible NPU calls can use the above Ascend implementations automatically through the existing registry. No mandatory MindIE-SD dependency, environment variable or public API change is introduced by this PR. Non-NPU import remains optional; unsupported contracts continue through the registry's existing fallback behavior.
Validation
One Ascend 910B3, physical card 4; PyTorch 2.10.0+cpu, torch_npu 2.10.0.post4, CANN 9.1.0.
TORCH_DEVICE_BACKEND_AUTOLOAD=0andsys.modules["torch_npu"] = None: 361 passed, 598 skipped, one warning. This explicitly simulates torch-npu being unavailable without uninstalling it from the shared validation container.rtol=0, atol=0in every case.ruff check,ruff format --checkon all changed Python files andgit diff --check: passed.The ComfyUI validation checkout retains the existing local custom-node shim routing mixed INT8 layers through Comfy Kitchen. That shim is not included in this PR. Workflow smoke results must not be interpreted as unmodified-ComfyUI support for every third-party custom node.
Completed workflows, exact weights and output specifications
The following are the exact checkpoint filenames selected in the saved successful API requests on 2026-09-25. All runs used one Ascend 910B3 (physical card 4), batch size 1,
--cache-none --disable-pinned-memory, andOMP_NUM_THREADS=4.z_image_turbo_int8_convrot.safetensorsz_image_turbo_bf16.safetensorswan2.2_t2v_high_noise_14B_fp16.safetensors+wan2.2_t2v_low_noise_14B_fp16.safetensorskrea2_turbo_int4_mixed.safetensorsSupporting weights used by these workflows:
qwen_3_4b.safetensorsae.safetensorsumt5_xxl_fp16.safetensorswan_2.1_vae.safetensorswan2.2_t2v_lightx2v_4steps_lora_v1.1_high_noise.safetensorsandwan2.2_t2v_lightx2v_4steps_lora_v1.1_low_noise.safetensors, each at strength 1.0 on its corresponding modelqwen3vl_4b_bf16.safetensorsqwen_image_vae.safetensorsSeeds: both Z-Image runs used
493240645134828; Wan used832596732254118for initial noise (the low-noise stage did not add noise); Krea used20260907. Krea used the existingComfyUI-INT4-Fastcustom node (OTUNetLoaderW4A4) and the local mixed-INT8 integration shim described above.Timing definition and limitations:
🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.