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* v4.6 dev update. * Remove CUTLASS_HOST_DEVICE from CudaHostAdapater::memsetDevice (#3286) * [SM120] Add ptr-array TMA collective for tensor/token-scaled FP8 grouped GEMM (#3280) * gemm: add SM120 array TMA collective for tensor/token-scaled FP8 grouped GEMM Adds CollectiveMma and CollectiveBuilder specializations for MainloopSm120ArrayTmaWarpSpecialized, enabling ptr-array grouped GEMM (MoE expert dispatch) with tensor- and token-level FP8 scaling on SM_120/SM_121 consumer Blackwell (RTX 5090/5080/5070, DGX Spark GB10). New files: - include/cutlass/gemm/collective/sm120_mma_array_tma.hpp CollectiveMma specialization for MainloopSm120ArrayTmaWarpSpecialized. Handles both Cooperative (4x2 atom layout) and Pingpong (2x2) schedules. Grouped GEMM via pointer-array indirection through params.ptr_A / ptr_B. Supports F8F6F4 MMA with TMA loads for both A and B operands. - include/cutlass/gemm/collective/builders/sm120_array_mma_builder.inl CollectiveBuilder specialization for KernelPtrArrayTmaWarpSpecialized Cooperative/PingpongSm120<N> schedule tags. Computes tile/stage counts from smem capacity, routes to MainloopSm120ArrayTmaWarpSpecialized dispatch policy, produces correctly-typed CollectiveOp. Modified files: - collective_mma.hpp: include sm120_mma_array_tma.hpp - collective_builder.hpp: include sm120_array_mma_builder.inl - sm120_mma_builder.inl: remove ptr-array schedules from enable_if (they now route to sm120_array_mma_builder.inl) and drop the IsPtrArrayKernel static_assert that enforced the restriction Validated on real SM_121 hardware (DGX Spark, 128 GB LPDDR5X) running vLLM with RedHatAI/gemma-4-26B-A4B-it-FP8-Dynamic (Gemma 4 MoE, 26B total / 4B active). Previously fell back to a non-CUTLASS Triton path; with this patch, the SM120 CUTLASS grouped GEMM collective activates and produces correct outputs. Short-sequence throughput improved ~7% vs the fallback baseline (76.3 → 81.9 tok/s). Closes #3263 Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Tyler Merritt <tgmerritt@gmail.com> * test: add SM120 ptr-array grouped GEMM unit tests Adds 6 device-level tests for the CollectiveMma/CollectiveBuilder specializations introduced for MainloopSm120ArrayTmaWarpSpecialized, covering both KernelPtrArrayTmaWarpSpecializedPingpongSm120<2> and KernelPtrArrayTmaWarpSpecializedCooperativeSm120<2> schedule tags across e4m3×e4m3 (symmetric), e4m3×e5m2 (mixed), float and bfloat16 outputs, and two tile shapes. Tests land in test/unit/gemm/device/sm120_tensorop_gemm/ under the new cutlass_test_unit_sm120_grouped_gemm_device_tensorop CMake target, per reviewer request in PR #3280. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> --------- Signed-off-by: Tyler Merritt <tgmerritt@gmail.com> Co-authored-by: Claude <noreply@anthropic.com> --------- Signed-off-by: Tyler Merritt <tgmerritt@gmail.com> Co-authored-by: Alex Georgiev <89279829+alexngUNC@users.noreply.github.com> Co-authored-by: Tyler <tgmerritt@gmail.com> Co-authored-by: Claude <noreply@anthropic.com>
201 lines
8.3 KiB
C++
201 lines
8.3 KiB
C++
/***************************************************************************************************
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* Copyright (c) 2023 - 2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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**************************************************************************************************/
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#pragma once
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#include <cute/config.hpp> // CUTE_HOST_DEVICE
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#include <cute/layout_composed.hpp> // cute::ComposedLayout
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#include <cute/pointer.hpp> // cute::make_smem_ptr
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#include <cute/pointer_sparse.hpp> // cute::is_sparse
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#include <cute/pointer_swizzle.hpp> // cute::make_swizzle_ptr
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#include <cute/arch/util.hpp> // cute::cast_smem_ptr_to_uint
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#include <cute/numeric/integral_constant.hpp> // cute::Int
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namespace cute
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{
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//
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// Stand-in Swizzle Layout
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// A model of a nullptr smem_ptr<T> with B == sizeof_bits<T>::value
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// That represents an unset pointer. This is a placeholder type that is waiting for an smem_ptr
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//
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template <int Bits>
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struct smem_ptr_flag_bits : Int<0> {};
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using smem_ptr_flag = smem_ptr_flag_bits<1>;
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// A flagged construction method to transform ComposedLayout
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// Make a swizzle pointer tensor and check that the intended type size matches
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template <class Iterator, class SwizzleFn, int B, class Layout>
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CUTE_HOST_DEVICE constexpr
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auto
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make_tensor(Iterator const& ptr,
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ComposedLayout<SwizzleFn,smem_ptr_flag_bits<B>,Layout> const& layout)
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{
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static_assert(is_smem<Iterator>::value, "Expected smem.");
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static_assert(B == sizeof_bits<iter_value_t<Iterator>>::value, "Expected a B-bit pointer type.");
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return make_tensor(make_smem_ptr(ptr.get(), layout.layout_a()),
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layout.layout_b());
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}
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// NOTE: To preserve smem_ptr_flag_bits under recast ops
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template <int N, class SwizzleFn, int B, class Layout>
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CUTE_HOST_DEVICE constexpr
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auto
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upcast(ComposedLayout<SwizzleFn,smem_ptr_flag_bits<B>,Layout> const& layout)
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{
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return composition(layout.layout_a(), smem_ptr_flag_bits<B*N>{}, upcast<N>(layout.layout_b()));
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}
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template <int N, class SwizzleFn, int B, class Layout>
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CUTE_HOST_DEVICE constexpr
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auto
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downcast(ComposedLayout<SwizzleFn,smem_ptr_flag_bits<B>,Layout> const& layout)
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{
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return composition(layout.layout_a(), smem_ptr_flag_bits<B/N>{}, downcast<N>(layout.layout_b()));
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}
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template <class Coord, int B, int M, int S, int Bits, class Layout>
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CUTE_HOST_DEVICE constexpr
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auto
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slice_and_offset(Coord const& coord, ComposedLayout<Swizzle<B,M,S>,smem_ptr_flag_bits<Bits>,Layout> const& layout)
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{
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auto sao = slice_and_offset(coord, layout.layout_b());
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if constexpr (is_constant<0, decltype(get<1>(sao))>::value) {
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// Inner slice produced a static zero offset: rebuild a canonical (Swizzle o flag o sliced) layout.
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return make_tuple(composition(Swizzle<B,M,S>{}, smem_ptr_flag_bits<Bits>{}, get<0>(sao)), Int<0>{});
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} else {
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// Inner slice produced a non-static offset (e.g. callers slicing with a runtime literal 0
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// instead of Int<0>{}). Fall back to the generic ComposedLayout slice_and_offset path that
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// absorbs the offset into the composed layout's middle slot, so we don't force every
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// upstream call site to use Int<0>{} purely to satisfy a static_assert here.
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return cute::make_tuple(ComposedLayout{layout.layout_a(), layout.offset() + get<1>(sao), get<0>(sao)}, Int<0>{});
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}
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}
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//
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// Conversion with swizzle_layout
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//
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template <class SwizzleFn, int B, class Layout>
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CUTE_HOST_DEVICE
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auto
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as_position_independent_swizzle_layout(ComposedLayout<SwizzleFn,smem_ptr_flag_bits<B>,Layout> const& layout)
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{
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return composition(recast_layout<uint8_t,uint_bit_t<B>>(layout.layout_a()), Int<0>{}, layout.layout_b());
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}
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template <class Tensor>
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CUTE_HOST_DEVICE
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auto
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as_position_independent_swizzle_tensor(Tensor&& tensor)
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{
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static_assert(is_smem<remove_cvref_t<Tensor>>::value, "Expected smem tensor.");
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using SwizzleFn = get_swizzle_t<remove_cvref_t<Tensor>>;
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if constexpr (SwizzleFn::num_bits == 0) {
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return tensor;
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} else {
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#if !defined(NDEBUG)
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{
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uint32_t address = cast_smem_ptr_to_uint(raw_pointer_cast(static_cast<Tensor&&>(tensor).data()));
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uint32_t mask = ((uint32_t(1) << SwizzleFn::num_base) - 1) | SwizzleFn::swizzle_code;
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assert((address & mask) == 0); // Alignment to the Base, Z, and Y of Swizzle
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}
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#endif
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using T = typename remove_cvref_t<Tensor>::value_type;
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// Recast swizzle from acting on byte-addressed pointers to elements of type-T
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auto new_swizzle = recast_layout<uint8_t, T>(SwizzleFn{});
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// Strip off everything and create a new smem_ptr for type-T
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auto new_ptr = make_smem_ptr<T>(raw_pointer_cast(static_cast<Tensor&&>(tensor).data()));
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return make_tensor(new_ptr, composition(new_swizzle, Int<0>{}, tensor.layout()));
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}
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CUTE_GCC_UNREACHABLE;
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}
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// A model of a nullptr sparse_ptr<S, smem_ptr<T>> with B == sizeof_bits<T>::value
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// That represents an unset pointer. This is a placeholder type that is waiting for an smem_ptr
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template <int Sparsity, int Bits>
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struct smem_sparse_ptr_flag_bits : Int<0> {};
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template <int Sparsity>
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using smem_sparse_ptr_flag = smem_sparse_ptr_flag_bits<Sparsity, 1>;
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// A flagged construction method to transform ComposedLayout
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// Make a swizzle pointer tensor and check that the intended type size matches
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template <class Iterator, class SwizzleFn, int S, int B, class Layout>
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CUTE_HOST_DEVICE constexpr
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auto
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make_tensor(Iterator const& ptr,
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ComposedLayout<SwizzleFn,smem_sparse_ptr_flag_bits<S,B>,Layout> const& layout)
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{
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static_assert(is_smem<Iterator>::value, "Expected smem.");
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static_assert(is_sparse_ptr<Iterator>::value, "Expected sparse iter");
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static_assert(is_sparse<iter_value_t<Iterator>>::value, "Expected sparse elem");
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static_assert(S == iter_value_t<Iterator>::sparsity, "Expected sparsity S");
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static_assert(B == sizeof_bits<typename iter_value_t<Iterator>::raw_type>::value, "Expected B-bit pointer type");
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return make_tensor(make_swizzle_ptr(ptr, layout.layout_a()), layout.layout_b());
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}
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// NOTE: To preserve smem_ptr_flag_bits under recast ops
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template <int N, class SwizzleFn, int S, int B, class Layout>
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CUTE_HOST_DEVICE constexpr
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auto
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upcast(ComposedLayout<SwizzleFn,smem_sparse_ptr_flag_bits<S,B>,Layout> const& layout)
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{
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static_assert(dependent_false<SwizzleFn>, "Not implemented for safety");
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}
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template <int N, class SwizzleFn, int S, int B, class Layout>
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CUTE_HOST_DEVICE constexpr
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auto
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downcast(ComposedLayout<SwizzleFn,smem_sparse_ptr_flag_bits<S,B>,Layout> const& layout)
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{
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static_assert(dependent_false<SwizzleFn>, "Not implemented for safety");
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}
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//
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// Display utilities
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//
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template <int B>
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CUTE_HOST_DEVICE void print(smem_ptr_flag_bits<B> ptr)
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{
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printf("smem_ptr[%db](unset)", B);
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}
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template <int S, int B>
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CUTE_HOST_DEVICE void print(smem_sparse_ptr_flag_bits<S,B>)
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{
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printf("smem_sparse<%d>_ptr[%db](unset)", S, B);
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}
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} // end namespace cute
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