/*
 * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the Software),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

#ifndef __lr10_dev_npgperf_ip_h__
#define __lr10_dev_npgperf_ip_h__
/* This file is autogenerated.  Do not edit */
#define NV_NPGPERF_CTRL_CLOCK_GATING                       0x000000c8      /* RW-4R */
#define NV_NPGPERF_CTRL_CLOCK_GATING_CG1_SLCG              3:0             /* RWEVF */
#define NV_NPGPERF_CTRL_CLOCK_GATING_CG1_SLCG_INIT         0x0000000f      /* RWE-V */
#define NV_NPGPERF_CTRL_CLOCK_GATING_CG1_SLCG__PROD        0x00000000      /* RW--V */

#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING                  0x000000cc      /* RW-4R */
#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING_CG1_SLCG         3:0             /* RWEVF */
#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING_CG1_SLCG_INIT    0x0000000f      /* RWE-V */
#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING_CG1_SLCG__PROD   0x00000000      /* RW--V */
#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING_CONTEXT_FREEZE   7:4             /* RWEVF */
#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING_CONTEXT_FREEZE_DISABLED 0x00000000 /* RWE-V */
#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING_CONTEXT_FREEZE_ENABLED 0x00000001 /* RW--V */
#define NV_NPGPERF_PERF_CTRL_CLOCK_GATING_CONTEXT_FREEZE__PROD 0x00000000  /* RW--V */

#define NV_NPGPERF_CTRL_PRI_MULTICAST                      0x000000c0      /* RW-4R */
#define NV_NPGPERF_CTRL_PRI_MULTICAST_NPORT_ENABLE         5:0             /* RWEVF */
#define NV_NPGPERF_CTRL_PRI_MULTICAST_NPORT_ENABLE_INIT    0x0000000f      /* RWE-V */
#define NV_NPGPERF_CTRL_PRI_MULTICAST_READ_MODE            7:6             /* RWEVF */
#define NV_NPGPERF_CTRL_PRI_MULTICAST_READ_MODE_LOW_SELECTED_BUS 0x00000000 /* RW--V */
#define NV_NPGPERF_CTRL_PRI_MULTICAST_READ_MODE_OR_ALL_BUSSES 0x00000001   /* RW--V */
#define NV_NPGPERF_CTRL_PRI_MULTICAST_READ_MODE_AND_ALL_BUSSES 0x00000002  /* RWE-V */
#define NV_NPGPERF_CTRL_PRI_MULTICAST_READ_MODE_ZEROS      0x00000003      /* RW--V */
#endif // __lr10_dev_npgperf_ip_h__
