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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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515.43.04
This commit is contained in:
Andy Ritger
276
src/nvidia/generated/g_kernel_mc_nvoc.h
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276
src/nvidia/generated/g_kernel_mc_nvoc.h
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#ifndef _G_KERNEL_MC_NVOC_H_
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#define _G_KERNEL_MC_NVOC_H_
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#include "nvoc/runtime.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "g_kernel_mc_nvoc.h"
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#ifndef KERNEL_MC_H
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#define KERNEL_MC_H
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/******************************************************************************
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*
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* Kernel Master Control module header
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* This file contains functions required for MC in Kernel RM
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*
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******************************************************************************/
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#include "gpu/eng_state.h"
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#include "gpu/gpu_halspec.h"
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#ifdef NVOC_KERNEL_MC_H_PRIVATE_ACCESS_ALLOWED
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#define PRIVATE_FIELD(x) x
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#else
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#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
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#endif
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struct KernelMc {
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const struct NVOC_RTTI *__nvoc_rtti;
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struct OBJENGSTATE __nvoc_base_OBJENGSTATE;
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struct Object *__nvoc_pbase_Object;
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struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE;
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struct KernelMc *__nvoc_pbase_KernelMc;
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NV_STATUS (*__kmcStateInitLocked__)(struct OBJGPU *, struct KernelMc *);
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NV_STATUS (*__kmcWritePmcEnableReg__)(struct OBJGPU *, struct KernelMc *, NvU32, NvBool, NvBool);
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NvU32 (*__kmcReadPmcEnableReg__)(struct OBJGPU *, struct KernelMc *, NvBool);
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NV_STATUS (*__kmcReconcileTunableState__)(POBJGPU, struct KernelMc *, void *);
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NV_STATUS (*__kmcStateLoad__)(POBJGPU, struct KernelMc *, NvU32);
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NV_STATUS (*__kmcStateUnload__)(POBJGPU, struct KernelMc *, NvU32);
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NV_STATUS (*__kmcStatePreLoad__)(POBJGPU, struct KernelMc *, NvU32);
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NV_STATUS (*__kmcStatePostUnload__)(POBJGPU, struct KernelMc *, NvU32);
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void (*__kmcStateDestroy__)(POBJGPU, struct KernelMc *);
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NV_STATUS (*__kmcStatePreUnload__)(POBJGPU, struct KernelMc *, NvU32);
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NV_STATUS (*__kmcStateInitUnlocked__)(POBJGPU, struct KernelMc *);
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void (*__kmcInitMissing__)(POBJGPU, struct KernelMc *);
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NV_STATUS (*__kmcStatePreInitLocked__)(POBJGPU, struct KernelMc *);
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NV_STATUS (*__kmcStatePreInitUnlocked__)(POBJGPU, struct KernelMc *);
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NV_STATUS (*__kmcGetTunableState__)(POBJGPU, struct KernelMc *, void *);
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NV_STATUS (*__kmcCompareTunableState__)(POBJGPU, struct KernelMc *, void *, void *);
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void (*__kmcFreeTunableState__)(POBJGPU, struct KernelMc *, void *);
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NV_STATUS (*__kmcStatePostLoad__)(POBJGPU, struct KernelMc *, NvU32);
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NV_STATUS (*__kmcAllocTunableState__)(POBJGPU, struct KernelMc *, void **);
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NV_STATUS (*__kmcSetTunableState__)(POBJGPU, struct KernelMc *, void *);
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NV_STATUS (*__kmcConstructEngine__)(POBJGPU, struct KernelMc *, ENGDESCRIPTOR);
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NvBool (*__kmcIsPresent__)(POBJGPU, struct KernelMc *);
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};
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#ifndef __NVOC_CLASS_KernelMc_TYPEDEF__
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#define __NVOC_CLASS_KernelMc_TYPEDEF__
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typedef struct KernelMc KernelMc;
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#endif /* __NVOC_CLASS_KernelMc_TYPEDEF__ */
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#ifndef __nvoc_class_id_KernelMc
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#define __nvoc_class_id_KernelMc 0x3827ff
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#endif /* __nvoc_class_id_KernelMc */
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extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelMc;
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#define __staticCast_KernelMc(pThis) \
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((pThis)->__nvoc_pbase_KernelMc)
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#ifdef __nvoc_kernel_mc_h_disabled
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#define __dynamicCast_KernelMc(pThis) ((KernelMc*)NULL)
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#else //__nvoc_kernel_mc_h_disabled
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#define __dynamicCast_KernelMc(pThis) \
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((KernelMc*)__nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(KernelMc)))
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#endif //__nvoc_kernel_mc_h_disabled
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#define PDB_PROP_KMC_IS_MISSING_BASE_CAST __nvoc_base_OBJENGSTATE.
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#define PDB_PROP_KMC_IS_MISSING_BASE_NAME PDB_PROP_ENGSTATE_IS_MISSING
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NV_STATUS __nvoc_objCreateDynamic_KernelMc(KernelMc**, Dynamic*, NvU32, va_list);
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NV_STATUS __nvoc_objCreate_KernelMc(KernelMc**, Dynamic*, NvU32);
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#define __objCreate_KernelMc(ppNewObj, pParent, createFlags) \
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__nvoc_objCreate_KernelMc((ppNewObj), staticCast((pParent), Dynamic), (createFlags))
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#define kmcStateInitLocked(pGpu, pKernelMc) kmcStateInitLocked_DISPATCH(pGpu, pKernelMc)
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#define kmcWritePmcEnableReg(pGpu, pKernelMc, arg0, arg1, arg2) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0, arg1, arg2)
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#define kmcWritePmcEnableReg_HAL(pGpu, pKernelMc, arg0, arg1, arg2) kmcWritePmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0, arg1, arg2)
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#define kmcReadPmcEnableReg(pGpu, pKernelMc, arg0) kmcReadPmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0)
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#define kmcReadPmcEnableReg_HAL(pGpu, pKernelMc, arg0) kmcReadPmcEnableReg_DISPATCH(pGpu, pKernelMc, arg0)
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#define kmcReconcileTunableState(pGpu, pEngstate, pTunableState) kmcReconcileTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kmcStateLoad(pGpu, pEngstate, arg0) kmcStateLoad_DISPATCH(pGpu, pEngstate, arg0)
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#define kmcStateUnload(pGpu, pEngstate, arg0) kmcStateUnload_DISPATCH(pGpu, pEngstate, arg0)
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#define kmcStatePreLoad(pGpu, pEngstate, arg0) kmcStatePreLoad_DISPATCH(pGpu, pEngstate, arg0)
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#define kmcStatePostUnload(pGpu, pEngstate, arg0) kmcStatePostUnload_DISPATCH(pGpu, pEngstate, arg0)
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#define kmcStateDestroy(pGpu, pEngstate) kmcStateDestroy_DISPATCH(pGpu, pEngstate)
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#define kmcStatePreUnload(pGpu, pEngstate, arg0) kmcStatePreUnload_DISPATCH(pGpu, pEngstate, arg0)
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#define kmcStateInitUnlocked(pGpu, pEngstate) kmcStateInitUnlocked_DISPATCH(pGpu, pEngstate)
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#define kmcInitMissing(pGpu, pEngstate) kmcInitMissing_DISPATCH(pGpu, pEngstate)
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#define kmcStatePreInitLocked(pGpu, pEngstate) kmcStatePreInitLocked_DISPATCH(pGpu, pEngstate)
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#define kmcStatePreInitUnlocked(pGpu, pEngstate) kmcStatePreInitUnlocked_DISPATCH(pGpu, pEngstate)
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#define kmcGetTunableState(pGpu, pEngstate, pTunableState) kmcGetTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kmcCompareTunableState(pGpu, pEngstate, pTunables1, pTunables2) kmcCompareTunableState_DISPATCH(pGpu, pEngstate, pTunables1, pTunables2)
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#define kmcFreeTunableState(pGpu, pEngstate, pTunableState) kmcFreeTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kmcStatePostLoad(pGpu, pEngstate, arg0) kmcStatePostLoad_DISPATCH(pGpu, pEngstate, arg0)
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#define kmcAllocTunableState(pGpu, pEngstate, ppTunableState) kmcAllocTunableState_DISPATCH(pGpu, pEngstate, ppTunableState)
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#define kmcSetTunableState(pGpu, pEngstate, pTunableState) kmcSetTunableState_DISPATCH(pGpu, pEngstate, pTunableState)
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#define kmcConstructEngine(pGpu, pEngstate, arg0) kmcConstructEngine_DISPATCH(pGpu, pEngstate, arg0)
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#define kmcIsPresent(pGpu, pEngstate) kmcIsPresent_DISPATCH(pGpu, pEngstate)
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NV_STATUS kmcPrepareForXVEReset_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc);
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#ifdef __nvoc_kernel_mc_h_disabled
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static inline NV_STATUS kmcPrepareForXVEReset(struct OBJGPU *pGpu, struct KernelMc *pKernelMc) {
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NV_ASSERT_FAILED_PRECOMP("KernelMc was disabled!");
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return NV_ERR_NOT_SUPPORTED;
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}
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#else //__nvoc_kernel_mc_h_disabled
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#define kmcPrepareForXVEReset(pGpu, pKernelMc) kmcPrepareForXVEReset_GK104(pGpu, pKernelMc)
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#endif //__nvoc_kernel_mc_h_disabled
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#define kmcPrepareForXVEReset_HAL(pGpu, pKernelMc) kmcPrepareForXVEReset(pGpu, pKernelMc)
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NV_STATUS kmcGetMcBar0MapInfo_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU64 *arg0, NvU32 *arg1);
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#ifdef __nvoc_kernel_mc_h_disabled
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static inline NV_STATUS kmcGetMcBar0MapInfo(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU64 *arg0, NvU32 *arg1) {
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NV_ASSERT_FAILED_PRECOMP("KernelMc was disabled!");
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return NV_ERR_NOT_SUPPORTED;
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}
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#else //__nvoc_kernel_mc_h_disabled
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#define kmcGetMcBar0MapInfo(pGpu, pKernelMc, arg0, arg1) kmcGetMcBar0MapInfo_GK104(pGpu, pKernelMc, arg0, arg1)
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#endif //__nvoc_kernel_mc_h_disabled
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#define kmcGetMcBar0MapInfo_HAL(pGpu, pKernelMc, arg0, arg1) kmcGetMcBar0MapInfo(pGpu, pKernelMc, arg0, arg1)
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NV_STATUS kmcStateInitLocked_IMPL(struct OBJGPU *pGpu, struct KernelMc *pKernelMc);
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static inline NV_STATUS kmcStateInitLocked_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc) {
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return pKernelMc->__kmcStateInitLocked__(pGpu, pKernelMc);
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}
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NV_STATUS kmcWritePmcEnableReg_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2);
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NV_STATUS kmcWritePmcEnableReg_GA100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2);
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static inline NV_STATUS kmcWritePmcEnableReg_46f6a7(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2) {
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return NV_ERR_NOT_SUPPORTED;
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}
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static inline NV_STATUS kmcWritePmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvU32 arg0, NvBool arg1, NvBool arg2) {
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return pKernelMc->__kmcWritePmcEnableReg__(pGpu, pKernelMc, arg0, arg1, arg2);
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}
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NvU32 kmcReadPmcEnableReg_GK104(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0);
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NvU32 kmcReadPmcEnableReg_GA100(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0);
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static inline NvU32 kmcReadPmcEnableReg_4a4dee(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0) {
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return 0;
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}
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static inline NvU32 kmcReadPmcEnableReg_DISPATCH(struct OBJGPU *pGpu, struct KernelMc *pKernelMc, NvBool arg0) {
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return pKernelMc->__kmcReadPmcEnableReg__(pGpu, pKernelMc, arg0);
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}
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static inline NV_STATUS kmcReconcileTunableState_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, void *pTunableState) {
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return pEngstate->__kmcReconcileTunableState__(pGpu, pEngstate, pTunableState);
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}
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static inline NV_STATUS kmcStateLoad_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) {
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return pEngstate->__kmcStateLoad__(pGpu, pEngstate, arg0);
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}
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static inline NV_STATUS kmcStateUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) {
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return pEngstate->__kmcStateUnload__(pGpu, pEngstate, arg0);
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}
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static inline NV_STATUS kmcStatePreLoad_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) {
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return pEngstate->__kmcStatePreLoad__(pGpu, pEngstate, arg0);
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}
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static inline NV_STATUS kmcStatePostUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) {
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return pEngstate->__kmcStatePostUnload__(pGpu, pEngstate, arg0);
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}
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static inline void kmcStateDestroy_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) {
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pEngstate->__kmcStateDestroy__(pGpu, pEngstate);
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}
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static inline NV_STATUS kmcStatePreUnload_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) {
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return pEngstate->__kmcStatePreUnload__(pGpu, pEngstate, arg0);
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}
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static inline NV_STATUS kmcStateInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) {
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return pEngstate->__kmcStateInitUnlocked__(pGpu, pEngstate);
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}
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static inline void kmcInitMissing_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) {
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pEngstate->__kmcInitMissing__(pGpu, pEngstate);
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}
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static inline NV_STATUS kmcStatePreInitLocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) {
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return pEngstate->__kmcStatePreInitLocked__(pGpu, pEngstate);
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}
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static inline NV_STATUS kmcStatePreInitUnlocked_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) {
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return pEngstate->__kmcStatePreInitUnlocked__(pGpu, pEngstate);
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}
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static inline NV_STATUS kmcGetTunableState_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, void *pTunableState) {
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return pEngstate->__kmcGetTunableState__(pGpu, pEngstate, pTunableState);
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}
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static inline NV_STATUS kmcCompareTunableState_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, void *pTunables1, void *pTunables2) {
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return pEngstate->__kmcCompareTunableState__(pGpu, pEngstate, pTunables1, pTunables2);
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}
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static inline void kmcFreeTunableState_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, void *pTunableState) {
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pEngstate->__kmcFreeTunableState__(pGpu, pEngstate, pTunableState);
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}
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static inline NV_STATUS kmcStatePostLoad_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, NvU32 arg0) {
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return pEngstate->__kmcStatePostLoad__(pGpu, pEngstate, arg0);
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}
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static inline NV_STATUS kmcAllocTunableState_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, void **ppTunableState) {
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return pEngstate->__kmcAllocTunableState__(pGpu, pEngstate, ppTunableState);
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}
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static inline NV_STATUS kmcSetTunableState_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, void *pTunableState) {
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return pEngstate->__kmcSetTunableState__(pGpu, pEngstate, pTunableState);
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}
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static inline NV_STATUS kmcConstructEngine_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate, ENGDESCRIPTOR arg0) {
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return pEngstate->__kmcConstructEngine__(pGpu, pEngstate, arg0);
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}
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static inline NvBool kmcIsPresent_DISPATCH(POBJGPU pGpu, struct KernelMc *pEngstate) {
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return pEngstate->__kmcIsPresent__(pGpu, pEngstate);
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}
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#undef PRIVATE_FIELD
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#endif // KERNEL_MC_H
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _G_KERNEL_MC_NVOC_H_
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