525.47.07

This commit is contained in:
russellcnv
2023-02-03 00:13:22 -08:00
parent 65bd98c238
commit 1a970827d6
91 changed files with 1943 additions and 666 deletions

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -565,6 +565,7 @@ NvlStatus nvswitch_launch_ALI(nvswitch_device *device);
NvlStatus nvswitch_launch_ALI_link_training(nvswitch_device *device, nvlink_link *link, NvBool bSync);
NvlStatus nvswitch_inband_read_data(nvswitch_device *device, NvU8 *dest, NvU32 linkId, NvU32 *dataSize);
void nvswitch_filter_messages(nvswitch_device *device, NvU32 linkId);
NvlStatus nvswitch_reset_and_train_link(nvswitch_device *device, nvlink_link *link);
NvlStatus nvswitch_set_training_mode(nvswitch_device *device);
NvBool nvswitch_is_link_in_reset(nvswitch_device *device, nvlink_link *link);
void nvswitch_apply_recal_settings(nvswitch_device *device, nvlink_link *link);

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -239,6 +239,7 @@
_op(NvlStatus, nvswitch_ctrl_get_rb_stall_busy, (nvswitch_device *device, NVSWITCH_GET_RB_STALL_BUSY *p), _arch) \
_op(NvlStatus, nvswitch_ctrl_get_multicast_id_error_vector, (nvswitch_device *device, NVSWITCH_GET_MULTICAST_ID_ERROR_VECTOR *p), _arch) \
_op(NvlStatus, nvswitch_ctrl_clear_multicast_id_error_vector, (nvswitch_device *device, NVSWITCH_CLEAR_MULTICAST_ID_ERROR_VECTOR *p), _arch) \
_op(NvlStatus, nvswitch_reset_and_train_link, (nvswitch_device *device, nvlink_link *link), _arch) \
//
// Declare HAL function pointer table

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -657,6 +657,7 @@ NvlStatus nvswitch_ctrl_get_board_part_number_lr10(nvswitch_device *device, NVSW
NvlStatus nvswitch_ctrl_set_mc_rid_table_lr10(nvswitch_device *device, NVSWITCH_SET_MC_RID_TABLE_PARAMS *p);
NvlStatus nvswitch_ctrl_get_mc_rid_table_lr10(nvswitch_device *device, NVSWITCH_GET_MC_RID_TABLE_PARAMS *p);
NvlStatus nvswitch_launch_ALI_lr10(nvswitch_device *device);
NvlStatus nvswitch_reset_and_train_link_lr10(nvswitch_device *device, nvlink_link *link);
NvlStatus nvswitch_ctrl_get_bios_info_lr10(nvswitch_device *device, NVSWITCH_GET_BIOS_INFO_PARAMS *p);

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -993,6 +993,7 @@ void nvswitch_service_minion_all_links_ls10(nvswitch_device *device);
NvBool nvswitch_is_inforom_supported_ls10(nvswitch_device *device);
void nvswitch_set_error_rate_threshold_ls10(nvlink_link *link, NvBool bIsDefault);
void nvswitch_configure_error_rate_threshold_interrupt_ls10(nvlink_link *link, NvBool bEnable);
NvlStatus nvswitch_reset_and_train_link_ls10(nvswitch_device *device, nvlink_link *link);
#endif //_LS10_H_

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@@ -39,6 +39,8 @@ void nvswitch_cci_soe_callback_ls10(nvswitch_device *device, RM_FLCN_MSG *pGenMs
void *pParams, NvU32 seqDesc, NV_STATUS status);
NvlStatus nvswitch_set_nport_tprod_state_ls10(nvswitch_device *device, NvU32 nport);
void nvswitch_soe_unregister_events_ls10(nvswitch_device *device);
void nvswitch_therm_soe_callback_ls10(nvswitch_device *device, union RM_FLCN_MSG *pMsg,
void *pParams, NvU32 seqDesc, NV_STATUS status);
NvlStatus nvswitch_soe_register_event_callbacks_ls10(nvswitch_device *device);
NvlStatus nvswitch_soe_restore_nport_state_ls10(nvswitch_device *device, NvU32 nport);
NvlStatus nvswitch_soe_issue_nport_reset_ls10(nvswitch_device *device, NvU32 nport);

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@@ -569,7 +569,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
0x328908f4, 0xfbfa324f, 0xbf02f971, 0xbcb0b2b9, 0xb9a6b0c9, 0xe41708f4, 0xbcffffd9, 0xfba6f09b,
0x980b08f4, 0xf9a60109, 0xf8050df4, 0xb2dc7202, 0x28d77eed, 0xb201fb00, 0x05ab98b9, 0xdeb2cfb2,
0xfd729cb2, 0x0042a97e, 0xf0fc00f8, 0xf9fc30f4, 0xbf62f9f0, 0x08e1b0b9, 0xd4b2a5b2, 0xa630c9bc,
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x24bd0101, 0x763efc06, 0x02f80043,
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x010124bd, 0x763efc06, 0x02f80043,
0x853e0101, 0x42bc0043, 0x0096b192, 0x060df401, 0x90010049, 0x96ff0399, 0x0b947e04, 0xb23bb200,
0xdd0c725a, 0x00001200, 0x7e3030bc, 0x320028d7, 0x00a433a1, 0x08b0b434, 0xb209c0b4, 0x1200da2d,
0x20bc0000, 0x01004e20, 0x0021367e, 0x0a00a033, 0x853e02f8, 0x00da0043, 0xbd000012, 0x01004cb4,
@@ -859,7 +859,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
0x4c99c700, 0x6a0090b3, 0xf60190b3, 0xde3e02f8, 0xf9cf0066, 0x4c99c700, 0x3a0090b3, 0xf60190b3,
0xf23e02f8, 0x00d90066, 0xbf000014, 0x014bfe9a, 0xbb90080c, 0x006e7e14, 0x0149fe00, 0xbf1c9990,
0x05dcd99f, 0x99bf0000, 0x0bf5f9a6, 0xe03e00ba, 0x00890067, 0x99cf01c2, 0x0608de00, 0x9fc70000,
0x1899c710, 0x3515ef35, 0x063e14e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
0x1899c710, 0x3516ef35, 0x063e15e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
0x9ff70201, 0x009fcf00, 0xf23e9fb2, 0x00890066, 0x99cf01c2, 0x009fe400, 0xff94f120, 0x00fdb33f,
0xc13eff40, 0x448f0066, 0x0089066f, 0x9ff601c1, 0x00f1df00, 0x99b88000, 0xf7020100, 0x9fcf009f,
0x3e9fb200, 0x890066a8, 0xcf01c200, 0x9fe40099, 0x94f12000, 0xfdb33fff, 0x3efec700, 0x8f006681,
@@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0x62f5c2c4, 0xc41c2f31, 0x9af0cbcc, 0xb7efe098,
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x5f24a73a, 0x55cea6d1, 0x59205a69, 0x18a31f2d,
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0xb22438cf, 0xcfd90bc8, 0xf23ebc55, 0x2e5c0e40,
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x0d4a5d7d, 0x9c31ffb3, 0x95bc604f, 0x40cc834d,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,

View File

@@ -569,7 +569,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
0x328908f4, 0xfbfa324f, 0xbf02f971, 0xbcb0b2b9, 0xb9a6b0c9, 0xe41708f4, 0xbcffffd9, 0xfba6f09b,
0x980b08f4, 0xf9a60109, 0xf8050df4, 0xb2dc7202, 0x28d77eed, 0xb201fb00, 0x05ab98b9, 0xdeb2cfb2,
0xfd729cb2, 0x0042a97e, 0xf0fc00f8, 0xf9fc30f4, 0xbf62f9f0, 0x08e1b0b9, 0xd4b2a5b2, 0xa630c9bc,
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x24bd0101, 0x763efc06, 0x02f80043,
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x010124bd, 0x763efc06, 0x02f80043,
0x853e0101, 0x42bc0043, 0x0096b192, 0x060df401, 0x90010049, 0x96ff0399, 0x0b947e04, 0xb23bb200,
0xdd0c725a, 0x00001200, 0x7e3030bc, 0x320028d7, 0x00a433a1, 0x08b0b434, 0xb209c0b4, 0x1200da2d,
0x20bc0000, 0x01004e20, 0x0021367e, 0x0a00a033, 0x853e02f8, 0x00da0043, 0xbd000012, 0x01004cb4,
@@ -859,7 +859,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
0x4c99c700, 0x6a0090b3, 0xf60190b3, 0xde3e02f8, 0xf9cf0066, 0x4c99c700, 0x3a0090b3, 0xf60190b3,
0xf23e02f8, 0x00d90066, 0xbf000014, 0x014bfe9a, 0xbb90080c, 0x006e7e14, 0x0149fe00, 0xbf1c9990,
0x05dcd99f, 0x99bf0000, 0x0bf5f9a6, 0xe03e00ba, 0x00890067, 0x99cf01c2, 0x0608de00, 0x9fc70000,
0x1899c710, 0x3515ef35, 0x063e14e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
0x1899c710, 0x3516ef35, 0x063e15e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
0x9ff70201, 0x009fcf00, 0xf23e9fb2, 0x00890066, 0x99cf01c2, 0x009fe400, 0xff94f120, 0x00fdb33f,
0xc13eff40, 0x448f0066, 0x0089066f, 0x9ff601c1, 0x00f1df00, 0x99b88000, 0xf7020100, 0x9fcf009f,
0x3e9fb200, 0x890066a8, 0xcf01c200, 0x9fe40099, 0x94f12000, 0xfdb33fff, 0x3efec700, 0x8f006681,
@@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0x62f5c2c4, 0xc41c2f31, 0x9af0cbcc, 0xb7efe098,
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x5f24a73a, 0x55cea6d1, 0x59205a69, 0x18a31f2d,
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0xb22438cf, 0xcfd90bc8, 0xf23ebc55, 0x2e5c0e40,
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x0d4a5d7d, 0x9c31ffb3, 0x95bc604f, 0x40cc834d,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -2369,3 +2369,13 @@ nvswitch_launch_ALI_link_training_lr10
{
return NVL_ERR_NOT_IMPLEMENTED;
}
NvlStatus
nvswitch_reset_and_train_link_lr10
(
nvswitch_device *device,
nvlink_link *link
)
{
return NVL_ERR_NOT_IMPLEMENTED;
}

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@@ -6611,12 +6611,12 @@ _nvswitch_service_nvlw_fatal_ls10
status[5] = _nvswitch_service_nvlipt_link_fatal_ls10(device, instance);
if (status[0] != NVL_SUCCESS &&
status[1] != NVL_SUCCESS &&
status[2] != NVL_SUCCESS &&
status[3] != NVL_SUCCESS &&
status[4] != NVL_SUCCESS &&
status[5] != NVL_SUCCESS)
if (status[0] != NVL_SUCCESS && status[0] != -NVL_NOT_FOUND &&
status[1] != NVL_SUCCESS && status[1] != -NVL_NOT_FOUND &&
status[2] != NVL_SUCCESS && status[2] != -NVL_NOT_FOUND &&
status[3] != NVL_SUCCESS && status[3] != -NVL_NOT_FOUND &&
status[4] != NVL_SUCCESS && status[4] != -NVL_NOT_FOUND &&
status[5] != NVL_SUCCESS && status[5] != -NVL_NOT_FOUND)
{
return -NVL_MORE_PROCESSING_REQUIRED;
}

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -496,6 +496,34 @@ nvswitch_corelib_get_rx_detect_ls10
return NVL_SUCCESS;
}
static NvBool
_nvswitch_is_tlc_in_reset
(
nvswitch_device *device,
nvlink_link *link
)
{
NvU32 clkStatus;
clkStatus = NVSWITCH_LINK_RD32_LS10(device, link->linkNumber,
NVLIPT_LNK, _NVLIPT_LNK, _CTRL_CLK_CTRL);
//
// TLC is in reset if any of the per-link clocks are off
// -- if TX and RX clocks are off then link is not powered on
// -- if TX/RX clocks are on but NCISOC clock is off, DL layer
// is on but TLC is still off
//
if (FLD_TEST_DRF(_NVLIPT_LNK, _CTRL_CLK_CTRL, _RXCLK_STS, _OFF, clkStatus) ||
FLD_TEST_DRF(_NVLIPT_LNK, _CTRL_CLK_CTRL, _TXCLK_STS, _OFF, clkStatus) ||
FLD_TEST_DRF(_NVLIPT_LNK, _CTRL_CLK_CTRL, _NCISOCCLK_STS, _OFF, clkStatus))
{
return NV_TRUE;
}
return NV_FALSE;
}
void
nvswitch_reset_persistent_link_hw_state_ls10
(
@@ -509,14 +537,21 @@ nvswitch_reset_persistent_link_hw_state_ls10
return;
}
// SETUPTC called with HW Reset
(void)nvswitch_minion_send_command(device, linkNumber, NV_MINION_NVLINK_DL_CMD_COMMAND_SETUPTC , 0x4);
// clear TLC TP Counters
(void)nvswitch_minion_send_command(device, linkNumber, NV_MINION_NVLINK_DL_CMD_COMMAND_CLR_TLC_MISC_REGS, 0);
// clear DL error counters
(void)nvswitch_minion_send_command(device, linkNumber, NV_MINION_NVLINK_DL_CMD_COMMAND_DLSTAT_CLR_DLERRCNT, 0);
// If TLC is not up then return
if (_nvswitch_is_tlc_in_reset(device, link))
{
return;
}
// SETUPTC called to reset and setup throughput counters
(void)nvswitch_minion_send_command(device, linkNumber, NV_MINION_NVLINK_DL_CMD_COMMAND_SETUPTC , 0x4);
// clear miscellaneous TLC counters and registers
(void)nvswitch_minion_send_command(device, linkNumber, NV_MINION_NVLINK_DL_CMD_COMMAND_CLR_TLC_MISC_REGS, 0);
}
NvlStatus
@@ -1469,3 +1504,82 @@ nvswitch_execute_unilateral_link_shutdown_ls10
return;
}
NvlStatus
nvswitch_reset_and_train_link_ls10
(
nvswitch_device *device,
nvlink_link *link
)
{
NvlStatus status = NVL_SUCCESS;
NvU32 retry_count = 3;
NvU32 link_state_request;
NvU32 link_state;
NvU32 stat_data;
NvU32 link_intr_subcode;
nvswitch_execute_unilateral_link_shutdown_ls10(link);
nvswitch_corelib_clear_link_state_ls10(link);
do
{
status = nvswitch_request_tl_link_state_ls10(link,
NV_NVLIPT_LNK_CTRL_LINK_STATE_REQUEST_REQUEST_RESET, NV_TRUE);
if (status == NVL_SUCCESS)
{
break;
}
else
{
link_state_request = NVSWITCH_LINK_RD32_LS10(device, link->linkNumber,
NVLIPT_LNK , _NVLIPT_LNK , _CTRL_LINK_STATE_REQUEST);
link_state = DRF_VAL(_NVLIPT_LNK, _CTRL_LINK_STATE_REQUEST, _STATUS,
link_state_request);
if (nvswitch_minion_get_dl_status(device, link->linkNumber,
NV_NVLSTAT_MN00, 0, &stat_data) == NVL_SUCCESS)
{
link_intr_subcode = DRF_VAL(_NVLSTAT, _MN00, _LINK_INTR_SUBCODE, stat_data);
}
if ((link_state == NV_NVLIPT_LNK_CTRL_LINK_STATE_REQUEST_STATUS_MINION_REQUEST_FAIL) &&
(link_intr_subcode == MINION_ALARM_BUSY))
{
status = nvswitch_request_tl_link_state_ls10(link,
NV_NVLIPT_LNK_CTRL_LINK_STATE_REQUEST_REQUEST_RESET, NV_TRUE);
//
// We retry the shutdown sequence 3 times when we see a MINION_REQUEST_FAIL
// or MINION_ALARM_BUSY
//
retry_count--;
}
else
{
break;
}
}
} while(retry_count);
if (status != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR,
"%s: NvLink Reset has failed for link %d\n",
__FUNCTION__, link->linkNumber);
// Re-register links.
status = nvlink_lib_register_link(device->nvlink_device, link);
if (status != NVL_SUCCESS)
{
nvswitch_destroy_link(link);
return status;
}
return status;
}
return NVL_SUCCESS;
}

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@@ -31,7 +31,6 @@
#include "common_nvswitch.h"
#include "ls10/ls10.h"
#include "ls10/soe_ls10.h"
#include "lr10/soe_lr10.h"
#include "nvswitch/ls10/dev_soe_ip.h"
#include "nvswitch/ls10/dev_soe_ip_addendum.h"
@@ -555,7 +554,7 @@ nvswitch_soe_register_event_callbacks_ls10
device, pFlcn,
RM_SOE_UNIT_THERM,
NULL,
nvswitch_therm_soe_callback_lr10,
nvswitch_therm_soe_callback_ls10,
NULL,
&pSoe->thermEvtDesc);
if (status != NV_OK)

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@@ -28,6 +28,7 @@
#include "ls10/therm_ls10.h"
#include "error_nvswitch.h"
#include "soe/soeiftherm.h"
#include "rmflcncmdif_nvswitch.h"
#include "nvswitch/ls10/dev_therm.h"
@@ -356,3 +357,100 @@ nvswitch_monitor_thermal_alert_ls10
return;
}
/*
* @brief Callback function to recieve thermal messages from SOE.
*/
void
nvswitch_therm_soe_callback_ls10
(
nvswitch_device *device,
RM_FLCN_MSG *pGenMsg,
void *pParams,
NvU32 seqDesc,
NV_STATUS status
)
{
RM_SOE_THERM_MSG_SLOWDOWN_STATUS slowdown_status;
RM_SOE_THERM_MSG_SHUTDOWN_STATUS shutdown_status;
RM_FLCN_MSG_SOE *pMsg = (RM_FLCN_MSG_SOE *)pGenMsg;
NvU32 temperature;
NvU32 threshold;
switch (pMsg->msg.soeTherm.msgType)
{
case RM_SOE_THERM_MSG_ID_SLOWDOWN_STATUS:
{
slowdown_status = pMsg->msg.soeTherm.slowdown;
if (slowdown_status.bSlowdown)
{
if (slowdown_status.source.bTsense) // TSENSE_THERM_ALERT
{
temperature = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.maxTemperature);
threshold = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.warnThreshold);
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
"NVSWITCH Temperature %dC | TSENSE WARN Threshold %dC\n",
temperature, threshold);
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
"Thermal Slowdown Engaged | Temp higher than WARN Threshold\n");
}
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
"Thermal Slowdown Engaged | Links Thermal Mode %s\n", (slowdown_status.bLinksL1Status ? "ON" : "OFF"));
if (slowdown_status.source.bPmgr) // PMGR_THERM_ALERT
{
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
"Thermal Slowdown Engaged | PMGR WARN Threshold reached\n");
}
}
else // REVERT_SLOWDOWN
{
temperature = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.maxTemperature);
threshold = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.warnThreshold);
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_END,
"NVSWITCH Temperature %dC | TSENSE WARN Threshold %dC\n",
temperature, threshold);
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_END,
"Thermal Slowdown Disengaged | Links Thermal Mode %s\n", (slowdown_status.bLinksL1Status ? "ON" : "OFF"));
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_END,
"Thermal slowdown Disengaged\n");
}
break;
}
case RM_SOE_THERM_MSG_ID_SHUTDOWN_STATUS:
{
shutdown_status = pMsg->msg.soeTherm.shutdown;
if (shutdown_status.source.bTsense) // TSENSE_THERM_SHUTDOWN
{
temperature = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(shutdown_status.maxTemperature);
threshold = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(shutdown_status.overtThreshold);
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_SHUTDOWN,
"NVSWITCH Temperature %dC | OVERT Threshold %dC\n",
temperature, threshold);
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_SHUTDOWN,
"TSENSE OVERT Threshold reached. Shutting Down\n");
}
if (shutdown_status.source.bPmgr) // PMGR_THERM_SHUTDOWN
{
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
"PMGR OVERT Threshold reached. Shutting Down\n");
}
break;
}
default:
{
NVSWITCH_PRINT(device, ERROR, "%s Unknown message Id\n", __FUNCTION__);
NVSWITCH_ASSERT(0);
}
}
}

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2017-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -1336,6 +1336,7 @@ nvswitch_lib_initialize_device
NvU8 link_num;
nvlink_link *link = NULL;
NvBool is_blacklisted_by_os = NV_FALSE;
NvU64 mode;
if (!NVSWITCH_IS_DEVICE_ACCESSIBLE(device))
{
@@ -1497,6 +1498,19 @@ nvswitch_lib_initialize_device
}
nvswitch_reset_persistent_link_hw_state(device, link_num);
if(_nvswitch_corelib_get_dl_link_mode(link, &mode) != NVL_SUCCESS)
{
NVSWITCH_PRINT(device, ERROR, "%s: nvlipt_lnk_status: Failed to check link mode! LinkId %d\n",
__FUNCTION__, link_num);
}
else if(mode == NVLINK_LINKSTATE_FAULT)
{
NVSWITCH_PRINT(device, INFO, "%s: retraining LinkId %d\n",
__FUNCTION__, link_num);
nvswitch_reset_and_train_link(device, link);
}
}
retval = nvswitch_set_training_mode(device);
@@ -3004,11 +3018,17 @@ _nvswitch_ctrl_unregister_link
return -NVL_BAD_ARGS;
}
// With ALI in FW, links can be unregistered while Active
if (!device->nvlink_device->enableALI)
{
if (device->hal.nvswitch_is_link_in_use(device, params->portNum))
{
return -NVL_ERR_STATE_IN_USE;
}
}
nvlink_lib_unregister_link(link);
nvswitch_destroy_link(link);
@@ -4632,6 +4652,16 @@ nvswitch_launch_ALI_link_training
return device->hal.nvswitch_launch_ALI_link_training(device, link, bSync);
}
NvlStatus
nvswitch_reset_and_train_link
(
nvswitch_device *device,
nvlink_link *link
)
{
return device->hal.nvswitch_reset_and_train_link(device, link);
}
static NvlStatus
_nvswitch_ctrl_get_err_info
(