mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-01-31 05:29:47 +00:00
580.76.05
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@@ -1450,16 +1450,16 @@ static int nv_start_device(nv_state_t *nv, nvidia_stack_t *sp)
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{
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rc = os_alloc_mutex(&nvl->isr_bh_unlocked_mutex);
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if (rc != 0)
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goto failed;
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goto failed_release_irq;
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nv_kthread_q_item_init(&nvl->bottom_half_q_item, nvidia_isr_bh_unlocked, (void *)nv);
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rc = nv_kthread_q_init(&nvl->bottom_half_q, nv_device_name);
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if (rc != 0)
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goto failed;
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goto failed_release_irq;
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kthread_init = NV_TRUE;
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rc = nv_kthread_q_init(&nvl->queue.nvk, "nv_queue");
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if (rc)
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goto failed;
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goto failed_release_irq;
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nv->queue = &nvl->queue;
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if (nv_platform_use_auto_online(nvl))
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@@ -1467,33 +1467,18 @@ static int nv_start_device(nv_state_t *nv, nvidia_stack_t *sp)
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rc = nv_kthread_q_init(&nvl->remove_numa_memory_q,
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"nv_remove_numa_memory");
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if (rc)
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goto failed;
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goto failed_release_irq;
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remove_numa_memory_kthread_init = NV_TRUE;
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}
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}
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if (!rm_init_adapter(sp, nv))
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{
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if (!(nv->flags & NV_FLAG_USES_MSIX) &&
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!(nv->flags & NV_FLAG_SOC_DISPLAY))
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{
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free_irq(nv->interrupt_line, (void *) nvl);
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}
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else if (nv->flags & NV_FLAG_SOC_DISPLAY)
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{
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nv_soc_free_irqs(nv);
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}
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#if defined(NV_LINUX_PCIE_MSI_SUPPORTED)
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else
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{
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nv_free_msix_irq(nvl);
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}
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#endif
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NV_DEV_PRINTF(NV_DBG_ERRORS, nv,
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"rm_init_adapter failed, device minor number %d\n",
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nvl->minor_num);
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rc = -EIO;
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goto failed;
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goto failed_release_irq;
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}
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{
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@@ -1527,6 +1512,26 @@ static int nv_start_device(nv_state_t *nv, nvidia_stack_t *sp)
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return 0;
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failed_release_irq:
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if (!(nv->flags & NV_FLAG_PERSISTENT_SW_STATE))
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{
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if (!(nv->flags & NV_FLAG_USES_MSIX) &&
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!(nv->flags & NV_FLAG_SOC_DISPLAY))
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{
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free_irq(nv->interrupt_line, (void *) nvl);
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}
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else if (nv->flags & NV_FLAG_SOC_DISPLAY)
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{
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nv_soc_free_irqs(nv);
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}
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#if defined(NV_LINUX_PCIE_MSI_SUPPORTED)
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else
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{
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nv_free_msix_irq(nvl);
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}
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#endif
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}
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failed:
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#if defined(NV_LINUX_PCIE_MSI_SUPPORTED)
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if (nv->flags & NV_FLAG_USES_MSI)
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@@ -2452,6 +2457,7 @@ nvidia_ioctl(
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if (arg_cmd == NV_ESC_WAIT_OPEN_COMPLETE)
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{
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nv_ioctl_wait_open_complete_t *params = arg_copy;
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params->rc = nvlfp->open_rc;
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params->adapterStatus = nvlfp->adapter_status;
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goto done_early;
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@@ -6154,8 +6160,13 @@ void NV_API_CALL nv_get_screen_info(
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if (!registered_fb[i])
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continue;
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/* Make sure base address is mapped to GPU BAR */
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if (NV_IS_CONSOLE_MAPPED(nv, registered_fb[i]->fix.smem_start))
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/*
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* Ensure that either this is a zero-FB SOC GPU with a console in
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* the system carveout, or it’s a dGPU device with console mapped
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* onto its BAR.
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*/
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if (NV_HAS_CONSOLE_IN_SYSMEM_CARVEOUT(nv) ||
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NV_IS_CONSOLE_MAPPED(nv, registered_fb[i]->fix.smem_start))
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{
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*pPhysicalAddress = registered_fb[i]->fix.smem_start;
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*pFbWidth = registered_fb[i]->var.xres;
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@@ -6203,9 +6214,13 @@ void NV_API_CALL nv_get_screen_info(
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physAddr |= (NvU64)screen_info.ext_lfb_base << 32;
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}
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#endif
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/* Make sure base address is mapped to GPU BAR */
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if (NV_IS_CONSOLE_MAPPED(nv, physAddr))
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/*
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* Ensure that either this is a zero-FB SOC GPU with a console in the
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* system carveout, or it’s a dGPU device with console mapped onto its
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* BAR.
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*/
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if (NV_HAS_CONSOLE_IN_SYSMEM_CARVEOUT(nv) ||
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NV_IS_CONSOLE_MAPPED(nv, physAddr))
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{
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*pPhysicalAddress = physAddr;
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*pFbWidth = screen_info.lfb_width;
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@@ -6222,7 +6237,7 @@ void NV_API_CALL nv_get_screen_info(
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* If screen info can't be fetched with previous methods, then try
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* to get the base address and size from the memory resource tree.
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*/
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if (pci_dev != NULL)
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if ((pci_dev != NULL) && !NV_HAS_CONSOLE_IN_SYSMEM_CARVEOUT(nv))
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{
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BUILD_BUG_ON(NV_GPU_BAR_INDEX_IMEM != NV_GPU_BAR_INDEX_FB + 1);
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for (i = NV_GPU_BAR_INDEX_FB; i <= NV_GPU_BAR_INDEX_IMEM; i++)
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@@ -2313,7 +2313,7 @@ static int os_numa_verify_gpu_memory_zone(struct notifier_block *nb,
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return NOTIFY_OK;
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}
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#define ADD_REMOVE_GPU_MEMORY_NUM_SEGMENTS 4
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#define ADD_REMOVE_GPU_MEMORY_NUM_SEGMENTS 128
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NV_STATUS NV_API_CALL os_numa_add_gpu_memory
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(
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