mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-02 06:29:47 +00:00
580.105.08
This commit is contained in:
Maneet Singh
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -150,7 +150,6 @@ struct CeUtils {
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NvBool bCompletionCallbackEnabled;
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PORT_SPINLOCK *pCallbackLock;
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CeUtilsCallbackList completionCallbacks;
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NVOS10_EVENT_KERNEL_CALLBACK_EX semaphoreCallback;
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struct KernelChannel *pLiteKernelChannel;
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};
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@@ -302,6 +302,7 @@ void __nvoc_init_dataField_KernelDisplay(KernelDisplay *pThis, RmHalspecOwner *p
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pThis->setProperty(pThis, PDB_PROP_KDISP_HAS_SEPARATE_LOW_LATENCY_LINE, NV_FALSE);
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}
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pThis->setProperty(pThis, PDB_PROP_KDISP_ENABLE_INLINE_INTR_SERVICE, NV_TRUE);
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pThis->setProperty(pThis, PDB_PROP_KDISP_WINDOW_CHANNEL_ALWAYS_MAPPED, (1));
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pThis->pStaticInfo = ((void *)0);
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@@ -241,7 +241,7 @@ struct KernelDisplay {
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void (*__kdispApplyChannelConnectDisconnect__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32, NvU32); // halified (2 hals)
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NvBool (*__kdispIsChannelAllocatedHw__)(OBJGPU *, struct KernelDisplay * /*this*/, NvU32, NvU32); // halified (2 hals)
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// 8 PDB properties
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// 9 PDB properties
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// NvBool PDB_PROP_KDISP_IS_MISSING inherited from OBJENGSTATE
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NvBool PDB_PROP_KDISP_IMP_ALLOC_BW_IN_KERNEL_RM_DEF;
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NvBool PDB_PROP_KDISP_FEATURE_STRETCH_VBLANK_CAPABLE;
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@@ -250,6 +250,7 @@ struct KernelDisplay {
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NvBool PDB_PROP_KDISP_INTERNAL_PANEL_DISCONNECTED;
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NvBool PDB_PROP_KDISP_ENABLE_INLINE_INTR_SERVICE;
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NvBool PDB_PROP_KDISP_AGGRESSIVE_VBLANK_HANDLING;
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NvBool PDB_PROP_KDISP_WINDOW_CHANNEL_ALWAYS_MAPPED;
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// Data members
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struct DisplayInstanceMemory *pInst;
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@@ -275,6 +276,7 @@ struct KernelDisplay {
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KernelDisplayClientChannelMap *pClientChannelTable;
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NvBool bIsPanelReplayEnabled;
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void *pRgVblankCb;
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NvBool bWindowChannelAlwaysMapped;
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};
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@@ -347,6 +349,8 @@ extern const struct NVOC_CLASS_DEF __nvoc_class_def_KernelDisplay;
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#define PDB_PROP_KDISP_ENABLE_INLINE_INTR_SERVICE_BASE_NAME PDB_PROP_KDISP_ENABLE_INLINE_INTR_SERVICE
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#define PDB_PROP_KDISP_AGGRESSIVE_VBLANK_HANDLING_BASE_CAST
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#define PDB_PROP_KDISP_AGGRESSIVE_VBLANK_HANDLING_BASE_NAME PDB_PROP_KDISP_AGGRESSIVE_VBLANK_HANDLING
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#define PDB_PROP_KDISP_WINDOW_CHANNEL_ALWAYS_MAPPED_BASE_CAST
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#define PDB_PROP_KDISP_WINDOW_CHANNEL_ALWAYS_MAPPED_BASE_NAME PDB_PROP_KDISP_WINDOW_CHANNEL_ALWAYS_MAPPED
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NV_STATUS __nvoc_objCreateDynamic_KernelDisplay(KernelDisplay**, Dynamic*, NvU32, va_list);
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@@ -661,8 +661,7 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis
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}
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// kmemsysNeedInvalidateGpuCacheOnMap -- halified (2 hals) body
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x71f0ffe0UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e6UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 | GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 | GB110 | GB112 | GB202 | GB203 | GB205 | GB206 | GB207 */
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x000003e0UL) )) /* ChipHal: TU102 | TU104 | TU106 | TU116 | TU117 */
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{
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pThis->__kmemsysNeedInvalidateGpuCacheOnMap__ = &kmemsysNeedInvalidateGpuCacheOnMap_GV100;
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}
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@@ -673,9 +672,9 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis
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}
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// kmemsysNeedInvalidateGpuCacheOnUnmap -- halified (2 hals) body
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x80000000UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000c00UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 3UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00005000UL) )) /* ChipHal: GB10B | GB20B | GB20C | T234D | T264D */
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xf1f0fc00UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000fe6UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 3UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00005000UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 | GH100 | GB100 | GB102 | GB10B | GB110 | GB112 | GB202 | GB203 | GB205 | GB206 | GB207 | GB20B | GB20C | T234D | T264D */
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{
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pThis->__kmemsysNeedInvalidateGpuCacheOnUnmap__ = &kmemsysNeedInvalidateGpuCacheOnUnmap_T194;
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}
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@@ -391,6 +391,8 @@ void __nvoc_init_dataField_KernelNvlink(KernelNvlink *pThis, RmHalspecOwner *pRm
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pThis->fabricBaseAddr = (+18446744073709551615ULL);
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pThis->fabricEgmBaseAddr = (+18446744073709551615ULL);
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pThis->vidmemDirectConnectBaseAddr = (+18446744073709551615ULL);
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}
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NV_STATUS __nvoc_ctor_OBJENGSTATE(OBJENGSTATE* );
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@@ -432,6 +434,18 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO
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pThis->__knvlinkIsPresent__ = &knvlinkIsPresent_IMPL;
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}
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// knvlinkSetDirectConnectBaseAddress -- halified (2 hals) body
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xe0000000UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000fe6UL) )) /* ChipHal: GB100 | GB102 | GB10B | GB110 | GB112 | GB202 | GB203 | GB205 | GB206 | GB207 | GB20B | GB20C */
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{
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pThis->__knvlinkSetDirectConnectBaseAddress__ = &knvlinkSetDirectConnectBaseAddress_GB100;
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}
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// default
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else
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{
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pThis->__knvlinkSetDirectConnectBaseAddress__ = &knvlinkSetDirectConnectBaseAddress_56cd7a;
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}
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// knvlinkSetUniqueFabricBaseAddress -- halified (3 hals) body
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */
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{
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@@ -495,15 +509,19 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO
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pThis->__knvlinkHandleFaultUpInterrupt__ = &knvlinkHandleFaultUpInterrupt_46f6a7;
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}
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// knvlinkValidateFabricBaseAddress -- halified (3 hals) body
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */
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// knvlinkValidateFabricBaseAddress -- halified (4 hals) body
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if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x10000000UL) )) /* ChipHal: GH100 */
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{
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pThis->__knvlinkValidateFabricBaseAddress__ = &knvlinkValidateFabricBaseAddress_GH100;
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}
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else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f0fc00UL) )) /* ChipHal: GA100 | GA102 | GA103 | GA104 | GA106 | GA107 | AD102 | AD103 | AD104 | AD106 | AD107 */
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{
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pThis->__knvlinkValidateFabricBaseAddress__ = &knvlinkValidateFabricBaseAddress_GA100;
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}
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else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xf0000000UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000fe6UL) )) /* ChipHal: GH100 | GB100 | GB102 | GB10B | GB110 | GB112 | GB202 | GB203 | GB205 | GB206 | GB207 | GB20B | GB20C */
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else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xe0000000UL) ) ||
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( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000fe6UL) )) /* ChipHal: GB100 | GB102 | GB10B | GB110 | GB112 | GB202 | GB203 | GB205 | GB206 | GB207 | GB20B | GB20C */
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{
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pThis->__knvlinkValidateFabricBaseAddress__ = &knvlinkValidateFabricBaseAddress_GH100;
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pThis->__knvlinkValidateFabricBaseAddress__ = &knvlinkValidateFabricBaseAddress_GB100;
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}
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// default
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else
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@@ -956,13 +974,13 @@ static void __nvoc_init_funcTable_KernelNvlink_1(KernelNvlink *pThis, RmHalspecO
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{
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pThis->__knvlinkEncryptionUpdateTopology__ = &knvlinkEncryptionUpdateTopology_46f6a7;
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}
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} // End __nvoc_init_funcTable_KernelNvlink_1 with approximately 99 basic block(s).
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} // End __nvoc_init_funcTable_KernelNvlink_1 with approximately 102 basic block(s).
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// Initialize vtable(s) for 58 virtual method(s).
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// Initialize vtable(s) for 59 virtual method(s).
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void __nvoc_init_funcTable_KernelNvlink(KernelNvlink *pThis, RmHalspecOwner *pRmhalspecowner, GpuHalspecOwner *pGpuhalspecowner) {
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// Initialize vtable(s) with 45 per-object function pointer(s).
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// Initialize vtable(s) with 46 per-object function pointer(s).
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__nvoc_init_funcTable_KernelNvlink_1(pThis, pRmhalspecowner, pGpuhalspecowner);
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}
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@@ -254,14 +254,15 @@ struct KernelNvlink {
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struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super
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struct KernelNvlink *__nvoc_pbase_KernelNvlink; // knvlink
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// Vtable with 45 per-object function pointers
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// Vtable with 46 per-object function pointers
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NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual halified (2 hals) override (engstate) base (engstate)
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NV_STATUS (*__knvlinkSetDirectConnectBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body
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void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkSetUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (2 hals) body
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void (*__knvlinkClearUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkHandleFaultUpInterrupt__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body
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NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body
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NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (4 hals) body
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NV_STATUS (*__knvlinkValidateFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body
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NvU32 (*__knvlinkGetConnectedLinksMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkEnableLinksPostTopology__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body
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@@ -377,6 +378,7 @@ struct KernelNvlink {
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NvBool PRIVATE_FIELD(bNvswitchProxy);
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NvU64 PRIVATE_FIELD(fabricBaseAddr);
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NvU64 PRIVATE_FIELD(fabricEgmBaseAddr);
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NvU64 PRIVATE_FIELD(vidmemDirectConnectBaseAddr);
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volatile NvU8 PRIVATE_FIELD(nvlinkBwMode);
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volatile NvU64 PRIVATE_FIELD(nvlinkBwModeEpoch);
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NvU8 PRIVATE_FIELD(maxRbmLinks);
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@@ -406,14 +408,15 @@ struct KernelNvlink_PRIVATE {
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struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super
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struct KernelNvlink *__nvoc_pbase_KernelNvlink; // knvlink
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// Vtable with 45 per-object function pointers
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// Vtable with 46 per-object function pointers
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NvBool (*__knvlinkIsPresent__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // virtual halified (2 hals) override (engstate) base (engstate)
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NV_STATUS (*__knvlinkSetDirectConnectBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkSetUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body
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void (*__knvlinkClearUniqueFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkSetUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (2 hals) body
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void (*__knvlinkClearUniqueFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkHandleFaultUpInterrupt__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body
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NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body
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NV_STATUS (*__knvlinkValidateFabricBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (4 hals) body
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NV_STATUS (*__knvlinkValidateFabricEgmBaseAddress__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU64); // halified (3 hals) body
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NvU32 (*__knvlinkGetConnectedLinksMask__)(struct OBJGPU *, struct KernelNvlink * /*this*/); // halified (2 hals) body
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NV_STATUS (*__knvlinkEnableLinksPostTopology__)(struct OBJGPU *, struct KernelNvlink * /*this*/, NvU32); // halified (2 hals) body
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@@ -529,6 +532,7 @@ struct KernelNvlink_PRIVATE {
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NvBool bNvswitchProxy;
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NvU64 fabricBaseAddr;
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NvU64 fabricEgmBaseAddr;
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NvU64 vidmemDirectConnectBaseAddr;
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volatile NvU8 nvlinkBwMode;
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volatile NvU64 nvlinkBwModeEpoch;
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NvU8 maxRbmLinks;
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@@ -1197,6 +1201,15 @@ static inline void knvlinkSetBWModeEpoch(struct OBJGPU *pGpu, struct KernelNvlin
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#define knvlinkSetBWModeEpoch(pGpu, pKernelNvlink, bwModeEpoch) knvlinkSetBWModeEpoch_IMPL(pGpu, pKernelNvlink, bwModeEpoch)
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#endif // __nvoc_kernel_nvlink_h_disabled
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#ifdef __nvoc_kernel_nvlink_h_disabled
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static inline NvU64 knvlinkGetDirectConnectBaseAddress(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) {
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NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!");
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return 0;
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}
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#else // __nvoc_kernel_nvlink_h_disabled
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#define knvlinkGetDirectConnectBaseAddress(pGpu, pKernelNvlink) knvlinkGetDirectConnectBaseAddress_90d271(pGpu, pKernelNvlink)
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#endif // __nvoc_kernel_nvlink_h_disabled
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#ifdef __nvoc_kernel_nvlink_h_disabled
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static inline NvU64 knvlinkGetUniqueFabricEgmBaseAddress(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) {
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NV_ASSERT_FAILED_PRECOMP("KernelNvlink was disabled!");
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@@ -1300,6 +1313,10 @@ static inline NvU32 knvlinkGetTotalNumLinksPerIoctrl(struct OBJGPU *pGpu, struct
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#define knvlinkSetUniqueFlaBaseAddress_HAL(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFlaBaseAddress(pGpu, pKernelNvlink, arg3)
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#define knvlinkFloorSweep_HAL(pGpu, pKernelNvlink, numLinksPerIp, pNumActiveLinks) knvlinkFloorSweep(pGpu, pKernelNvlink, numLinksPerIp, pNumActiveLinks)
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#define knvlinkGetUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink) knvlinkGetUniqueFabricBaseAddress(pGpu, pKernelNvlink)
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#define knvlinkSetDirectConnectBaseAddress_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkSetDirectConnectBaseAddress__
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#define knvlinkSetDirectConnectBaseAddress(pGpu, pKernelNvlink) knvlinkSetDirectConnectBaseAddress_DISPATCH(pGpu, pKernelNvlink)
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#define knvlinkSetDirectConnectBaseAddress_HAL(pGpu, pKernelNvlink) knvlinkSetDirectConnectBaseAddress_DISPATCH(pGpu, pKernelNvlink)
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#define knvlinkGetDirectConnectBaseAddress_HAL(pGpu, pKernelNvlink) knvlinkGetDirectConnectBaseAddress(pGpu, pKernelNvlink)
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#define knvlinkSetUniqueFabricBaseAddress_FNPTR(pKernelNvlink) pKernelNvlink->__knvlinkSetUniqueFabricBaseAddress__
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#define knvlinkSetUniqueFabricBaseAddress(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg3)
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#define knvlinkSetUniqueFabricBaseAddress_HAL(pGpu, pKernelNvlink, arg3) knvlinkSetUniqueFabricBaseAddress_DISPATCH(pGpu, pKernelNvlink, arg3)
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@@ -1479,6 +1496,10 @@ static inline NvBool knvlinkIsPresent_DISPATCH(struct OBJGPU *arg1, struct Kerne
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return arg_this->__knvlinkIsPresent__(arg1, arg_this);
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}
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static inline NV_STATUS knvlinkSetDirectConnectBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) {
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return pKernelNvlink->__knvlinkSetDirectConnectBaseAddress__(pGpu, pKernelNvlink);
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}
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static inline NV_STATUS knvlinkSetUniqueFabricBaseAddress_DISPATCH(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) {
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return pKernelNvlink->__knvlinkSetUniqueFabricBaseAddress__(pGpu, pKernelNvlink, arg3);
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}
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@@ -1863,6 +1884,12 @@ static inline NvU64 knvlinkGetUniqueFabricBaseAddress_e203db(struct OBJGPU *pGpu
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}
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||||
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static inline NvU64 knvlinkGetDirectConnectBaseAddress_90d271(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) {
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struct KernelNvlink_PRIVATE *pKernelNvlink_PRIVATE = (struct KernelNvlink_PRIVATE *)pKernelNvlink;
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return pKernelNvlink_PRIVATE->vidmemDirectConnectBaseAddr;
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}
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||||
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||||
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||||
static inline NvU64 knvlinkGetUniqueFabricEgmBaseAddress_4de472(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) {
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struct KernelNvlink_PRIVATE *pKernelNvlink_PRIVATE = (struct KernelNvlink_PRIVATE *)pKernelNvlink;
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||||
return pKernelNvlink_PRIVATE->fabricEgmBaseAddr;
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||||
@@ -1893,6 +1920,12 @@ static inline NvBool knvlinkIsPresent_3dd2c9(struct OBJGPU *arg1, struct KernelN
|
||||
|
||||
NvBool knvlinkIsPresent_IMPL(struct OBJGPU *arg1, struct KernelNvlink *arg2);
|
||||
|
||||
static inline NV_STATUS knvlinkSetDirectConnectBaseAddress_56cd7a(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink) {
|
||||
return NV_OK;
|
||||
}
|
||||
|
||||
NV_STATUS knvlinkSetDirectConnectBaseAddress_GB100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink);
|
||||
|
||||
NV_STATUS knvlinkSetUniqueFabricBaseAddress_GV100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3);
|
||||
|
||||
NV_STATUS knvlinkSetUniqueFabricBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3);
|
||||
@@ -1929,6 +1962,8 @@ NV_STATUS knvlinkValidateFabricBaseAddress_GA100(struct OBJGPU *pGpu, struct Ker
|
||||
|
||||
NV_STATUS knvlinkValidateFabricBaseAddress_GH100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3);
|
||||
|
||||
NV_STATUS knvlinkValidateFabricBaseAddress_GB100(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3);
|
||||
|
||||
static inline NV_STATUS knvlinkValidateFabricBaseAddress_46f6a7(struct OBJGPU *pGpu, struct KernelNvlink *pKernelNvlink, NvU64 arg3) {
|
||||
return NV_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
@@ -255,6 +255,7 @@ typedef struct
|
||||
NvU64 assignedSwizzIdMask;
|
||||
NvU32 assignedSwizzIdVgpuCount[KMIGMGR_MAX_GPU_SWIZZID];
|
||||
NvU32 fractionalMultiVgpu;
|
||||
NvBool isPlacementIdInfoSet;
|
||||
// Indicates MIG timeslicing mode enabled/disabled
|
||||
NvBool migTimeslicingModeEnabled;
|
||||
} KERNEL_PHYS_GPU_INFO;
|
||||
|
||||
@@ -78,6 +78,19 @@ typedef struct CeUtils CeUtils;
|
||||
|
||||
|
||||
|
||||
struct SysmemScrubber;
|
||||
|
||||
#ifndef __NVOC_CLASS_SysmemScrubber_TYPEDEF__
|
||||
#define __NVOC_CLASS_SysmemScrubber_TYPEDEF__
|
||||
typedef struct SysmemScrubber SysmemScrubber;
|
||||
#endif /* __NVOC_CLASS_SysmemScrubber_TYPEDEF__ */
|
||||
|
||||
#ifndef __nvoc_class_id_SysmemScrubber
|
||||
#define __nvoc_class_id_SysmemScrubber 0x266962
|
||||
#endif /* __nvoc_class_id_SysmemScrubber */
|
||||
|
||||
|
||||
|
||||
typedef volatile struct _cl906f_tag1 Nv906fControl;
|
||||
typedef struct KERNEL_MIG_GPU_INSTANCE KERNEL_MIG_GPU_INSTANCE;
|
||||
|
||||
@@ -681,6 +694,7 @@ struct MemoryManager {
|
||||
NvU64 rsvdMemorySize;
|
||||
struct CeUtils *pCeUtils;
|
||||
NvBool bDisableGlobalCeUtils;
|
||||
struct SysmemScrubber *pSysmemScrubber;
|
||||
OBJSCRUB eccScrubberState;
|
||||
struct __nvoc_inner_struc_MemoryManager_2__ Ram;
|
||||
PMEMORY_DESCRIPTOR pReservedConsoleMemDesc;
|
||||
|
||||
@@ -5423,10 +5423,6 @@ static const CHIPS_RELEASED sChipsReleased[] = {
|
||||
{ 0x2BB1, 0x204b, 0x103c, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" },
|
||||
{ 0x2BB1, 0x204b, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" },
|
||||
{ 0x2BB1, 0x204b, 0x17aa, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" },
|
||||
{ 0x2BB2, 0x2218, 0x1028, "NVIDIA RTX PRO 6000D Blackwell Workstation Edition" },
|
||||
{ 0x2BB2, 0x2218, 0x103c, "NVIDIA RTX PRO 6000D Blackwell Workstation Edition" },
|
||||
{ 0x2BB2, 0x2218, 0x10de, "NVIDIA RTX PRO 6000D Blackwell Workstation Edition" },
|
||||
{ 0x2BB2, 0x2218, 0x17aa, "NVIDIA RTX PRO 6000D Blackwell Workstation Edition" },
|
||||
{ 0x2BB3, 0x204d, 0x1028, "NVIDIA RTX PRO 5000 Blackwell" },
|
||||
{ 0x2BB3, 0x204d, 0x103c, "NVIDIA RTX PRO 5000 Blackwell" },
|
||||
{ 0x2BB3, 0x204d, 0x10de, "NVIDIA RTX PRO 5000 Blackwell" },
|
||||
@@ -5437,10 +5433,6 @@ static const CHIPS_RELEASED sChipsReleased[] = {
|
||||
{ 0x2BB4, 0x204c, 0x17aa, "NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition" },
|
||||
{ 0x2BB5, 0x204e, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Server Edition" },
|
||||
{ 0x2BB9, 0x2091, 0x10de, "NVIDIA RTX 6000D" },
|
||||
{ 0x2BBC, 0x2219, 0x1028, "NVIDIA RTX PRO 6000D Blackwell Max-Q Workstation Edition" },
|
||||
{ 0x2BBC, 0x2219, 0x103c, "NVIDIA RTX PRO 6000D Blackwell Max-Q Workstation Edition" },
|
||||
{ 0x2BBC, 0x2219, 0x10de, "NVIDIA RTX PRO 6000D Blackwell Max-Q Workstation Edition" },
|
||||
{ 0x2BBC, 0x2219, 0x17aa, "NVIDIA RTX PRO 6000D Blackwell Max-Q Workstation Edition" },
|
||||
{ 0x2C02, 0x0000, 0x0000, "NVIDIA GeForce RTX 5080" },
|
||||
{ 0x2C05, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti" },
|
||||
{ 0x2C18, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 Laptop GPU" },
|
||||
@@ -5461,6 +5453,8 @@ static const CHIPS_RELEASED sChipsReleased[] = {
|
||||
{ 0x2C39, 0x0000, 0x0000, "NVIDIA RTX PRO 4000 Blackwell Generation Laptop GPU" },
|
||||
{ 0x2C58, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 Laptop GPU" },
|
||||
{ 0x2C59, 0x0000, 0x0000, "NVIDIA GeForce RTX 5080 Laptop GPU" },
|
||||
{ 0x2C77, 0x0000, 0x0000, "NVIDIA RTX PRO 5000 Blackwell Embedded GPU" },
|
||||
{ 0x2C79, 0x0000, 0x0000, "NVIDIA RTX PRO 4000 Blackwell Embedded GPU" },
|
||||
{ 0x2D04, 0x0000, 0x0000, "NVIDIA GeForce RTX 5060 Ti" },
|
||||
{ 0x2D05, 0x0000, 0x0000, "NVIDIA GeForce RTX 5060" },
|
||||
{ 0x2D18, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Laptop GPU" },
|
||||
@@ -5472,11 +5466,13 @@ static const CHIPS_RELEASED sChipsReleased[] = {
|
||||
{ 0x2D39, 0x0000, 0x0000, "NVIDIA RTX PRO 2000 Blackwell Generation Laptop GPU" },
|
||||
{ 0x2D58, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Laptop GPU" },
|
||||
{ 0x2D59, 0x0000, 0x0000, "NVIDIA GeForce RTX 5060 Laptop GPU" },
|
||||
{ 0x2D79, 0x0000, 0x0000, "NVIDIA RTX PRO 2000 Blackwell Embedded GPU" },
|
||||
{ 0x2D83, 0x0000, 0x0000, "NVIDIA GeForce RTX 5050" },
|
||||
{ 0x2D98, 0x0000, 0x0000, "NVIDIA GeForce RTX 5050 Laptop GPU" },
|
||||
{ 0x2DB8, 0x0000, 0x0000, "NVIDIA RTX PRO 1000 Blackwell Generation Laptop GPU" },
|
||||
{ 0x2DB9, 0x0000, 0x0000, "NVIDIA RTX PRO 500 Blackwell Generation Laptop GPU" },
|
||||
{ 0x2DD8, 0x0000, 0x0000, "NVIDIA GeForce RTX 5050 Laptop GPU" },
|
||||
{ 0x2DF9, 0x0000, 0x0000, "NVIDIA RTX PRO 500 Blackwell Embedded GPU" },
|
||||
{ 0x2F04, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070" },
|
||||
{ 0x2F18, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti Laptop GPU" },
|
||||
{ 0x2F38, 0x0000, 0x0000, "NVIDIA RTX PRO 3000 Blackwell Generation Laptop GPU" },
|
||||
|
||||
@@ -215,6 +215,11 @@ typedef struct RM_PAGEABLE_SECTION {
|
||||
#define OS_ALLOC_PAGES_NODE_NONE 0x0
|
||||
#define OS_ALLOC_PAGES_NODE_SKIP_RECLAIM 0x1
|
||||
|
||||
// Flags needed by osGetCurrentProccessFlags
|
||||
#define OS_CURRENT_PROCESS_FLAG_NONE 0x0
|
||||
#define OS_CURRENT_PROCESS_FLAG_KERNEL_THREAD 0x1
|
||||
#define OS_CURRENT_PROCESS_FLAG_EXITING 0x2
|
||||
|
||||
//
|
||||
// Structures for osPackageRegistry and osUnpackageRegistry
|
||||
//
|
||||
@@ -737,6 +742,8 @@ NvS32 osImexChannelCount(void);
|
||||
|
||||
NV_STATUS osGetRandomBytes(NvU8 *pBytes, NvU16 numBytes);
|
||||
|
||||
NvU32 osGetCurrentProcessFlags(void);
|
||||
|
||||
NV_STATUS osAllocWaitQueue(OS_WAIT_QUEUE **ppWq);
|
||||
void osFreeWaitQueue(OS_WAIT_QUEUE *pWq);
|
||||
void osWaitUninterruptible(OS_WAIT_QUEUE *pWq);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -155,7 +155,7 @@ struct Subdevice {
|
||||
struct Notifier *__nvoc_pbase_Notifier; // notify super
|
||||
struct Subdevice *__nvoc_pbase_Subdevice; // subdevice
|
||||
|
||||
// Vtable with 49 per-object function pointers
|
||||
// Vtable with 50 per-object function pointers
|
||||
NV_STATUS (*__subdeviceCtrlCmdBiosGetInfoV2__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_INFO_V2_PARAMS *); // halified (2 hals) exported (id=0x20800810) body
|
||||
NV_STATUS (*__subdeviceCtrlCmdBiosGetSKUInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS *); // halified (2 hals) exported (id=0x20800808)
|
||||
NV_STATUS (*__subdeviceCtrlCmdBiosGetPostTime__)(struct Subdevice * /*this*/, NV2080_CTRL_CMD_BIOS_GET_POST_TIME_PARAMS *); // halified (2 hals) exported (id=0x20800809) body
|
||||
@@ -186,6 +186,7 @@ struct Subdevice {
|
||||
NV_STATUS (*__subdeviceCtrlCmdFifoDisableChannelsForKeyRotation__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_PARAMS *); // halified (2 hals) exported (id=0x2080111a) body
|
||||
NV_STATUS (*__subdeviceCtrlCmdFifoDisableChannelsForKeyRotationV2__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_DISABLE_CHANNELS_FOR_KEY_ROTATION_V2_PARAMS *); // halified (2 hals) exported (id=0x2080111b) body
|
||||
NV_STATUS (*__subdeviceCtrlCmdFifoObjschedGetCaps__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_OBJSCHED_GET_CAPS_PARAMS *); // halified (2 hals) exported (id=0x20801122) body
|
||||
NV_STATUS (*__subdeviceCtrlCmdFifoConfigCtxswTimeout__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_CONFIG_CTXSW_TIMEOUT_PARAMS *); // halified (2 hals) exported (id=0x20801110) body
|
||||
NV_STATUS (*__subdeviceCtrlCmdFifoGetDeviceInfoTable__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *); // halified (2 hals) exported (id=0x20801112) body
|
||||
NV_STATUS (*__subdeviceCtrlCmdFifoUpdateChannelInfo__)(struct Subdevice * /*this*/, NV2080_CTRL_FIFO_UPDATE_CHANNEL_INFO_PARAMS *); // halified (2 hals) exported (id=0x20801116) body
|
||||
NV_STATUS (*__subdeviceCtrlCmdKGrCtxswPmMode__)(struct Subdevice * /*this*/, NV2080_CTRL_GR_CTXSW_PM_MODE_PARAMS *); // halified (2 hals) exported (id=0x20801207) body
|
||||
@@ -6410,6 +6411,9 @@ static inline NV_STATUS subdeviceSpdmRetrieveTranscript(struct Subdevice *pSubde
|
||||
#define subdeviceCtrlCmdFifoObjschedGetCaps_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoObjschedGetCaps__
|
||||
#define subdeviceCtrlCmdFifoObjschedGetCaps(pSubdevice, pParams) subdeviceCtrlCmdFifoObjschedGetCaps_DISPATCH(pSubdevice, pParams)
|
||||
#define subdeviceCtrlCmdFifoObjschedGetCaps_HAL(pSubdevice, pParams) subdeviceCtrlCmdFifoObjschedGetCaps_DISPATCH(pSubdevice, pParams)
|
||||
#define subdeviceCtrlCmdFifoConfigCtxswTimeout_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoConfigCtxswTimeout__
|
||||
#define subdeviceCtrlCmdFifoConfigCtxswTimeout(pSubdevice, pParams) subdeviceCtrlCmdFifoConfigCtxswTimeout_DISPATCH(pSubdevice, pParams)
|
||||
#define subdeviceCtrlCmdFifoConfigCtxswTimeout_HAL(pSubdevice, pParams) subdeviceCtrlCmdFifoConfigCtxswTimeout_DISPATCH(pSubdevice, pParams)
|
||||
#define subdeviceCtrlCmdFifoGetDeviceInfoTable_FNPTR(pSubdevice) pSubdevice->__subdeviceCtrlCmdFifoGetDeviceInfoTable__
|
||||
#define subdeviceCtrlCmdFifoGetDeviceInfoTable(pSubdevice, pParams) subdeviceCtrlCmdFifoGetDeviceInfoTable_DISPATCH(pSubdevice, pParams)
|
||||
#define subdeviceCtrlCmdFifoGetDeviceInfoTable_HAL(pSubdevice, pParams) subdeviceCtrlCmdFifoGetDeviceInfoTable_DISPATCH(pSubdevice, pParams)
|
||||
@@ -6655,6 +6659,10 @@ static inline NV_STATUS subdeviceCtrlCmdFifoObjschedGetCaps_DISPATCH(struct Subd
|
||||
return pSubdevice->__subdeviceCtrlCmdFifoObjschedGetCaps__(pSubdevice, pParams);
|
||||
}
|
||||
|
||||
static inline NV_STATUS subdeviceCtrlCmdFifoConfigCtxswTimeout_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_CONFIG_CTXSW_TIMEOUT_PARAMS *pParams) {
|
||||
return pSubdevice->__subdeviceCtrlCmdFifoConfigCtxswTimeout__(pSubdevice, pParams);
|
||||
}
|
||||
|
||||
static inline NV_STATUS subdeviceCtrlCmdFifoGetDeviceInfoTable_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams) {
|
||||
return pSubdevice->__subdeviceCtrlCmdFifoGetDeviceInfoTable__(pSubdevice, pParams);
|
||||
}
|
||||
@@ -7426,6 +7434,14 @@ NV_STATUS subdeviceCtrlCmdFifoGetChannelGroupUniqueIdInfo_IMPL(struct Subdevice
|
||||
|
||||
NV_STATUS subdeviceCtrlCmdFifoQueryChannelUniqueId_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_QUERY_CHANNEL_UNIQUE_ID_PARAMS *pQueryChannelUidParams);
|
||||
|
||||
static inline NV_STATUS subdeviceCtrlCmdFifoConfigCtxswTimeout_56cd7a(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_CONFIG_CTXSW_TIMEOUT_PARAMS *pParams) {
|
||||
return NV_OK;
|
||||
}
|
||||
|
||||
static inline NV_STATUS subdeviceCtrlCmdFifoConfigCtxswTimeout_5baef9(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_CONFIG_CTXSW_TIMEOUT_PARAMS *pParams) {
|
||||
NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED);
|
||||
}
|
||||
|
||||
NV_STATUS subdeviceCtrlCmdFifoGetDeviceInfoTable_VF(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams);
|
||||
|
||||
static inline NV_STATUS subdeviceCtrlCmdFifoGetDeviceInfoTable_92bfc3(struct Subdevice *pSubdevice, NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *pParams) {
|
||||
|
||||
206
src/nvidia/generated/g_sysmem_scrub_nvoc.c
Normal file
206
src/nvidia/generated/g_sysmem_scrub_nvoc.c
Normal file
@@ -0,0 +1,206 @@
|
||||
#define NVOC_SYSMEM_SCRUB_H_PRIVATE_ACCESS_ALLOWED
|
||||
|
||||
// Version of generated metadata structures
|
||||
#ifdef NVOC_METADATA_VERSION
|
||||
#undef NVOC_METADATA_VERSION
|
||||
#endif
|
||||
#define NVOC_METADATA_VERSION 2
|
||||
|
||||
#include "nvoc/runtime.h"
|
||||
#include "nvoc/rtti.h"
|
||||
#include "nvtypes.h"
|
||||
#include "nvport/nvport.h"
|
||||
#include "nvport/inline/util_valist.h"
|
||||
#include "utils/nvassert.h"
|
||||
#include "g_sysmem_scrub_nvoc.h"
|
||||
|
||||
|
||||
#ifdef DEBUG
|
||||
char __nvoc_class_id_uniqueness_check__0x266962 = 1;
|
||||
#endif
|
||||
|
||||
extern const struct NVOC_CLASS_DEF __nvoc_class_def_SysmemScrubber;
|
||||
extern const struct NVOC_CLASS_DEF __nvoc_class_def_Object;
|
||||
|
||||
// Forward declarations for SysmemScrubber
|
||||
void __nvoc_init__Object(Object*);
|
||||
void __nvoc_init__SysmemScrubber(SysmemScrubber*);
|
||||
void __nvoc_init_funcTable_SysmemScrubber(SysmemScrubber*);
|
||||
NV_STATUS __nvoc_ctor_SysmemScrubber(SysmemScrubber*, struct OBJGPU *arg_pGpu);
|
||||
void __nvoc_init_dataField_SysmemScrubber(SysmemScrubber*);
|
||||
void __nvoc_dtor_SysmemScrubber(SysmemScrubber*);
|
||||
|
||||
// Structures used within RTTI (run-time type information)
|
||||
extern const struct NVOC_CASTINFO __nvoc_castinfo__SysmemScrubber;
|
||||
extern const struct NVOC_EXPORT_INFO __nvoc_export_info__SysmemScrubber;
|
||||
|
||||
// Down-thunk(s) to bridge SysmemScrubber methods from ancestors (if any)
|
||||
|
||||
// Up-thunk(s) to bridge SysmemScrubber methods to ancestors (if any)
|
||||
|
||||
const struct NVOC_CLASS_DEF __nvoc_class_def_SysmemScrubber =
|
||||
{
|
||||
/*classInfo=*/ {
|
||||
/*size=*/ sizeof(SysmemScrubber),
|
||||
/*classId=*/ classId(SysmemScrubber),
|
||||
/*providerId=*/ &__nvoc_rtti_provider,
|
||||
#if NV_PRINTF_STRINGS_ALLOWED
|
||||
/*name=*/ "SysmemScrubber",
|
||||
#endif
|
||||
},
|
||||
/*objCreatefn=*/ (NVOC_DYNAMIC_OBJ_CREATE) &__nvoc_objCreateDynamic_SysmemScrubber,
|
||||
/*pCastInfo=*/ &__nvoc_castinfo__SysmemScrubber,
|
||||
/*pExportInfo=*/ &__nvoc_export_info__SysmemScrubber
|
||||
};
|
||||
|
||||
|
||||
// Metadata with per-class RTTI with ancestor(s)
|
||||
static const struct NVOC_METADATA__SysmemScrubber __nvoc_metadata__SysmemScrubber = {
|
||||
.rtti.pClassDef = &__nvoc_class_def_SysmemScrubber, // (sysmemscrub) this
|
||||
.rtti.dtor = (NVOC_DYNAMIC_DTOR) &__nvoc_dtor_SysmemScrubber,
|
||||
.rtti.offset = 0,
|
||||
.metadata__Object.rtti.pClassDef = &__nvoc_class_def_Object, // (obj) super
|
||||
.metadata__Object.rtti.dtor = &__nvoc_destructFromBase,
|
||||
.metadata__Object.rtti.offset = NV_OFFSETOF(SysmemScrubber, __nvoc_base_Object),
|
||||
};
|
||||
|
||||
|
||||
// Dynamic down-casting information
|
||||
const struct NVOC_CASTINFO __nvoc_castinfo__SysmemScrubber = {
|
||||
.numRelatives = 2,
|
||||
.relatives = {
|
||||
&__nvoc_metadata__SysmemScrubber.rtti, // [0]: (sysmemscrub) this
|
||||
&__nvoc_metadata__SysmemScrubber.metadata__Object.rtti, // [1]: (obj) super
|
||||
}
|
||||
};
|
||||
|
||||
const struct NVOC_EXPORT_INFO __nvoc_export_info__SysmemScrubber =
|
||||
{
|
||||
/*numEntries=*/ 0,
|
||||
/*pExportEntries=*/ 0
|
||||
};
|
||||
|
||||
void __nvoc_sysmemscrubDestruct(SysmemScrubber*);
|
||||
void __nvoc_dtor_Object(Object*);
|
||||
void __nvoc_dtor_SysmemScrubber(SysmemScrubber *pThis) {
|
||||
__nvoc_sysmemscrubDestruct(pThis);
|
||||
__nvoc_dtor_Object(&pThis->__nvoc_base_Object);
|
||||
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||
}
|
||||
|
||||
void __nvoc_init_dataField_SysmemScrubber(SysmemScrubber *pThis) {
|
||||
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||
}
|
||||
|
||||
NV_STATUS __nvoc_ctor_Object(Object* );
|
||||
NV_STATUS __nvoc_ctor_SysmemScrubber(SysmemScrubber *pThis, struct OBJGPU * arg_pGpu) {
|
||||
NV_STATUS status = NV_OK;
|
||||
status = __nvoc_ctor_Object(&pThis->__nvoc_base_Object);
|
||||
if (status != NV_OK) goto __nvoc_ctor_SysmemScrubber_fail_Object;
|
||||
__nvoc_init_dataField_SysmemScrubber(pThis);
|
||||
|
||||
status = __nvoc_sysmemscrubConstruct(pThis, arg_pGpu);
|
||||
if (status != NV_OK) goto __nvoc_ctor_SysmemScrubber_fail__init;
|
||||
goto __nvoc_ctor_SysmemScrubber_exit; // Success
|
||||
|
||||
__nvoc_ctor_SysmemScrubber_fail__init:
|
||||
__nvoc_dtor_Object(&pThis->__nvoc_base_Object);
|
||||
__nvoc_ctor_SysmemScrubber_fail_Object:
|
||||
__nvoc_ctor_SysmemScrubber_exit:
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
// Vtable initialization
|
||||
static void __nvoc_init_funcTable_SysmemScrubber_1(SysmemScrubber *pThis) {
|
||||
PORT_UNREFERENCED_VARIABLE(pThis);
|
||||
} // End __nvoc_init_funcTable_SysmemScrubber_1
|
||||
|
||||
|
||||
// Initialize vtable(s): Nothing to do for empty vtables
|
||||
void __nvoc_init_funcTable_SysmemScrubber(SysmemScrubber *pThis) {
|
||||
__nvoc_init_funcTable_SysmemScrubber_1(pThis);
|
||||
}
|
||||
|
||||
// Initialize newly constructed object.
|
||||
void __nvoc_init__SysmemScrubber(SysmemScrubber *pThis) {
|
||||
|
||||
// Initialize pointers to inherited data.
|
||||
pThis->__nvoc_pbase_Object = &pThis->__nvoc_base_Object; // (obj) super
|
||||
pThis->__nvoc_pbase_SysmemScrubber = pThis; // (sysmemscrub) this
|
||||
|
||||
// Recurse to superclass initialization function(s).
|
||||
__nvoc_init__Object(&pThis->__nvoc_base_Object);
|
||||
|
||||
// Pointer(s) to metadata structures(s)
|
||||
pThis->__nvoc_base_Object.__nvoc_metadata_ptr = &__nvoc_metadata__SysmemScrubber.metadata__Object; // (obj) super
|
||||
pThis->__nvoc_metadata_ptr = &__nvoc_metadata__SysmemScrubber; // (sysmemscrub) this
|
||||
|
||||
// Initialize per-object vtables.
|
||||
__nvoc_init_funcTable_SysmemScrubber(pThis);
|
||||
}
|
||||
|
||||
NV_STATUS __nvoc_objCreate_SysmemScrubber(SysmemScrubber **ppThis, Dynamic *pParent, NvU32 createFlags, struct OBJGPU * arg_pGpu)
|
||||
{
|
||||
NV_STATUS status;
|
||||
Object *pParentObj = NULL;
|
||||
SysmemScrubber *pThis;
|
||||
|
||||
// Assign `pThis`, allocating memory unless suppressed by flag.
|
||||
status = __nvoc_handleObjCreateMemAlloc(createFlags, sizeof(SysmemScrubber), (void**)&pThis, (void**)ppThis);
|
||||
if (status != NV_OK)
|
||||
return status;
|
||||
|
||||
// Zero is the initial value for everything.
|
||||
portMemSet(pThis, 0, sizeof(SysmemScrubber));
|
||||
|
||||
pThis->__nvoc_base_Object.createFlags = createFlags;
|
||||
|
||||
// Link the child into the parent if there is one unless flagged not to do so.
|
||||
if (pParent != NULL && !(createFlags & NVOC_OBJ_CREATE_FLAGS_PARENT_HALSPEC_ONLY))
|
||||
{
|
||||
pParentObj = dynamicCast(pParent, Object);
|
||||
objAddChild(pParentObj, &pThis->__nvoc_base_Object);
|
||||
}
|
||||
else
|
||||
{
|
||||
pThis->__nvoc_base_Object.pParent = NULL;
|
||||
}
|
||||
|
||||
__nvoc_init__SysmemScrubber(pThis);
|
||||
status = __nvoc_ctor_SysmemScrubber(pThis, arg_pGpu);
|
||||
if (status != NV_OK) goto __nvoc_objCreate_SysmemScrubber_cleanup;
|
||||
|
||||
// Assignment has no effect if NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT is set.
|
||||
*ppThis = pThis;
|
||||
|
||||
return NV_OK;
|
||||
|
||||
__nvoc_objCreate_SysmemScrubber_cleanup:
|
||||
|
||||
// Unlink the child from the parent if it was linked above.
|
||||
if (pParentObj != NULL)
|
||||
objRemoveChild(pParentObj, &pThis->__nvoc_base_Object);
|
||||
|
||||
// Do not call destructors here since the constructor already called them.
|
||||
if (createFlags & NVOC_OBJ_CREATE_FLAGS_IN_PLACE_CONSTRUCT)
|
||||
portMemSet(pThis, 0, sizeof(SysmemScrubber));
|
||||
else
|
||||
{
|
||||
portMemFree(pThis);
|
||||
*ppThis = NULL;
|
||||
}
|
||||
|
||||
// coverity[leaked_storage:FALSE]
|
||||
return status;
|
||||
}
|
||||
|
||||
NV_STATUS __nvoc_objCreateDynamic_SysmemScrubber(SysmemScrubber **ppThis, Dynamic *pParent, NvU32 createFlags, va_list args) {
|
||||
NV_STATUS status;
|
||||
struct OBJGPU * arg_pGpu = va_arg(args, struct OBJGPU *);
|
||||
|
||||
status = __nvoc_objCreate_SysmemScrubber(ppThis, pParent, createFlags, arg_pGpu);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
203
src/nvidia/generated/g_sysmem_scrub_nvoc.h
Normal file
203
src/nvidia/generated/g_sysmem_scrub_nvoc.h
Normal file
@@ -0,0 +1,203 @@
|
||||
|
||||
#ifndef _G_SYSMEM_SCRUB_NVOC_H_
|
||||
#define _G_SYSMEM_SCRUB_NVOC_H_
|
||||
|
||||
// Version of generated metadata structures
|
||||
#ifdef NVOC_METADATA_VERSION
|
||||
#undef NVOC_METADATA_VERSION
|
||||
#endif
|
||||
#define NVOC_METADATA_VERSION 2
|
||||
|
||||
#include "nvoc/runtime.h"
|
||||
#include "nvoc/rtti.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
#include "g_sysmem_scrub_nvoc.h"
|
||||
|
||||
#ifndef SYSMEM_SCRUB_H
|
||||
#define SYSMEM_SCRUB_H
|
||||
|
||||
#include "core/core.h"
|
||||
#include "gpu/gpu.h"
|
||||
|
||||
|
||||
struct CeUtils;
|
||||
|
||||
#ifndef __NVOC_CLASS_CeUtils_TYPEDEF__
|
||||
#define __NVOC_CLASS_CeUtils_TYPEDEF__
|
||||
typedef struct CeUtils CeUtils;
|
||||
#endif /* __NVOC_CLASS_CeUtils_TYPEDEF__ */
|
||||
|
||||
#ifndef __nvoc_class_id_CeUtils
|
||||
#define __nvoc_class_id_CeUtils 0x8b8bae
|
||||
#endif /* __nvoc_class_id_CeUtils */
|
||||
|
||||
|
||||
|
||||
struct SysmemScrubber;
|
||||
|
||||
#ifndef __NVOC_CLASS_SysmemScrubber_TYPEDEF__
|
||||
#define __NVOC_CLASS_SysmemScrubber_TYPEDEF__
|
||||
typedef struct SysmemScrubber SysmemScrubber;
|
||||
#endif /* __NVOC_CLASS_SysmemScrubber_TYPEDEF__ */
|
||||
|
||||
#ifndef __nvoc_class_id_SysmemScrubber
|
||||
#define __nvoc_class_id_SysmemScrubber 0x266962
|
||||
#endif /* __nvoc_class_id_SysmemScrubber */
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
MEMORY_DESCRIPTOR *pMemDesc;
|
||||
NvU64 semaphoreValue;
|
||||
NODE listNode;
|
||||
} SysScrubEntry;
|
||||
|
||||
MAKE_INTRUSIVE_LIST(SysScrubList, SysScrubEntry, listNode);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
// semaphore event handle doesn't take GPU lock
|
||||
PORT_SPINLOCK *pSpinlock;
|
||||
|
||||
// spinlock needs to be taken to use pSysmemScrubber
|
||||
struct SysmemScrubber *pSysmemScrubber;
|
||||
|
||||
NvU32 refCount;
|
||||
NvU32 bWorkerQueued;
|
||||
} SysmemScrubberWorkerParams;
|
||||
|
||||
|
||||
// Private field names are wrapped in PRIVATE_FIELD, which does nothing for
|
||||
// the matching C source file, but causes diagnostics to be issued if another
|
||||
// source file references the field.
|
||||
#ifdef NVOC_SYSMEM_SCRUB_H_PRIVATE_ACCESS_ALLOWED
|
||||
#define PRIVATE_FIELD(x) x
|
||||
#else
|
||||
#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
|
||||
#endif
|
||||
|
||||
|
||||
// Metadata with per-class RTTI with ancestor(s)
|
||||
struct NVOC_METADATA__SysmemScrubber;
|
||||
struct NVOC_METADATA__Object;
|
||||
|
||||
|
||||
struct SysmemScrubber {
|
||||
|
||||
// Metadata starts with RTTI structure.
|
||||
union {
|
||||
const struct NVOC_METADATA__SysmemScrubber *__nvoc_metadata_ptr;
|
||||
const struct NVOC_RTTI *__nvoc_rtti;
|
||||
};
|
||||
|
||||
// Parent (i.e. superclass or base class) objects
|
||||
struct Object __nvoc_base_Object;
|
||||
|
||||
// Ancestor object pointers for `staticCast` feature
|
||||
struct Object *__nvoc_pbase_Object; // obj super
|
||||
struct SysmemScrubber *__nvoc_pbase_SysmemScrubber; // sysmemscrub
|
||||
|
||||
// Data members
|
||||
struct OBJGPU *pGpu;
|
||||
struct CeUtils *pCeUtils;
|
||||
SysScrubList asyncScrubList;
|
||||
NvBool bAsync;
|
||||
SysmemScrubberWorkerParams *pWorkerParams;
|
||||
};
|
||||
|
||||
|
||||
// Metadata with per-class RTTI with ancestor(s)
|
||||
struct NVOC_METADATA__SysmemScrubber {
|
||||
const struct NVOC_RTTI rtti;
|
||||
const struct NVOC_METADATA__Object metadata__Object;
|
||||
};
|
||||
|
||||
#ifndef __NVOC_CLASS_SysmemScrubber_TYPEDEF__
|
||||
#define __NVOC_CLASS_SysmemScrubber_TYPEDEF__
|
||||
typedef struct SysmemScrubber SysmemScrubber;
|
||||
#endif /* __NVOC_CLASS_SysmemScrubber_TYPEDEF__ */
|
||||
|
||||
#ifndef __nvoc_class_id_SysmemScrubber
|
||||
#define __nvoc_class_id_SysmemScrubber 0x266962
|
||||
#endif /* __nvoc_class_id_SysmemScrubber */
|
||||
|
||||
// Casting support
|
||||
extern const struct NVOC_CLASS_DEF __nvoc_class_def_SysmemScrubber;
|
||||
|
||||
#define __staticCast_SysmemScrubber(pThis) \
|
||||
((pThis)->__nvoc_pbase_SysmemScrubber)
|
||||
|
||||
#ifdef __nvoc_sysmem_scrub_h_disabled
|
||||
#define __dynamicCast_SysmemScrubber(pThis) ((SysmemScrubber*) NULL)
|
||||
#else //__nvoc_sysmem_scrub_h_disabled
|
||||
#define __dynamicCast_SysmemScrubber(pThis) \
|
||||
((SysmemScrubber*) __nvoc_dynamicCast(staticCast((pThis), Dynamic), classInfo(SysmemScrubber)))
|
||||
#endif //__nvoc_sysmem_scrub_h_disabled
|
||||
|
||||
NV_STATUS __nvoc_objCreateDynamic_SysmemScrubber(SysmemScrubber**, Dynamic*, NvU32, va_list);
|
||||
|
||||
NV_STATUS __nvoc_objCreate_SysmemScrubber(SysmemScrubber**, Dynamic*, NvU32, struct OBJGPU *arg_pGpu);
|
||||
#define __objCreate_SysmemScrubber(ppNewObj, pParent, createFlags, arg_pGpu) \
|
||||
__nvoc_objCreate_SysmemScrubber((ppNewObj), staticCast((pParent), Dynamic), (createFlags), arg_pGpu)
|
||||
|
||||
|
||||
// Wrapper macros for implementation functions
|
||||
NV_STATUS sysmemscrubConstruct_IMPL(struct SysmemScrubber *arg_pSysmemScrubber, struct OBJGPU *arg_pGpu);
|
||||
#define __nvoc_sysmemscrubConstruct(arg_pSysmemScrubber, arg_pGpu) sysmemscrubConstruct_IMPL(arg_pSysmemScrubber, arg_pGpu)
|
||||
|
||||
NV_STATUS sysmemscrubScrubAndFree_IMPL(struct SysmemScrubber *pSysmemScrubber, MEMORY_DESCRIPTOR *pMemDesc);
|
||||
#ifdef __nvoc_sysmem_scrub_h_disabled
|
||||
static inline NV_STATUS sysmemscrubScrubAndFree(struct SysmemScrubber *pSysmemScrubber, MEMORY_DESCRIPTOR *pMemDesc) {
|
||||
NV_ASSERT_FAILED_PRECOMP("SysmemScrubber was disabled!");
|
||||
return NV_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
#else // __nvoc_sysmem_scrub_h_disabled
|
||||
#define sysmemscrubScrubAndFree(pSysmemScrubber, pMemDesc) sysmemscrubScrubAndFree_IMPL(pSysmemScrubber, pMemDesc)
|
||||
#endif // __nvoc_sysmem_scrub_h_disabled
|
||||
|
||||
void sysmemscrubDestruct_IMPL(struct SysmemScrubber *pSysmemScrubber);
|
||||
#define __nvoc_sysmemscrubDestruct(pSysmemScrubber) sysmemscrubDestruct_IMPL(pSysmemScrubber)
|
||||
|
||||
|
||||
// Wrapper macros for halified functions
|
||||
|
||||
// Dispatch functions
|
||||
#undef PRIVATE_FIELD
|
||||
|
||||
|
||||
#endif // SYSMEM_SCRUB_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
} // extern "C"
|
||||
#endif
|
||||
|
||||
#endif // _G_SYSMEM_SCRUB_NVOC_H_
|
||||
Reference in New Issue
Block a user