mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-28 10:53:59 +00:00
Bernhard Stoeckner
committed by
Gaurav Juvekar
Gaurav Juvekar
parent
caa2dd11a0
commit
3084c04453
@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -106,7 +106,9 @@
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* NV0073_CTRL_DFP_FLAGS_DSI_DEVICE_ID
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* This indicates whether this SOR uses DSI-A, DSI-B or both (ganged mode).
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* NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE
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* This indicates whether this DFP supports Dynamic MUX
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* This indicates whether this DFP supports DDS (NV dynamic display mux).
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* NV0073_CTRL_DFP_FLAGS_MDM
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* This indicates whether this DFP supports MDM (Microsoft dynamic display mux).
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* UHBRSupportedByDfp
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* Bitmask to specify the UHBR link rates supported by this dfp.
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*
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@@ -194,6 +196,9 @@ typedef struct NV0073_CTRL_DFP_GET_INFO_PARAMS {
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#define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE 30:30
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#define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE_FALSE (0x00000000U)
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#define NV0073_CTRL_DFP_FLAGS_DYNAMIC_MUX_CAPABLE_TRUE (0x00000001U)
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#define NV0073_CTRL_DFP_FLAGS_MDM 31:31
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#define NV0073_CTRL_DFP_FLAGS_MDM_DISABLED (0x00000000U)
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#define NV0073_CTRL_DFP_FLAGS_MDM_ENABLED (0x00000001U)
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@@ -1287,6 +1292,140 @@ typedef struct NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS {
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/*
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* NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA
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*
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* This structure describes diagnostic information about display power
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* gating entry sequence
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*
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* totalRmEntryLatencyUs
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* Duration in microseconds that RM took to service 'Enter
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* Display Power Gating' command. This includes time for all
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* steps that RM performs as part of display power gating entry
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* sequence including the below parameters.
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* hwOkToGateLatencyUs
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* Duration in microseconds that HW took to assert ok_to_gate.
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* Only valid when displayId is not equal to 0xFFFFFFFF
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* jadeApiLatencyUs
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* Duration in microseconds that Jade took to service 'Enter
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* Display Power Gating' command
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*
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*/
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typedef struct NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA {
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NvU32 totalRmEntryLatencyUs;
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NvU32 hwOkToGateLatencyUs;
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NvU32 jadeEntryApiLatencyUs;
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} NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA;
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/*
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* NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING
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*
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* This command can be used to enter display power gating with an option to
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* save-restore settings for the specified displayId.
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*
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* subDeviceInstance
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* This parameter specifies the subdevice instance within the
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* NV04_DISPLAY_COMMON parent device to which the operation should be
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* directed. This parameter must specify a value between zero and the
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* total number of subdevices within the parent device. This parameter
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* should be set to zero for default behavior.
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* displayId
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* This parameter specifies the ID of the display for which the state
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* needs to be saved-restored during exit of Display Power Gating.
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* The display ID must be a dfp display as determined with the
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* NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command. If more than one
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* displayId bit is set or the displayId is not a dfp, this call will
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* return NV_ERR_INVALID_ARGUMENT. For the case where no save-restore
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* is needed, displayId should be set to 0xFFFFFFFF.
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* flags
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* This parameter specifies special request from client for RM(for future use)
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* diagnosticData
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* This parameter provides diagnostic information about display power
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* gating entry sequence
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*
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* Possible status values returned are:
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* NV_OK - If Display Power Gating Entry was successful
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* NV_ERR_GENERIC - If Display Power Gating Entry failed
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* NV_ERR_INVALID_ARGUMENT - If incorrect parameters are sent
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*/
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#define NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING (0x731174U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID (0x74U)
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typedef struct NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS {
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NvU32 subDeviceInstance;
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NvU32 displayId;
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NvU32 flag;
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NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA diagnosticData;
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} NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING_PARAMS;
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#define NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_FLAGS_RESERVED 31:0
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#define NV0073_CTRL_DFP_ENTER_DISPLAY_POWER_GATING_FLAGS_RESERVED_INIT (0x00000000U)
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/*
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* NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA
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*
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* This structure describes diagnostic information about display power
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* gating exit sequence
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*
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* totalRmExitLatencyUs
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* Duration in microseconds that RM took to service 'Exit
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* Display Power Gating' command. This includes time for all
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* steps that RM performs as part of display power gating exit
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* sequence including the below parameters.
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* riscvBootupLatencyUs
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* Duration in microseconds that LTM RISCV took to bootup.
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* jadeExitApiLatencyUs
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* Duration in microseconds that Jade took to service 'Exit
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* Display Power Gating' command
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*
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*/
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typedef struct NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA {
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NvU32 totalRmExitLatencyUs;
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NvU32 riscvBootupLatencyUs;
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NvU32 jadeExitApiLatencyUs;
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} NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA;
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/*
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* NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING
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*
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* This command can be used to exit display power gating. If preceding
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* NV0073_CTRL_CMD_DFP_ENTER_DISPLAY_POWER_GATING command requested for
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* save-restore of settings for a particular displayId then this command
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* will restore settings for that displayId.
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*
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* subDeviceInstance
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* This parameter specifies the subdevice instance within the
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* NV04_DISPLAY_COMMON parent device to which the operation should be
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* directed. This parameter must specify a value between zero and the
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* total number of subdevices within the parent device. This parameter
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* should be set to zero for default behavior.
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* flags
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* This parameter specifies special request from client for RM(for future use)
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* diagnosticData
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* This parameter provides diagnostic information about display power
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* gating exit sequence
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*
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* Possible status values returned are:
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* NV_OK - When Display Power Gating Exit was successful
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* NV_ERR_GENERIC - When Display Power Gating Exit failed
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* NV_ERR_INVALID_ARGUMENT - When incorrect parameters are sent
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*/
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#define NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING (0x731175U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS_MESSAGE_ID (0x75U)
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typedef struct NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS {
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NvU32 subDeviceInstance;
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NvU32 flag;
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NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_DIAGNOSTIC_DATA diagnosticData;
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} NV0073_CTRL_CMD_DFP_EXIT_DISPLAY_POWER_GATING_PARAMS;
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#define NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_FLAGS_RESERVED 31:0
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#define NV0073_CTRL_DFP_EXIT_DISPLAY_POWER_GATING_FLAGS_RESERVED_INIT (0x00000000U)
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/*
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* NV0073_CTRL_CMD_DFP_EDP_DRIVER_UNLOAD
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*
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@@ -1307,9 +1446,9 @@ typedef struct NV0073_CTRL_DFP_GET_FIXED_MODE_TIMING_PARAMS {
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* NV_ERR_INVALID_ARGUMENT
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* NV_ERR_NOT_SUPPORTED
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*/
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#define NV0073_CTRL_CMD_DFP_EDP_DRIVER_UNLOAD (0x731174U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_CMD_DFP_EDP_DRIVER_UNLOAD (0x731176U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID (0x74U)
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#define NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS_MESSAGE_ID (0x76U)
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typedef struct NV0073_CTRL_DFP_EDP_DRIVER_UNLOAD_PARAMS {
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NvU32 subDeviceInstance;
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -1562,15 +1562,6 @@ typedef struct NV0073_CTRL_DP_GET_EDP_DATA_PARAMS {
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* Specifies TU size value
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* watermark
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* Specifies stream watermark.
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* linkClkFreqHz -- moving to MvidWarParams. Use that instead.
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* Specifies the link freq in Hz. Note that this is the byte clock.
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* eg: = (5.4 Ghz / 10)
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* actualPclkHz; -- moving to MvidWarParams. Use that instead.
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* Specifies the actual pclk freq in Hz.
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* mvidWarEnabled
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* Specifies whether MVID WAR is enabled.
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* MvidWarParams
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* Is valid if mvidWarEnabled is true.
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* bEnableTwoHeadOneOr
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* Whether two head one OR is enabled. If this is set then RM will
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* replicate SF settings of Master head on Slave head. Head index
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@@ -1614,19 +1605,7 @@ typedef struct NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS {
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NvBool bEnhancedFraming;
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NvU32 tuSize;
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NvU32 waterMark;
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NvU32 actualPclkHz; // deprecated -Use MvidWarParams
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NvU32 linkClkFreqHz; // deprecated -Use MvidWarParams
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NvBool bEnableAudioOverRightPanel;
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struct {
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NvU32 activeCnt;
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NvU32 activeFrac;
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NvU32 activePolarity;
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NvBool mvidWarEnabled;
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struct {
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NvU32 actualPclkHz;
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NvU32 linkClkFreqHz;
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} MvidWarParams;
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} Legacy;
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} SST;
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} NV0073_CTRL_CMD_DP_CONFIG_STREAM_PARAMS;
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@@ -1817,6 +1796,10 @@ typedef struct NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS {
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* Returns NV_TRUE if LTTPR Link Training feature is set
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* bOverrideLinkBw
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* Returns NV_TRUE if DFP limits defined in DCB have to be honored, else NV_FALSE
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* bUseRgFlushSequence
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* Returns NV_TRUE if GPU uses the new RG flush design
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* bSupportDPDownSpread
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* Returns NV_TRUE if GPU support downspread.
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*
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* DSC caps
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*
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@@ -1845,6 +1828,8 @@ typedef struct NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS {
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NvBool bFECSupported;
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NvBool bIsTrainPhyRepeater;
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NvBool bOverrideLinkBw;
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NvBool bUseRgFlushSequence;
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NvBool bSupportDPDownSpread;
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NV0073_CTRL_CMD_DSC_CAP_PARAMS DSC;
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} NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS;
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@@ -2837,4 +2822,65 @@ typedef struct NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS {
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} NV0073_CTRL_DP_EXECUTE_OVERDRIVE_POLICY_PARAMS;
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/*
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* NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL
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*
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* This command is used to query VBL capability and status as well as
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* control enable/disable of VBL feature of eDP LCD panels.
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*
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* subDeviceInstance [in]
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* This parameter specifies the subdevice instance within the
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* NV04_DISPLAY_COMMON parent device to which the operation should be
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* directed. This parameter must specify a value between zero and the
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* total number of subdevices within the parent device. This parameter
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* should be set to zero for default behavior.
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* displayId [in]
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* This parameter specifies the ID of the DP display which owns
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* the Main Link to be adjusted. The display ID must a DP display
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* as determined with the NV0073_CTRL_CMD_SPECIFIC_GET_TYPE command.
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* If more than one displayId bit is set or the displayId is not a DP,
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* this call will return NV_ERR_INVALID_ARGUMENT.
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* cmd [in]
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* This parameter is an input to this command. The cmd parameter tells
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* whether we have to get the value of a specific field or set the
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* value in case of a writeable field.
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* control [in]
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* This parameter is input by the user. It is used by the user to decide the control
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* value to be written to the VBL control field. The command to write is
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* the NV0073_CTRL_CMD_DP_AUXCH_VBL_CTL_SET command.
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* bVblControlCapable [out]
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* This parameter reflects the VBL control capability of the Sink which can be
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* fetched by using the NV0073_CTRL_CMD_DP_AUXCH_VBL_CTL_CAPABLE_QUERY command.
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* bVblStatus [out]
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* This parameter reflects the Sink VBL status which can be
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* fetched by using the NV0073_CTRL_CMD_DP_AUXCH_VBL_STATUS_QUERY command.
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*
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* Possible status values returned are:
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* NV_OK
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* NV_ERR_INVALID_ARGUMENT
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* NV_ERR_NOT_SUPPORTED
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*/
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#define NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL (0x731386U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS_MESSAGE_ID" */
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/* valid commands */
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#define NV0073_CTRL_CMD_DP_AUXCH_QUERY_VBL_CTL_CAPABLE 0x00000000
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#define NV0073_CTRL_CMD_DP_AUXCH_QUERY_VBL_STATUS 0x00000001
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#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL 0x00000002
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/* valid state values */
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#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_DISABLE 0x00000000
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#define NV0073_CTRL_CMD_DP_AUXCH_SET_VBL_CTL_ENABLE 0x00000001
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#define NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS_MESSAGE_ID (0x86U)
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typedef struct NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS {
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NvU32 subDeviceInstance;
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NvU32 displayId;
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NvU8 cmd;
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NvU8 control;
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NvBool bVblControlCapable;
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NvBool bVblStatus;
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} NV0073_CTRL_CMD_DP_AUXCH_VBL_CTRL_PARAMS;
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/* _ctrl0073dp_h_ */
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -56,10 +56,22 @@ typedef NV0073_CTRL_CMD_DFP_SWITCH_DISP_MUX_PARAMS NV0073_CTRL_CMD_INTERNAL_DFP_
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typedef NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS NV0073_CTRL_CMD_INTERNAL_DFP_GET_DISP_MUX_STATUS_PARAMS;
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#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL (0x730405U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE (0x730405U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID (0x5U)
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#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID (0x5U)
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typedef NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_PARAMS;
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typedef NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_ENABLE_PARAMS;
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#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE (0x730406U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID (0x6U)
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typedef NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS NV0073_CTRL_CMD_INTERNAL_VBLANK_SEM_CONTROL_DISABLE_PARAMS;
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#define NV0073_CTRL_CMD_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR (0x730407U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_INTERNAL_INTERFACE_ID << 8) | NV0073_CTRL_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID" */
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#define NV0073_CTRL_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID (0x7U)
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typedef NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS NV0073_CTRL_INTERNAL_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS;
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/* ctrl0073internal_h */
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@@ -1,5 +1,5 @@
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/*
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||||
* SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2005-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
@@ -30,6 +30,7 @@
|
||||
// Source file: ctrl/ctrl0073/ctrl0073system.finn
|
||||
//
|
||||
|
||||
#include "nvlimits.h"
|
||||
#include "ctrl/ctrl0073/ctrl0073base.h"
|
||||
|
||||
/* NV04_DISPLAY_COMMON system-level control commands and parameters */
|
||||
@@ -89,9 +90,9 @@
|
||||
* Possible status values returned are:
|
||||
* NV_OK
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_CAPS_V2 (0x730138U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_CAPS_V2 (0x730101U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID (0x38U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS_MESSAGE_ID (0x01U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS {
|
||||
NvU8 capsTbl[NV0073_CTRL_SYSTEM_CAPS_TBL_SIZE];
|
||||
@@ -130,7 +131,7 @@ typedef struct NV0073_CTRL_SYSTEM_GET_CAPS_V2_PARAMS {
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_NUM_HEADS (0x730102U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS_MESSAGE_ID (0x2U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS_MESSAGE_ID (0x02U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -184,12 +185,12 @@ typedef struct NV0073_CTRL_SYSTEM_GET_NUM_HEADS_PARAMS {
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE (0x730108U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE (0x730104U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE_RIGHT_EYE 0x00000000U
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_SCANLINE_LEFT_EYE 0x00000001U
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID (0x8U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS_MESSAGE_ID (0x04U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -224,9 +225,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_SCANLINE_PARAMS {
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_COUNTER (0x730109U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_COUNTER (0x730105U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID (0x9U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS_MESSAGE_ID (0x05U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -261,9 +262,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_COUNTER_PARAMS {
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_ENABLE (0x73010aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_VBLANK_ENABLE (0x730106U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID (0xAU)
|
||||
#define NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS_MESSAGE_ID (0x06U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -303,9 +304,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_VBLANK_ENABLE_PARAMS {
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_SUPPORTED (0x730120U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_SUPPORTED (0x730107U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID (0x20U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS_MESSAGE_ID (0x07U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -385,9 +386,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_SUPPORTED_PARAMS {
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
* NVOS_STATUS_ERROR_RETRY
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECT_STATE (0x730122U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECT_STATE (0x730108U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID (0x22U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS_MESSAGE_ID (0x08U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -455,9 +456,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_CONNECT_STATE_PARAMS {
|
||||
*/
|
||||
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_CONFIG (0x730123U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_CONFIG (0x730109U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID (0x23U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS_MESSAGE_ID (0x09U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -509,9 +510,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_SET_HOTPLUG_CONFIG_PARAMS {
|
||||
*/
|
||||
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_STATE (0x730124U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_STATE (0x73010aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID (0x24U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS_MESSAGE_ID (0x0AU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -576,9 +577,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_STATE_PARAMS {
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HEAD_ROUTING_MAP (0x730125U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HEAD_ROUTING_MAP (0x73010bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID (0x25U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS_MESSAGE_ID (0x0BU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -639,9 +640,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_HEAD_ROUTING_MAP_PARAMS {
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_ACTIVE (0x730126U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_ACTIVE (0x73010cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID (0x26U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS_MESSAGE_ID (0x0CU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -763,10 +764,10 @@ typedef struct NV0073_CTRL_SYSTEM_ACPI_ID_MAP_PARAMS {
|
||||
* Only returned if subdeviceInstance was not valid.
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_ACPI_ID_MAP (0x73015aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_ACPI_ID_MAP (0x730115U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID" */
|
||||
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID (0x5AU)
|
||||
#define NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID (0x15U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -799,9 +800,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS {
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_INTERNAL_DISPLAYS (0x73015bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_INTERNAL_DISPLAYS (0x730116U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID (0x5BU)
|
||||
#define NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS_MESSAGE_ID (0x16U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -837,13 +838,13 @@ typedef struct NV0073_CTRL_SYSTEM_GET_INTERNAL_DISPLAYS_PARAMS {
|
||||
*
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID (0x5CU)
|
||||
#define NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID (0x17U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
} NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS;
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED (0x73015cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED (0x730117U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ACPI_SUBSYSTEM_ACTIVATED_PARAMS_MESSAGE_ID" */
|
||||
|
||||
|
||||
/*
|
||||
@@ -945,12 +946,12 @@ typedef struct NV0073_CTRL_SYSTEM_CONNECTOR_INFO {
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECTOR_TABLE (0x730165U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_CONNECTOR_TABLE (0x73011dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
/* maximum number of connector table entries */
|
||||
#define NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_MAX_ENTRIES (16U)
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID (0x65U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS_MESSAGE_ID (0x1DU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -995,9 +996,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_CONNECTOR_TABLE_PARAMS {
|
||||
* NV_OK
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_BOOT_DISPLAYS (0x730166U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_BOOT_DISPLAYS (0x73011eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID (0x66U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS_MESSAGE_ID (0x1EU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1174,9 +1175,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS {
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_EXECUTE_ACPI_METHOD (0x730168U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_EXECUTE_ACPI_METHOD (0x730120U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID (0x68U)
|
||||
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID (0x20U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS {
|
||||
NvU32 method;
|
||||
@@ -1285,9 +1286,9 @@ typedef struct NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS {
|
||||
* When set to NV_FALSE, signifies that the vrr monitor is to be removed.
|
||||
*
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VRR_DISPLAY_INFO (0x730185U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VRR_DISPLAY_INFO (0x73012cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID (0x85U)
|
||||
#define NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS_MESSAGE_ID (0x2CU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1340,9 +1341,9 @@ typedef struct NV0073_CTRL_SYSTEM_VRR_DISPLAY_INFO_PARAMS {
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_UNPLUG_STATE (0x73017bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_UNPLUG_STATE (0x73012dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID (0x7BU)
|
||||
#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS_MESSAGE_ID (0x2DU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1381,9 +1382,9 @@ typedef struct NV0073_CTRL_SYSTEM_GET_HOTPLUG_UNPLUG_STATE_PARAMS {
|
||||
* NV_ERR_INVALID_STATE
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CLEAR_ELV_BLOCK (0x73017dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CLEAR_ELV_BLOCK (0x73012eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID (0x7DU)
|
||||
#define NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS_MESSAGE_ID (0x2EU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1433,9 +1434,9 @@ typedef struct NV0073_CTRL_SYSTEM_CLEAR_ELV_BLOCK_PARAMS {
|
||||
* NV_ERR_INVALID_STATE
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR (0x73017eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR (0x73012fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID (0x7EU)
|
||||
#define NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS_MESSAGE_ID (0x2FU)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1485,9 +1486,9 @@ typedef struct NV0073_CTRL_SYSTEM_ARM_LIGHTWEIGHT_SUPERVISOR_PARAMS {
|
||||
* minVblankExtension
|
||||
* When VRR is enabled, this is the minimum amount of lines that should be present in the Vblank. The purpose is to cap the maximum refresh (currently only for HDMI 2.1 VRR compliance)
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CONFIG_VRR_PSTATE_SWITCH (0x730184U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CONFIG_VRR_PSTATE_SWITCH (0x730134U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID (0x84U)
|
||||
#define NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS_MESSAGE_ID (0x34U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1500,6 +1501,38 @@ typedef struct NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS {
|
||||
NvU32 minVblankExtension;
|
||||
} NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS;
|
||||
|
||||
/*
|
||||
* NV0073_CTRL_CMD_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR
|
||||
*
|
||||
* This command engages the WAR when VR devices are connected,
|
||||
* where the Pstate switching can cause delay in Vblank callbacks
|
||||
* reported to KMD, by servicing disp interrupts inline and reporting the
|
||||
* callbacks to KMD. Without the WAR, there can be stutters during pstate switch.
|
||||
* Bug#1778552
|
||||
*
|
||||
* subDeviceInstance
|
||||
* This parameter specifies the subdevice instance within the
|
||||
* NV04_DISPLAY_COMMON parent device to which the operation should be
|
||||
* directed.
|
||||
* bEngageWAR
|
||||
* Indicates if inline disp interrupt serving WAR has to be engaged or
|
||||
* disengaged.
|
||||
*
|
||||
* Possible status values returned are:
|
||||
* NV_OK
|
||||
* NV_ERR_INVALID_PARAM_STRUCT
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR (0x730187U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS_MESSAGE_ID (0x87U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
NvBool bEngageWAR;
|
||||
} NV0073_CTRL_SYSTEM_INLINE_DISP_INTR_SERVICE_WAR_FOR_VR_PARAMS;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
@@ -1522,9 +1555,9 @@ typedef struct NV0073_CTRL_SYSTEM_CONFIG_VRR_PSTATE_SWITCH_PARAMS {
|
||||
* NV_ERR_NOT_SUPPORTED
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX (0x730190U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX (0x73013dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID (0x90U)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS_MESSAGE_ID (0x3DU)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1568,9 +1601,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_QUERY_DISPLAY_IDS_WITH_MUX_PARAMS {
|
||||
* NV_ERR_GENERIC
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH (0x730196U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH (0x730143U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x96U)
|
||||
#define NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS_MESSAGE_ID (0x43U)
|
||||
|
||||
typedef struct NV0073_CTRL_SYSTEM_ALLOCATE_DISPLAY_BANDWIDTH_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1619,9 +1652,9 @@ typedef struct NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS {
|
||||
* the parameters.
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_EVENT_CONFIG (0x730197U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_EVENT_CONFIG (0x730144U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x97U)
|
||||
#define NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x44U)
|
||||
|
||||
typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_GET_HOTPLUG_EVENT_CONFIG_PARAMS;
|
||||
|
||||
@@ -1634,9 +1667,9 @@ typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_GET_HO
|
||||
* the parameters.
|
||||
*/
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_SET_HOTPLUG_EVENT_CONFIG (0x730198U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_SET_HOTPLUG_EVENT_CONFIG (0x730145U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x98U)
|
||||
#define NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS_MESSAGE_ID (0x45U)
|
||||
|
||||
typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_SET_HOTPLUG_EVENT_CONFIG_PARAMS;
|
||||
|
||||
@@ -1665,9 +1698,9 @@ typedef NV0073_CTRL_SYSTEM_HOTPLUG_EVENT_CONFIG_PARAMS NV0073_CTRL_SYSTEM_SET_HO
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
* NV_ERR_NOT_SUPPORTED
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS (0x73019bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS (0x73014aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID (0x9BU)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS_MESSAGE_ID (0x4AU)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1694,9 +1727,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_RECORD_CHANNEL_REGS_PARAMS {
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
* NV_ERR_NOT_SUPPORTED
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT (0x73019cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT (0x73014bU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID (0x9CU)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS_MESSAGE_ID (0x4BU)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1726,9 +1759,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS {
|
||||
* NV_ERR_INVALID_ARGUMENT
|
||||
* NV_ERR_NOT_SUPPORTED
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT (0x73019dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT (0x73014cU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID (0x9DU)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID (0x4CU)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1777,9 +1810,9 @@ typedef struct NV0073_CTRL_RM_VRR_SHARED_DATA {
|
||||
NV_DECLARE_ALIGNED(NvU64 dataTimeStamp, 8);
|
||||
} NV0073_CTRL_RM_VRR_SHARED_DATA;
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE (0x73019eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE (0x73014dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID (0x9EU)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS_MESSAGE_ID (0x4DU)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1797,20 +1830,22 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS {
|
||||
* The VBlank Semaphore Control API ("VBlank Sem Control") allows clients to
|
||||
* register for a semaphore release to be performed on the specified memory.
|
||||
*
|
||||
* One or more clients may register a memory allocation + offset by specifying
|
||||
* _PARAMS::bEnabled = NV_TRUE and describing a video memory object with
|
||||
* _PARAMS::hMemory and an offset within that memory object
|
||||
* (_PARAMS::memoryOffset). Until the hMemory + memoryOffset combination is
|
||||
* disabled by a subsequent call with bEnabled = NV_FALSE, during each vblank on
|
||||
* the specified head, RM will interpret the specified memory location as an
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA data structure.
|
||||
* One or more clients may register a memory allocation + offset by describing a
|
||||
* video memory object with _PARAMS::hMemory and an offset within that memory
|
||||
* object (_PARAMS::memoryOffset). Until the hMemory + memoryOffset combination
|
||||
* is disabled, during each vblank on the specified heads, RM will interpret the
|
||||
* specified memory location as an
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA data structure. Each enabled
|
||||
* head will inspect the corresponding
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD at
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA::head[head].
|
||||
*
|
||||
* _PARAMS::memoryOffset must be a multiple of 8, so that GPU semaphore releases
|
||||
* and GSP can write to 8-byte fields within
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA with natural alignment.
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD with natural alignment.
|
||||
*
|
||||
* During vblank, the _CONTROL_DATA::control field will be read, and the
|
||||
* following pseudocode will be performed:
|
||||
* During vblank, the _CONTROL_DATA_ONE_HEAD::requestCounter field will be read,
|
||||
* and the following pseudocode will be performed:
|
||||
*
|
||||
* swapInterval = DRF_VAL(data->flags)
|
||||
* useMinimumGpuTime = DRV_VAL(data->flags)
|
||||
@@ -1832,16 +1867,16 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS {
|
||||
* previousVblankCount = currentVblankCount
|
||||
*
|
||||
* I.e., if the client-described conditions are met, the RM will write
|
||||
* _CONTROL_DATA::semaphore to the client-requested 'requestCounter' along with
|
||||
* several informational fields (vblankCount, releaseGpuTime).
|
||||
* _CONTROL_DATA_ONE_HEAD::semaphore to the client-requested 'requestCounter'
|
||||
* along with several informational fields (vblankCount, releaseGpuTime).
|
||||
*
|
||||
* The intent is for clients to use semaphore releases to write:
|
||||
*
|
||||
* _CONTROL_DATA::minimumGpuTime (if desired)
|
||||
* _CONTROL_DATA::swapInterval
|
||||
* _CONTROL_DATA::requestCounter
|
||||
* _CONTROL_DATA_ONE_HEAD::minimumGpuTime (if desired)
|
||||
* _CONTROL_DATA_ONE_HEAD::swapInterval
|
||||
* _CONTROL_DATA_ONE_HEAD::requestCounter
|
||||
*
|
||||
* and then perform a semaphore acquire on _CONTROL_DATA::semaphore >=
|
||||
* and then perform a semaphore acquire on _CONTROL_DATA_ONE_HEAD::semaphore >=
|
||||
* requestCounter (using the ACQ_GEQ semaphore operation). This will block any
|
||||
* following methods in the client's channel (e.g., a blit) until the requested
|
||||
* conditions are met. Note the ::requestCounter should be written last,
|
||||
@@ -1849,10 +1884,10 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS {
|
||||
* vblank callback, to inspect the other fields.
|
||||
*
|
||||
* Additionally, clients should use the CPU (not semaphore releases in their
|
||||
* channel) to write the field _CONTROL_DATA::requestCounterAccel at the same
|
||||
* time that they enqueue the semaphore release to write to
|
||||
* _CONTROL_DATA::requestCounter. ::requestCounterAccel will be used by resman
|
||||
* to "accelerate" the vblank sem control by copying the value from
|
||||
* channel) to write the field _CONTROL_DATA_ONE_HEAD::requestCounterAccel at
|
||||
* the same time that they enqueue the semaphore release to write to
|
||||
* _CONTROL_DATA_ONE_HEAD::requestCounter. ::requestCounterAccel will be used
|
||||
* by resman to "accelerate" the vblank sem control by copying the value from
|
||||
* ::requestCounterAccel to ::semaphore. This will be done when the vblank sem
|
||||
* control is disabled, and when a client calls
|
||||
* NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS. It is important for resman
|
||||
@@ -1866,13 +1901,35 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VRR_SET_RGLINE_ACTIVE_PARAMS {
|
||||
*
|
||||
* The same hMemory (with difference memoryOffsets) may be used by multiple
|
||||
* VBlank Sem Controls.
|
||||
*
|
||||
* Lastly, the bUseHeadIndexMap field in the enable params is used to tell
|
||||
* resman to honor the headIndexMap[] table in the enable params. Normally, the
|
||||
* N-th bit in the enable params headMask corresponds to element N in the
|
||||
* _CONTROL_DATA::head[] array. But, headIndexMap[] allows the N-th bit in
|
||||
* headMask to be remapped to a different index in the head[] array. E.g.,
|
||||
*
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA *pData = ...;
|
||||
*
|
||||
* FOR_EACH_INDEX_IN_MASK(32, head, pParams->headMask)
|
||||
* {
|
||||
* NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD *pDataOneHead;
|
||||
* NvU32 headIndex = pParams->bUseHeadIndexMap ?
|
||||
* pParams->headIndexMap[head] : head;
|
||||
* pDataOneHead = &pData->head[headIndex];
|
||||
* ...
|
||||
* }
|
||||
* FOR_EACH_INDEX_IN_MASK_END;
|
||||
*
|
||||
* This remapping is important for nvkms' use of the RMAPI. To support
|
||||
* 2head1or, nvkms may remap head indices between the headMask passed to RM and
|
||||
* the array indices in _CONTROL_DATA::head[] as used by OpenGL.
|
||||
*/
|
||||
|
||||
/* Fields within NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA::flags */
|
||||
/* Fields within NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD::flags */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_SWAP_INTERVAL 15:0
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_USE_MINIMUM_GPU_TIME 16:16
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA {
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD {
|
||||
NvU32 requestCounterAccel;
|
||||
NvU32 requestCounter;
|
||||
NvU32 flags;
|
||||
@@ -1881,19 +1938,34 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA {
|
||||
NvU32 semaphore;
|
||||
NV_DECLARE_ALIGNED(NvU64 vblankCount, 8);
|
||||
NV_DECLARE_ALIGNED(NvU64 releaseGpuTime, 8);
|
||||
} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD;
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA {
|
||||
NV_DECLARE_ALIGNED(NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA_ONE_HEAD head[NV_MAX_HEADS], 8);
|
||||
} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DATA;
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL (0x73019fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE (0x73014eU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS_MESSAGE_ID (0x9FU)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS_MESSAGE_ID (0x4EU)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS {
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
NvBool bEnable;
|
||||
NvU32 head;
|
||||
NvU32 headMask;
|
||||
NvU8 headIndexMap[NV_MAX_HEADS];
|
||||
NvHandle hMemory;
|
||||
NV_DECLARE_ALIGNED(NvU64 memoryOffset, 8);
|
||||
} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS;
|
||||
NvBool bUseHeadIndexMap;
|
||||
} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_ENABLE_PARAMS;
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE (0x73014fU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS_MESSAGE_ID (0x4FU)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
NvHandle hMemory;
|
||||
NV_DECLARE_ALIGNED(NvU64 memoryOffset, 8);
|
||||
} NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_DISABLE_PARAMS;
|
||||
|
||||
/*
|
||||
* Accelerate all VBlank Sem Controls on the specified heads.
|
||||
@@ -1902,9 +1974,9 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_VBLANK_SEM_CONTROL_PARAMS {
|
||||
* their pending ::semaphore fields to the value in their ::requestCounterAccel
|
||||
* field.
|
||||
*/
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS (0x7301a2U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS (0x730150U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID (0xA2U)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS_MESSAGE_ID (0x50U)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_ACCEL_VBLANK_SEM_CONTROLS_PARAMS {
|
||||
NvU32 subDeviceInstance;
|
||||
@@ -1929,9 +2001,9 @@ typedef struct NV0073_CTRL_SHARED_MEMDESC_INFO {
|
||||
NvU32 cpuCacheAttrib;
|
||||
} NV0073_CTRL_SHARED_MEMDESC_INFO;
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA (0x7301a3U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID" */
|
||||
#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA (0x730151U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID (0xA3U)
|
||||
#define NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS_MESSAGE_ID (0x51U)
|
||||
|
||||
typedef struct NV0073_CTRL_CMD_SYSTEM_MAP_SHARED_DATA_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NV0073_CTRL_SHARED_MEMDESC_INFO memDescInfo, 8);
|
||||
|
||||
Reference in New Issue
Block a user