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555.42.02

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(cherry picked from commit 5a1c474040)
This commit is contained in:
Bernhard Stoeckner
2024-05-21 15:11:46 +02:00
committed by Gaurav Juvekar
parent caa2dd11a0
commit 3084c04453
1004 changed files with 172522 additions and 150960 deletions
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65
src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06fgpfifo.h
View File

@@ -1,17 +1,17 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2007-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2007-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -32,29 +32,6 @@
#include "ctrl/ctrla06f/ctrla06fbase.h"
/*
* NVA06F_CTRL_GET_CLASS_ENGINEID
*
* Please see description of NV906F_CTRL_GET_CLASS_ENGINEID for more information.
*
*/
#define NVA06F_CTRL_GET_CLASS_ENGINEID (0xa06f0101) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID" */
#define NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS_MESSAGE_ID (0x1U)
typedef NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS NVA06F_CTRL_GET_CLASS_ENGINEID_PARAMS;
/*
* NVA06F_CTRL_RESET_CHANNEL
*
* Please see description of NV906F_CTRL_RESET_CHANNEL for more information.
*/
#define NVA06F_CTRL_CMD_RESET_CHANNEL (0xa06f0102) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID" */
#define NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U)
typedef NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS;
/*
* NVA06F_CTRL_CMD_GPFIFO_SCHEDULE
*
@@ -111,20 +88,6 @@ typedef struct NVA06F_CTRL_BIND_PARAMS {
NvU32 engineType;
} NVA06F_CTRL_BIND_PARAMS;
/*
* NVA06F_CTRL_CMD_GET_MMU_FAULT_INFO
*
* Please see description of NV906F_CTRL_CMD_GET_MMU_FAULT_INFO for more information.
*
*/
#define NVA06F_CTRL_CMD_GET_MMU_FAULT_INFO (0xa06f0107) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID" */
#define NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS_MESSAGE_ID (0x7U)
typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVA06F_CTRL_GET_MMU_FAULT_INFO_PARAMS;
/*
* NVA06F_CTRL_CMD_SET_ERROR_NOTIFIER
*
@@ -132,7 +95,7 @@ typedef NV906F_CTRL_GET_MMU_FAULT_INFO_PARAMS NVA06F_CTRL_GET_MMU_FAULT_INFO_PAR
* bNotifyEachChannelInTSG
* When true, the error notifier will be set on every channel in
* the TSG that contains the channel.
*
*
* Possible status values returned are:
* NV_OK
*/
@@ -248,7 +211,7 @@ typedef struct NVA06F_CTRL_RESTART_RUNLIST_PARAMS {
* Also set an error notifier to notify user space that channel is stopped.
*
* bImmediate
* Input parameter. If NV_FALSE, we will wait for default RM timeout
* Input parameter. If NV_FALSE, we will wait for default RM timeout
* for channel to idle. If NV_TRUE, we don't wait for channel to idle.
* If channel is not idle, we forcefully preempt it off the runlist.
* If the preempt times out, we will RC the channel.
@@ -266,4 +229,20 @@ typedef struct NVA06F_CTRL_STOP_CHANNEL_PARAMS {
NvBool bImmediate;
} NVA06F_CTRL_STOP_CHANNEL_PARAMS;
/*
* NVA06F_CTRL_CMD_GET_CONTEXT_ID
*
* This command returns the context ID of a given channel.
*
* Possible status values returned are:
* NV_OK
*/
#define NVA06F_CTRL_CMD_GET_CONTEXT_ID (0xa06f0113) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID << 8) | NVA06F_CTRL_GET_CONTEXT_ID_PARAMS_MESSAGE_ID" */
#define NVA06F_CTRL_GET_CONTEXT_ID_PARAMS_MESSAGE_ID (0x13U)
typedef struct NVA06F_CTRL_GET_CONTEXT_ID_PARAMS {
NvU32 contextId;
} NVA06F_CTRL_GET_CONTEXT_ID_PARAMS;
/* _ctrla06fgpfifo_h_ */

23
src/common/sdk/nvidia/inc/ctrl/ctrla06f/ctrla06finternal.h
View File

@@ -1,17 +1,17 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2007-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2007-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
@@ -46,21 +46,6 @@
typedef NVA06F_CTRL_STOP_CHANNEL_PARAMS NVA06F_CTRL_INTERNAL_STOP_CHANNEL_PARAMS;
/*
* NVA06F_CTRL_CMD_INTERNAL_RESET_CHANNEL
*
* This command is an internal command sent from Kernel RM to Physical RM
* to perform the channel reset operations in hardware
*
* Please see description of NV906F_CTRL_CMD_RESET_CHANNEL for more information.
*
*/
#define NVA06F_CTRL_CMD_INTERNAL_RESET_CHANNEL (0xa06f0302) /* finn: Evaluated from "(FINN_KEPLER_CHANNEL_GPFIFO_A_INTERNAL_INTERFACE_ID << 8) | NVA06F_CTRL_INTERNAL_RESET_CHANNEL_PARAMS_MESSAGE_ID" */
#define NVA06F_CTRL_INTERNAL_RESET_CHANNEL_PARAMS_MESSAGE_ID (0x2U)
typedef NVA06F_CTRL_CMD_RESET_CHANNEL_PARAMS NVA06F_CTRL_INTERNAL_RESET_CHANNEL_PARAMS;
/*
* NVA06F_CTRL_CMD_INTERNAL_GPFIFO_SCHEDULE
*