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555.42.02

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(cherry picked from commit 5a1c474040)
This commit is contained in:
Bernhard Stoeckner
2024-05-21 15:11:46 +02:00
committed by Gaurav Juvekar
parent caa2dd11a0
commit 3084c04453
1004 changed files with 172522 additions and 150960 deletions
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32
src/common/sdk/nvidia/inc/g_finn_rm_api.h
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@@ -40,7 +40,7 @@
* FINN compiler version
*/
#define FINN_VERSION_MAJOR 1
#define FINN_VERSION_MINOR 21
#define FINN_VERSION_MINOR 22
#define FINN_VERSION_PATCH 0
typedef struct FINN_RM_API
@@ -318,6 +318,10 @@ typedef FINN_RM_API FINN_NV_MEMORY_MULTICAST_FABRIC_RESERVED;
typedef FINN_RM_API FINN_NV_MEMORY_MULTICAST_FABRIC_FABRIC;
#define FINN_NV_MEMORY_MAPPER_INTERFACE_ID (0xfe01U)
typedef FINN_RM_API FINN_NV_MEMORY_MAPPER;
#define FINN_LOCK_STRESS_OBJECT_RESERVED_INTERFACE_ID (0x10000U)
typedef FINN_RM_API FINN_LOCK_STRESS_OBJECT_RESERVED;
#define FINN_LOCK_STRESS_OBJECT_LOCK_STRESS_INTERFACE_ID (0x10001U)
typedef FINN_RM_API FINN_LOCK_STRESS_OBJECT_LOCK_STRESS;
#define FINN_NV20_SUBDEVICE_0_RESERVED_INTERFACE_ID (0x208000U)
typedef FINN_RM_API FINN_NV20_SUBDEVICE_0_RESERVED;
@@ -442,6 +446,8 @@ typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_GR;
#define FINN_NV20_SUBDEVICE_DIAG_MMU_INTERFACE_ID (0x208f0bU)
typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_MMU;
#define FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE_INTERFACE_ID (0x208f19U)
typedef FINN_RM_API FINN_NV20_SUBDEVICE_DIAG_UCODE_COVERAGE;
#define FINN_NV30_GSYNC_RESERVED_INTERFACE_ID (0x30f100U)
typedef FINN_RM_API FINN_NV30_GSYNC_RESERVED;
#define FINN_NV30_GSYNC_GSYNC_INTERFACE_ID (0x30f101U)
@@ -468,8 +474,6 @@ typedef FINN_RM_API FINN_NV50_DISPLAY_EVENT;
typedef FINN_RM_API FINN_NV50_DISPLAY_OR;
#define FINN_NV50_DISPLAY_RG_INTERFACE_ID (0x507002U)
typedef FINN_RM_API FINN_NV50_DISPLAY_RG;
#define FINN_NV50_DISPLAY_SEQ_INTERFACE_ID (0x507003U)
typedef FINN_RM_API FINN_NV50_DISPLAY_SEQ;
#define FINN_NV50_DISPLAY_SYSTEM_INTERFACE_ID (0x507007U)
typedef FINN_RM_API FINN_NV50_DISPLAY_SYSTEM;
@@ -600,15 +604,11 @@ typedef FINN_RM_API FINN_GK110_SUBDEVICE_FB_RESERVED;
typedef FINN_RM_API FINN_GK110_SUBDEVICE_FB_FB;
#define FINN_KEPLER_CHANNEL_GPFIFO_B_RESERVED_INTERFACE_ID (0xa16f00U)
typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_B_RESERVED;
#define FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO_INTERFACE_ID (0xa16f01U)
typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_B_GPFIFO;
#define FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT_INTERFACE_ID (0xa16f02U)
#define FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT_INTERFACE_ID (0xa16f01U)
typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_B_EVENT;
#define FINN_KEPLER_CHANNEL_GPFIFO_C_RESERVED_INTERFACE_ID (0xa26f00U)
typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_C_RESERVED;
#define FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO_INTERFACE_ID (0xa26f01U)
typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_C_GPFIFO;
#define FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT_INTERFACE_ID (0xa26f02U)
#define FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT_INTERFACE_ID (0xa26f01U)
typedef FINN_RM_API FINN_KEPLER_CHANNEL_GPFIFO_C_EVENT;
#define FINN_MAXWELL_FAULT_BUFFER_A_RESERVED_INTERFACE_ID (0xb06900U)
typedef FINN_RM_API FINN_MAXWELL_FAULT_BUFFER_A_RESERVED;
@@ -639,9 +639,7 @@ typedef FINN_RM_API FINN_MAXWELL_PROFILER_DEVICE_RESERVED;
typedef FINN_RM_API FINN_MAXWELL_SEC2_SEC2;
#define FINN_PASCAL_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc06f00U)
typedef FINN_RM_API FINN_PASCAL_CHANNEL_GPFIFO_A_RESERVED;
#define FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc06f01U)
typedef FINN_RM_API FINN_PASCAL_CHANNEL_GPFIFO_A_GPFIFO;
#define FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc06f02U)
#define FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc06f01U)
typedef FINN_RM_API FINN_PASCAL_CHANNEL_GPFIFO_A_EVENT;
#define FINN_GP100_SUBDEVICE_GRAPHICS_RESERVED_INTERFACE_ID (0xc0e000U)
typedef FINN_RM_API FINN_GP100_SUBDEVICE_GRAPHICS_RESERVED;
@@ -694,16 +692,10 @@ typedef FINN_RM_API FINN_GV100_SUBDEVICE_FB_RESERVED;
typedef FINN_RM_API FINN_GV100_SUBDEVICE_FB_FB;
#define FINN_TURING_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc46f00U)
typedef FINN_RM_API FINN_TURING_CHANNEL_GPFIFO_A_RESERVED;
#define FINN_TURING_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc46f01U)
typedef FINN_RM_API FINN_TURING_CHANNEL_GPFIFO_A_GPFIFO;
#define FINN_TURING_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc46f02U)
typedef FINN_RM_API FINN_TURING_CHANNEL_GPFIFO_A_EVENT;
#define FINN_AMPERE_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc56f00U)
typedef FINN_RM_API FINN_AMPERE_CHANNEL_GPFIFO_A_RESERVED;
#define FINN_AMPERE_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc56f01U)
typedef FINN_RM_API FINN_AMPERE_CHANNEL_GPFIFO_A_GPFIFO;
#define FINN_AMPERE_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc56f02U)
typedef FINN_RM_API FINN_AMPERE_CHANNEL_GPFIFO_A_EVENT;
#define FINN_AMPERE_SMC_PARTITION_REF_RESERVED_INTERFACE_ID (0xc63700U)
typedef FINN_RM_API FINN_AMPERE_SMC_PARTITION_REF_RESERVED;
#define FINN_AMPERE_SMC_PARTITION_REF_EXEC_PARTITIONS_INTERFACE_ID (0xc63701U)
@@ -718,10 +710,6 @@ typedef FINN_RM_API FINN_MMU_VIDMEM_ACCESS_BIT_BUFFER_RESERVED;
typedef FINN_RM_API FINN_MMU_VIDMEM_ACCESS_BIT_BUFFER_VIDMEM_ACCESS_BIT_BUFFER;
#define FINN_HOPPER_CHANNEL_GPFIFO_A_RESERVED_INTERFACE_ID (0xc86f00U)
typedef FINN_RM_API FINN_HOPPER_CHANNEL_GPFIFO_A_RESERVED;
#define FINN_HOPPER_CHANNEL_GPFIFO_A_GPFIFO_INTERFACE_ID (0xc86f01U)
typedef FINN_RM_API FINN_HOPPER_CHANNEL_GPFIFO_A_GPFIFO;
#define FINN_HOPPER_CHANNEL_GPFIFO_A_EVENT_INTERFACE_ID (0xc86f02U)
typedef FINN_RM_API FINN_HOPPER_CHANNEL_GPFIFO_A_EVENT;
#define FINN_NV_CONFIDENTIAL_COMPUTE_RESERVED_INTERFACE_ID (0xcb3300U)
typedef FINN_RM_API FINN_NV_CONFIDENTIAL_COMPUTE_RESERVED;