mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-03-04 04:39:49 +00:00
Bernhard Stoeckner
committed by
Gaurav Juvekar
Gaurav Juvekar
parent
caa2dd11a0
commit
3084c04453
@@ -23,8 +23,8 @@
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/*
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* WARNING: This is an autogenerated file. DO NOT EDIT.
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* This file is generated using below files:
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* template file: kernel/inc/vgpu/gt_sdk-structures.h
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* definition file: kernel/inc/vgpu/sdk-structures.def
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* template file: inc/kernel/vgpu/gt_sdk-structures.h
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* definition file: inc/kernel/vgpu/sdk-structures.def
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*/
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@@ -457,13 +457,6 @@ typedef struct NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS_v03_00
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typedef NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS_v03_00 NV2080_CTRL_GPU_GET_FERMI_ZCULL_INFO_PARAMS_v;
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typedef struct NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00
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{
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NvU32 nvlinkPeerIdMask[NV2080_CTRL_BUS_MAX_NUM_GPUS];
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} NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00;
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typedef NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v14_00 NV2080_CTRL_BUS_GET_NVLINK_PEER_ID_MASK_PARAMS_v;
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typedef struct NV2080_CTRL_BIOS_GET_SKU_INFO_PARAMS_v03_00
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{
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NvU32 BoardID;
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@@ -783,7 +776,17 @@ typedef struct VGPU_STATIC_PROPERTIES_v1B_01
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NvBool bPblObjNotPresent;
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} VGPU_STATIC_PROPERTIES_v1B_01;
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typedef VGPU_STATIC_PROPERTIES_v1B_01 VGPU_STATIC_PROPERTIES_v;
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typedef struct VGPU_STATIC_PROPERTIES_v26_03
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{
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NvU32 encSessionStatsReportingState;
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NvBool bProfilingTracingEnabled;
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NvBool bDebuggingEnabled;
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NvU32 channelCount;
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NvBool bPblObjNotPresent;
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NvU64 vmmuSegmentSize NV_ALIGN_BYTES(8);
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} VGPU_STATIC_PROPERTIES_v26_03;
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typedef VGPU_STATIC_PROPERTIES_v26_03 VGPU_STATIC_PROPERTIES_v;
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typedef struct NV2080_CTRL_GPU_COMPUTE_PROFILE_v20_04
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{
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@@ -961,23 +964,6 @@ typedef struct alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06
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typedef alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 alloc_object_NVC638_ALLOCATION_PARAMETERS_v;
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typedef struct alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04
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{
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NvU32 type;
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NvU32 flags;
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NvU32 attr;
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NvU32 attr2;
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NvU64 base NV_ALIGN_BYTES(8);
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NvU64 align NV_ALIGN_BYTES(8);
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NvU64 limit NV_ALIGN_BYTES(8);
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NvU32 flagsOs02;
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NvHandle hExportSubdevice;
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NvHandle hExportHandle;
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NvHandle hExportClient;
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} alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04;
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typedef alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04 alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v;
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typedef struct alloc_object_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_v13_03
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{
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NvU64 offset NV_ALIGN_BYTES(8);
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@@ -1074,7 +1060,6 @@ typedef union alloc_object_params_v25_08
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alloc_object_NV_NVJPG_ALLOCATION_PARAMETERS_v20_02 param_NV_NVJPG_ALLOCATION_PARAMETERS;
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alloc_object_NV503B_ALLOC_PARAMETERS_v1D_02 param_NV503B_ALLOC_PARAMETERS;
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alloc_object_NVC637_ALLOCATION_PARAMETERS_v13_00 param_NVC637_ALLOCATION_PARAMETERS;
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alloc_object_NV_FLA_MEMORY_ALLOCATION_PARAMS_v17_04 param_NV_FLA_MEMORY_ALLOCATION_PARAMS;
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alloc_object_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_v13_03 param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS;
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alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 param_NVC638_ALLOCATION_PARAMETERS;
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alloc_object_NV503C_ALLOC_PARAMETERS_v18_15 param_NV503C_ALLOC_PARAMETERS;
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@@ -1087,7 +1072,37 @@ typedef union alloc_object_params_v25_08
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alloc_object_NV2081_ALLOC_PARAMETERS_v25_08 param_NV2081_ALLOC_PARAMETERS;
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} alloc_object_params_v25_08;
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typedef alloc_object_params_v25_08 alloc_object_params_v;
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typedef union alloc_object_params_v26_00
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{
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alloc_object_NV50_TESLA_v03_00 param_NV50_TESLA;
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alloc_object_GT212_DMA_COPY_v03_00 param_GT212_DMA_COPY;
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alloc_object_GF100_DISP_SW_v03_00 param_GF100_DISP_SW;
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alloc_object_KEPLER_CHANNEL_GROUP_A_v12_08 param_KEPLER_CHANNEL_GROUP_A;
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alloc_object_FERMI_CONTEXT_SHARE_A_v04_00 param_FERMI_CONTEXT_SHARE_A;
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alloc_object_NVD0B7_VIDEO_ENCODER_v03_00 param_NVD0B7_VIDEO_ENCODER;
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alloc_object_FERMI_VASPACE_A_v03_00 param_FERMI_VASPACE_A;
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alloc_object_NVB0B0_VIDEO_DECODER_v03_00 param_NVB0B0_VIDEO_DECODER;
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alloc_object_NV83DE_ALLOC_PARAMETERS_v03_00 param_NV83DE_ALLOC_PARAMETERS;
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alloc_object_NVENC_SW_SESSION_v06_01 param_NVENC_SW_SESSION;
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alloc_object_NVC4B0_VIDEO_DECODER_v12_02 param_NVC4B0_VIDEO_DECODER;
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alloc_object_NVFBC_SW_SESSION_v12_04 param_NVFBC_SW_SESSION;
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alloc_object_NV_NVJPG_ALLOCATION_PARAMETERS_v20_02 param_NV_NVJPG_ALLOCATION_PARAMETERS;
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alloc_object_NV503B_ALLOC_PARAMETERS_v1D_02 param_NV503B_ALLOC_PARAMETERS;
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alloc_object_NVC637_ALLOCATION_PARAMETERS_v13_00 param_NVC637_ALLOCATION_PARAMETERS;
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alloc_object_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS_v13_03 param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS;
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alloc_object_NVC638_ALLOCATION_PARAMETERS_v18_06 param_NVC638_ALLOCATION_PARAMETERS;
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alloc_object_NV503C_ALLOC_PARAMETERS_v18_15 param_NV503C_ALLOC_PARAMETERS;
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alloc_object_NVC670_ALLOCATION_PARAMETERS_v1A_01 param_NVC670_ALLOCATION_PARAMETERS;
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alloc_object_NVB2CC_ALLOC_PARAMETERS_v1A_03 param_NVB2CC_ALLOC_PARAMETERS;
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NV_GR_ALLOCATION_PARAMETERS_v1A_17 param_NV_GR_ALLOCATION_PARAMETERS;
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alloc_object_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS_v1A_1B param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS;
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alloc_object_NV00F8_ALLOCATION_PARAMETERS_v1E_0C param_NV00F8_ALLOCATION_PARAMETERS;
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alloc_object_NVC9FA_VIDEO_OFA_v1F_00 param_NVC9FA_VIDEO_OFA;
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alloc_object_NV2081_ALLOC_PARAMETERS_v25_08 param_NV2081_ALLOC_PARAMETERS;
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NvU8 param_padding[NV_ALLOC_STRUCTURE_SIZE_v26_00];
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} alloc_object_params_v26_00;
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typedef alloc_object_params_v26_00 alloc_object_params_v;
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typedef struct gpu_exec_reg_ops_v12_01
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{
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@@ -1872,17 +1887,6 @@ typedef struct NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_v1E_09
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typedef NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_v1E_09 NV2080_CTRL_MC_GET_STATIC_INTR_TABLE_PARAMS_v;
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typedef struct NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v12_09
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{
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NV2080_CTRL_GR_ROUTE_INFO_v12_01 grRouteInfo;
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NvU32 engineId;
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NvU32 alignment;
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NvU32 size;
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NvBool bInfoPopulated;
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} NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v12_09;
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typedef NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v12_09 NV2080_CTRL_GR_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS_v;
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typedef struct NV2080_CTRL_FLA_SETUP_INSTANCE_MEM_BLOCK_PARAMS_v13_04
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{
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NvU64 imbPhysAddr NV_ALIGN_BYTES(8);
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@@ -1928,7 +1932,14 @@ typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06
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NvU32 flags;
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} NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06;
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typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v24_06 NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v;
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typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02
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{
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NV2080_CTRL_GPU_QUERY_ECC_UNIT_STATUS_v15_01 units[NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02];
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NvBool bFatalPoisonError;
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NvU32 flags;
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} NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02;
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typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v26_02 NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS_v;
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typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06
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{
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@@ -1937,7 +1948,14 @@ typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06
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NvU32 flags;
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} NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06;
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typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v24_06 NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v;
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typedef struct NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v26_02
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{
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NV2080_CTRL_GPU_QUERY_ECC_UNIT_STATUS_v15_01 units[NV2080_CTRL_GPU_ECC_UNIT_COUNT_v26_02];
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NvBool bFatalPoisonError;
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NvU32 flags;
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} NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v26_02;
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typedef NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v26_02 NV2080_CTRL_GPU_QUERY_ECC_STATUS_DEPRECATED_RPC_PARAMS_v;
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typedef struct NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS_v15_01
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{
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@@ -2790,6 +2808,39 @@ typedef struct NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D
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typedef NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v;
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typedef struct NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04
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{
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NvU32 sysIdx;
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NvU32 sysl2LtcEnMask;
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} NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04;
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typedef NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04 NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v;
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typedef struct NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04
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{
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NvU32 fbpIndex;
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NvU32 pacEnMask;
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} NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04;
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typedef NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04 NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v;
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typedef struct NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04
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{
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NvU32 fbpIndex;
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NvU64 logicalLtcEnMask NV_ALIGN_BYTES(8);
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} NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04;
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typedef NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04 NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v;
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typedef struct NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04
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{
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NvU32 fbpIndex;
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NvU32 swizzId;
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NvU64 logicalLtcEnMask NV_ALIGN_BYTES(8);
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} NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04;
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typedef NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04 NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v;
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typedef union NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D
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{
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NV2080_CTRL_FB_FS_INFO_INVALID_QUERY_PARAMS_v1A_1D inv;
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@@ -2807,7 +2858,28 @@ typedef union NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D
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NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D fbpLogicalMap;
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} NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D;
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typedef NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v;
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typedef union NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04
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{
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NV2080_CTRL_FB_FS_INFO_INVALID_QUERY_PARAMS_v1A_1D inv;
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NV2080_CTRL_FB_FS_INFO_FBP_MASK_PARAMS_v1A_1D fbp;
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NV2080_CTRL_FB_FS_INFO_LTC_MASK_PARAMS_v1A_1D ltc;
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NV2080_CTRL_FB_FS_INFO_LTS_MASK_PARAMS_v1A_1D lts;
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NV2080_CTRL_FB_FS_INFO_FBPA_MASK_PARAMS_v1A_1D fbpa;
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NV2080_CTRL_FB_FS_INFO_ROP_MASK_PARAMS_v1A_1D rop;
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NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK_PARAMS_v1A_1D dmLtc;
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NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK_PARAMS_v1A_1D dmLts;
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NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK_PARAMS_v1A_1D dmFbpa;
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NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK_PARAMS_v1A_1D dmRop;
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NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK_PARAMS_v1A_1D dmFbpaSubp;
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NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK_PARAMS_v1A_1D fbpaSubp;
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NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP_PARAMS_v1A_1D fbpLogicalMap;
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NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK_PARAMS_v26_04 sysl2Ltc;
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NV2080_CTRL_FB_FS_INFO_PAC_MASK_PARAMS_v26_04 pac;
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NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK_PARAMS_v26_04 logicalLtc;
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NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK_PARAMS_v26_04 dmLogicalLtc;
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} NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04;
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typedef NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04 NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v;
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typedef struct NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D
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{
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@@ -2817,7 +2889,15 @@ typedef struct NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D
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NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D queryParams;
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} NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D;
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typedef NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D NV2080_CTRL_FB_FS_INFO_QUERY_v;
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typedef struct NV2080_CTRL_FB_FS_INFO_QUERY_v26_04
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{
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NvU16 queryType;
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NvU8 reserved[2];
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NvU32 status;
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NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04 queryParams;
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} NV2080_CTRL_FB_FS_INFO_QUERY_v26_04;
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typedef NV2080_CTRL_FB_FS_INFO_QUERY_v26_04 NV2080_CTRL_FB_FS_INFO_QUERY_v;
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typedef struct NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00
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{
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@@ -2826,7 +2906,14 @@ typedef struct NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00
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NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D queries[NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00];
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} NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00;
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typedef NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v24_00 NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v;
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typedef struct NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04
|
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{
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NvU16 numQueries;
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NvU8 reserved[6];
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NV2080_CTRL_FB_FS_INFO_QUERY_v26_04 queries[NV2080_CTRL_FB_FS_INFO_MAX_QUERIES_v24_00];
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} NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04;
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typedef NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v26_04 NV2080_CTRL_FB_GET_FS_INFO_PARAMS_v;
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typedef struct NV2080_CTRL_GRMGR_GR_FS_INFO_GPC_COUNT_PARAMS_v1A_1D
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{
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@@ -3375,6 +3462,15 @@ typedef struct NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_v25_0C
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typedef NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_v25_0C NV2080_CTRL_NVLINK_INBAND_RECEIVED_DATA_PARAMS_v;
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typedef struct GPU_EXEC_SYSPIPE_INFO_v26_01
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{
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NvU32 execPartCount;
|
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NvU32 execPartId[NVC637_CTRL_MAX_EXEC_PARTITIONS_v18_05];
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NvU32 syspipeId[NVC637_CTRL_MAX_EXEC_PARTITIONS_v18_05];
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} GPU_EXEC_SYSPIPE_INFO_v26_01;
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typedef GPU_EXEC_SYSPIPE_INFO_v26_01 GPU_EXEC_SYSPIPE_INFO_v;
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#endif
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@@ -3492,6 +3588,7 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd)
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case NVC4B7_VIDEO_ENCODER:
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case NVC7B7_VIDEO_ENCODER:
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case NVC9B7_VIDEO_ENCODER:
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case NVCFB7_VIDEO_ENCODER:
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return 6; // "param_NVD0B7_VIDEO_ENCODER"
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case FERMI_VASPACE_A:
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@@ -3520,6 +3617,7 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd)
|
||||
case NVB8B0_VIDEO_DECODER:
|
||||
case NVC9B0_VIDEO_DECODER:
|
||||
case NVCDB0_VIDEO_DECODER:
|
||||
case NVCFB0_VIDEO_DECODER:
|
||||
return 12; // "param_NVC4B0_VIDEO_DECODER"
|
||||
|
||||
case NVFBC_SW_SESSION:
|
||||
@@ -3529,6 +3627,7 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd)
|
||||
case NVB8D1_VIDEO_NVJPG:
|
||||
case NVC9D1_VIDEO_NVJPG:
|
||||
case NVCDD1_VIDEO_NVJPG:
|
||||
case NVCFD1_VIDEO_NVJPG:
|
||||
return 14; // "param_NV_NVJPG_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NV50_P2P:
|
||||
@@ -3537,31 +3636,28 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd)
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case AMPERE_SMC_PARTITION_REF:
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||||
return 16; // "param_NVC637_ALLOCATION_PARAMETERS"
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||||
|
||||
case NV01_MEMORY_FLA:
|
||||
return 17; // "param_NV_FLA_MEMORY_ALLOCATION_PARAMS"
|
||||
|
||||
case NV01_MEMORY_VIRTUAL:
|
||||
return 18; // "param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS"
|
||||
return 17; // "param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS"
|
||||
|
||||
case AMPERE_SMC_EXEC_PARTITION_REF:
|
||||
return 19; // "param_NVC638_ALLOCATION_PARAMETERS"
|
||||
return 18; // "param_NVC638_ALLOCATION_PARAMETERS"
|
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|
||||
case NV50_THIRD_PARTY_P2P:
|
||||
return 20; // "param_NV503C_ALLOC_PARAMETERS"
|
||||
return 19; // "param_NV503C_ALLOC_PARAMETERS"
|
||||
|
||||
case NVC670_DISPLAY:
|
||||
return 21; // "param_NVC670_ALLOCATION_PARAMETERS"
|
||||
return 20; // "param_NVC670_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NVC67B_WINDOW_IMM_CHANNEL_DMA:
|
||||
case NVC67D_CORE_CHANNEL_DMA:
|
||||
case NVC67E_WINDOW_CHANNEL_DMA:
|
||||
return 22; // "param_NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS"
|
||||
return 21; // "param_NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS"
|
||||
|
||||
case MAXWELL_PROFILER_CONTEXT:
|
||||
return 23; // "param_NVB1CC_ALLOC_PARAMETERS"
|
||||
return 22; // "param_NVB1CC_ALLOC_PARAMETERS"
|
||||
|
||||
case MAXWELL_PROFILER_DEVICE:
|
||||
return 24; // "param_NVB2CC_ALLOC_PARAMETERS"
|
||||
return 23; // "param_NVB2CC_ALLOC_PARAMETERS"
|
||||
|
||||
case MAXWELL_COMPUTE_A:
|
||||
case PASCAL_COMPUTE_A:
|
||||
@@ -3573,24 +3669,178 @@ uint32_t _get_union_member_index_alloc_object_params_v25_08(NvU32 cmd)
|
||||
case PASCAL_COMPUTE_B:
|
||||
case VOLTA_COMPUTE_B:
|
||||
case AMPERE_COMPUTE_B:
|
||||
return 25; // "param_NV_GR_ALLOCATION_PARAMETERS"
|
||||
return 24; // "param_NV_GR_ALLOCATION_PARAMETERS"
|
||||
|
||||
case UVM_CHANNEL_RETAINER:
|
||||
return 26; // "param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS"
|
||||
return 25; // "param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS"
|
||||
|
||||
case NV_MEMORY_FABRIC:
|
||||
return 27; // "param_NV00F8_ALLOCATION_PARAMETERS"
|
||||
return 26; // "param_NV00F8_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NVC9FA_VIDEO_OFA:
|
||||
case NVCDFA_VIDEO_OFA:
|
||||
case NVC6FA_VIDEO_OFA:
|
||||
case NVC7FA_VIDEO_OFA:
|
||||
case NVB8FA_VIDEO_OFA:
|
||||
return 28; // "param_NVC9FA_VIDEO_OFA"
|
||||
case NVCFFA_VIDEO_OFA:
|
||||
return 27; // "param_NVC9FA_VIDEO_OFA"
|
||||
|
||||
case NV2081_BINAPI:
|
||||
case NV2082_BINAPI_PRIVILEGED:
|
||||
return 29; // "param_NV2081_ALLOC_PARAMETERS"
|
||||
return 28; // "param_NV2081_ALLOC_PARAMETERS"
|
||||
|
||||
default:
|
||||
return UNION_UNKNOWN_FIELD_PRINT;
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t _get_union_member_index_alloc_object_params_v26_00(NvU32 cmd)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case G82_TESLA:
|
||||
case GT200_TESLA:
|
||||
case GT214_TESLA:
|
||||
case NV50_TESLA:
|
||||
case FERMI_A:
|
||||
case KEPLER_A:
|
||||
case KEPLER_B:
|
||||
case MAXWELL_A:
|
||||
case MAXWELL_B:
|
||||
case PASCAL_A:
|
||||
case PASCAL_B:
|
||||
case VOLTA_A:
|
||||
case TURING_A:
|
||||
case AMPERE_A:
|
||||
return 0; // "param_NV50_TESLA"
|
||||
|
||||
case KEPLER_DMA_COPY_A:
|
||||
case MAXWELL_DMA_COPY_A:
|
||||
case PASCAL_DMA_COPY_A:
|
||||
case VOLTA_DMA_COPY_A:
|
||||
case TURING_DMA_COPY_A:
|
||||
case AMPERE_DMA_COPY_A:
|
||||
return 1; // "param_GT212_DMA_COPY"
|
||||
|
||||
case GF100_MSPPP:
|
||||
return 2; // "param_G98_MSPPP"
|
||||
|
||||
case GF100_DISP_SW:
|
||||
return 3; // "param_GF100_DISP_SW"
|
||||
|
||||
case KEPLER_CHANNEL_GROUP_A:
|
||||
return 4; // "param_KEPLER_CHANNEL_GROUP_A"
|
||||
|
||||
case FERMI_CONTEXT_SHARE_A:
|
||||
return 5; // "param_FERMI_CONTEXT_SHARE_A"
|
||||
|
||||
case NVD0B7_VIDEO_ENCODER:
|
||||
case NVC1B7_VIDEO_ENCODER:
|
||||
case NVC2B7_VIDEO_ENCODER:
|
||||
case NVC3B7_VIDEO_ENCODER:
|
||||
case NVC4B7_VIDEO_ENCODER:
|
||||
case NVC7B7_VIDEO_ENCODER:
|
||||
case NVC9B7_VIDEO_ENCODER:
|
||||
case NVCFB7_VIDEO_ENCODER:
|
||||
return 6; // "param_NVD0B7_VIDEO_ENCODER"
|
||||
|
||||
case FERMI_VASPACE_A:
|
||||
return 7; // "param_FERMI_VASPACE_A"
|
||||
|
||||
case NVA0B0_VIDEO_DECODER:
|
||||
case NVB0B0_VIDEO_DECODER:
|
||||
case NVC1B0_VIDEO_DECODER:
|
||||
case NVC2B0_VIDEO_DECODER:
|
||||
case NVC3B0_VIDEO_DECODER:
|
||||
case NV95B1_VIDEO_MSVLD:
|
||||
return 8; // "param_NVB0B0_VIDEO_DECODER"
|
||||
|
||||
case NV95B2_VIDEO_MSPDEC:
|
||||
return 9; // "param_NV95B2_VIDEO_MSPDEC"
|
||||
|
||||
case GT200_DEBUGGER:
|
||||
return 10; // "param_NV83DE_ALLOC_PARAMETERS"
|
||||
|
||||
case NVENC_SW_SESSION:
|
||||
return 11; // "param_NVENC_SW_SESSION"
|
||||
|
||||
case NVC4B0_VIDEO_DECODER:
|
||||
case NVC6B0_VIDEO_DECODER:
|
||||
case NVC7B0_VIDEO_DECODER:
|
||||
case NVB8B0_VIDEO_DECODER:
|
||||
case NVC9B0_VIDEO_DECODER:
|
||||
case NVCDB0_VIDEO_DECODER:
|
||||
case NVCFB0_VIDEO_DECODER:
|
||||
return 12; // "param_NVC4B0_VIDEO_DECODER"
|
||||
|
||||
case NVFBC_SW_SESSION:
|
||||
return 13; // "param_NVFBC_SW_SESSION"
|
||||
|
||||
case NVC4D1_VIDEO_NVJPG:
|
||||
case NVB8D1_VIDEO_NVJPG:
|
||||
case NVC9D1_VIDEO_NVJPG:
|
||||
case NVCDD1_VIDEO_NVJPG:
|
||||
case NVCFD1_VIDEO_NVJPG:
|
||||
return 14; // "param_NV_NVJPG_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NV50_P2P:
|
||||
return 15; // "param_NV503B_ALLOC_PARAMETERS"
|
||||
|
||||
case AMPERE_SMC_PARTITION_REF:
|
||||
return 16; // "param_NVC637_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NV01_MEMORY_VIRTUAL:
|
||||
return 17; // "param_NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS"
|
||||
|
||||
case AMPERE_SMC_EXEC_PARTITION_REF:
|
||||
return 18; // "param_NVC638_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NV50_THIRD_PARTY_P2P:
|
||||
return 19; // "param_NV503C_ALLOC_PARAMETERS"
|
||||
|
||||
case NVC670_DISPLAY:
|
||||
return 20; // "param_NVC670_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NVC67B_WINDOW_IMM_CHANNEL_DMA:
|
||||
case NVC67D_CORE_CHANNEL_DMA:
|
||||
case NVC67E_WINDOW_CHANNEL_DMA:
|
||||
return 21; // "param_NV50VAIO_CHANNELDMA_ALLOCATION_PARAMETERS"
|
||||
|
||||
case MAXWELL_PROFILER_CONTEXT:
|
||||
return 22; // "param_NVB1CC_ALLOC_PARAMETERS"
|
||||
|
||||
case MAXWELL_PROFILER_DEVICE:
|
||||
return 23; // "param_NVB2CC_ALLOC_PARAMETERS"
|
||||
|
||||
case MAXWELL_COMPUTE_A:
|
||||
case PASCAL_COMPUTE_A:
|
||||
case VOLTA_COMPUTE_A:
|
||||
case TURING_COMPUTE_A:
|
||||
case AMPERE_COMPUTE_A:
|
||||
case HOPPER_COMPUTE_A:
|
||||
case MAXWELL_COMPUTE_B:
|
||||
case PASCAL_COMPUTE_B:
|
||||
case VOLTA_COMPUTE_B:
|
||||
case AMPERE_COMPUTE_B:
|
||||
return 24; // "param_NV_GR_ALLOCATION_PARAMETERS"
|
||||
|
||||
case UVM_CHANNEL_RETAINER:
|
||||
return 25; // "param_NV_UVM_CHANNEL_RETAINER_ALLOC_PARAMS"
|
||||
|
||||
case NV_MEMORY_FABRIC:
|
||||
return 26; // "param_NV00F8_ALLOCATION_PARAMETERS"
|
||||
|
||||
case NVC9FA_VIDEO_OFA:
|
||||
case NVCDFA_VIDEO_OFA:
|
||||
case NVC6FA_VIDEO_OFA:
|
||||
case NVC7FA_VIDEO_OFA:
|
||||
case NVB8FA_VIDEO_OFA:
|
||||
case NVCFFA_VIDEO_OFA:
|
||||
return 27; // "param_NVC9FA_VIDEO_OFA"
|
||||
|
||||
case NV2081_BINAPI:
|
||||
case NV2082_BINAPI_PRIVILEGED:
|
||||
return 28; // "param_NV2081_ALLOC_PARAMETERS"
|
||||
|
||||
default:
|
||||
return UNION_UNKNOWN_FIELD_PRINT;
|
||||
@@ -3649,6 +3899,66 @@ uint32_t _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D(NvU32
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04(NvU32 cmd)
|
||||
{
|
||||
switch (cmd)
|
||||
{
|
||||
case NV2080_CTRL_FB_FS_INFO_INVALID_QUERY:
|
||||
return 0; // "inv"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_FBP_MASK:
|
||||
return 1; // "fbp"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_LTC_MASK:
|
||||
return 2; // "ltc"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_LTS_MASK:
|
||||
return 3; // "lts"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_FBPA_MASK:
|
||||
return 4; // "fbpa"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_ROP_MASK:
|
||||
return 5; // "rop"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTC_MASK:
|
||||
return 6; // "dmLtc"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LTS_MASK:
|
||||
return 7; // "dmLts"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_MASK:
|
||||
return 8; // "dmFbpa"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_ROP_MASK:
|
||||
return 9; // "dmRop"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_FBPA_SUBP_MASK:
|
||||
return 10; // "dmFbpaSubp"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_FBPA_SUBP_MASK:
|
||||
return 11; // "fbpaSubp"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_FBP_LOGICAL_MAP:
|
||||
return 12; // "fbpLogicalMap"
|
||||
|
||||
case NV2080_CTRL_SYSL2_FS_INFO_SYSLTC_MASK:
|
||||
return 13; // "sysl2Ltc"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_PAC_MASK:
|
||||
return 14; // "pac"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_LOGICAL_LTC_MASK:
|
||||
return 15; // "logicalLtc"
|
||||
|
||||
case NV2080_CTRL_FB_FS_INFO_PROFILER_MON_LOGICAL_LTC_MASK:
|
||||
return 16; // "dmLogicalLtc"
|
||||
|
||||
default:
|
||||
return UNION_UNKNOWN_FIELD_PRINT;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -3733,6 +4043,15 @@ static NV_STATUS get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_v1A_1D_quer
|
||||
*index = _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v1A_1D(param->queryType);
|
||||
return NV_OK;
|
||||
}
|
||||
static NV_STATUS get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_v26_04_queryParams(void *msg, NvS32 bytes_remaining, uint32_t* index)
|
||||
{
|
||||
NV2080_CTRL_FB_FS_INFO_QUERY_v26_04 *param = msg;
|
||||
|
||||
if ((NvS32)(NV_OFFSETOF(NV2080_CTRL_FB_FS_INFO_QUERY_v26_04, queryType) + sizeof(param->queryType)) > bytes_remaining)
|
||||
return NV_ERR_BUFFER_TOO_SMALL;
|
||||
*index = _get_union_member_index_NV2080_CTRL_FB_FS_INFO_QUERY_DATA_v26_04(param->queryType);
|
||||
return NV_OK;
|
||||
}
|
||||
static NV_STATUS get_union_member_index_NV2080_CTRL_GRMGR_GR_FS_INFO_QUERY_PARAMS_v1A_1D_queryData(void *msg, NvS32 bytes_remaining, uint32_t* index)
|
||||
{
|
||||
NV2080_CTRL_GRMGR_GR_FS_INFO_QUERY_PARAMS_v1A_1D *param = msg;
|
||||
|
||||
Reference in New Issue
Block a user