mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-05-04 21:21:43 +00:00
Bernhard Stoeckner
committed by
Gaurav Juvekar
Gaurav Juvekar
parent
caa2dd11a0
commit
3084c04453
632
src/nvidia/inc/kernel/vgpu/rpc.h
Normal file
632
src/nvidia/inc/kernel/vgpu/rpc.h
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@@ -0,0 +1,632 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2008-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
|
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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//******************************************************************************
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//
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// Declarations for the RPC module.
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//
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// Description:
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// This module declares the RPC interface functions/macros.
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//
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//******************************************************************************
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#ifndef __vgpu_dev_nv_rpc_h__
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#define __vgpu_dev_nv_rpc_h__
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#include "class/cl84a0.h"
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#include "vgpu/rpc_headers.h"
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#include "gpu/dce_client/dce_client.h"
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#include "objrpc.h"
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#include "rpc_vgpu.h"
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#include "vgpu_events.h"
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#include "kernel/gpu/fifo/kernel_fifo.h"
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typedef struct ContextDma ContextDma;
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#define NV_RM_RPC_ALLOC_SHARE_DEVICE_FWCLIENT(pGpu, hclient, hdevice, hclientshare, htargetclient, htargetdevice, hclass, \
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allocflags, vasize, vamode, bFirstDevice, status) \
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do \
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{ \
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RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
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NV0000_ALLOC_PARAMETERS root_alloc_params = {0}; \
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\
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root_alloc_params.hClient = hclient; \
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\
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if (!IsT234DorBetter(pGpu)) \
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{ \
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RmClient *pClient = serverutilGetClientUnderLock(hclient); \
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\
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/* Get process ID from the client database */ \
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if (pClient != NULL) \
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{ \
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CALL_CONTEXT *pCallContext = resservGetTlsCallContext(); \
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NV_ASSERT_OR_RETURN(pCallContext != NULL, NV_ERR_INVALID_STATE); \
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\
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if (RMCFG_FEATURE_PLATFORM_UNIX && \
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(pCallContext->secInfo.privLevel >= RS_PRIV_LEVEL_KERNEL)) \
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{ \
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root_alloc_params.processID = KERNEL_PID; \
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} \
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else \
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{ \
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root_alloc_params.processID = pClient->ProcID; \
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NV_ASSERT(root_alloc_params.processID == osGetCurrentProcess()); \
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} \
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} \
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else \
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NV_ASSERT(0); \
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} \
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\
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if (bFirstDevice) \
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{ \
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status = pRmApi->AllocWithHandle(pRmApi, hclient, NV01_NULL_OBJECT, \
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NV01_NULL_OBJECT, NV01_ROOT, \
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&root_alloc_params, sizeof(root_alloc_params)); \
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} \
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else \
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{ \
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status = NV_OK; \
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} \
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\
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if (status == NV_OK) \
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{ \
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NV0080_ALLOC_PARAMETERS device_alloc_params = {0}; \
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\
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device_alloc_params.hClientShare = hclientshare; \
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device_alloc_params.hTargetClient = htargetclient; \
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device_alloc_params.hTargetDevice = htargetdevice; \
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device_alloc_params.flags = allocflags; \
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device_alloc_params.vaSpaceSize = vasize; \
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\
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status = pRmApi->AllocWithHandle(pRmApi, hclient, hclient, hdevice, \
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hclass, &device_alloc_params, \
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sizeof(device_alloc_params)); \
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} \
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else \
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NV_ASSERT(0); \
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} \
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while (0)
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#define NV_RM_RPC_ALLOC_MEMORY(pGpu, hclient, hdevice, hmemory, hclass, \
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flags, pmemdesc, status) \
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do \
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{ \
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OBJRPC *pRpc; \
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pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL) \
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&& (!(IS_VIRTUAL_WITH_SRIOV(pGpu) && \
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!gpuIsWarBug200577889SriovHeavyEnabled(pGpu) && \
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!NV_IS_MODS))) { \
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if (IS_DCE_CLIENT(pGpu)) \
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{ \
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RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
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NV_MEMORY_LIST_ALLOCATION_PARAMS listAllocParams = {0}; \
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listAllocParams.pteAdjust = pmemdesc->PteAdjust; \
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listAllocParams.format = memdescGetPteKind(pmemdesc); \
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listAllocParams.size = pmemdesc->Size; \
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listAllocParams.pageCount = pmemdesc->PageCount; \
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listAllocParams.pageNumberList = memdescGetPteArray(pmemdesc, AT_GPU); \
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listAllocParams.hClient = NV01_NULL_OBJECT; \
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listAllocParams.hParent = NV01_NULL_OBJECT; \
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listAllocParams.hObject = NV01_NULL_OBJECT; \
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listAllocParams.limit = pmemdesc->Size - 1; \
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listAllocParams.flagsOs02 = (DRF_DEF(OS02,_FLAGS,_MAPPING,_NO_MAP) | \
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DRF_DEF(OS02,_FLAGS,_PHYSICALITY,_NONCONTIGUOUS) | \
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(flags & DRF_SHIFTMASK(NVOS02_FLAGS_COHERENCY))); \
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status = pRmApi->AllocWithHandle(pRmApi, hclient, hdevice, \
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hmemory, NV01_MEMORY_LIST_SYSTEM, &listAllocParams, \
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sizeof(listAllocParams)); \
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} \
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else \
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{ \
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status = rpcAllocMemory_HAL(pGpu, pRpc, hclient, hdevice, hmemory, \
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hclass, flags, pmemdesc); \
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} \
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} else if (pRpc == NULL) \
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
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} \
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while (0)
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#define NV_RM_RPC_MAP_MEMORY_DMA(pGpu, hclient, hdevice, hdma, hmemory, offset, length, flags, \
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dmaoffset, status) \
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do \
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{ \
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OBJRPC *pRpc; \
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pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL) && \
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!gpuIsSplitVasManagementServerClientRmEnabled(pGpu)) \
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status = rpcMapMemoryDma_HAL(pGpu, pRpc, hclient, hdevice, hdma, hmemory, offset, \
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length, flags, dmaoffset); \
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else if (pRpc == NULL) \
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
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} while (0)
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#define NV_RM_RPC_UNMAP_MEMORY_DMA(pGpu, hclient, hdevice, hdma, hmemory, flags, dmaoffset, \
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status) \
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do \
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{ \
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OBJRPC *pRpc; \
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pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL) && \
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!gpuIsSplitVasManagementServerClientRmEnabled(pGpu)) \
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status = rpcUnmapMemoryDma_HAL(pGpu, pRpc, hclient, hdevice, hdma, hmemory, \
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flags, dmaoffset); \
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else if (pRpc == NULL) \
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
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} while (0)
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#define NV_RM_RPC_IDLE_CHANNELS(pGpu, phclients, phdevices, phchannels, \
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nentries, flags, timeout, status) \
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do \
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{ \
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OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL)) \
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status = rpcIdleChannels_HAL(pGpu, pRpc, phclients, phdevices, \
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phchannels, nentries, flags, timeout); \
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else if (pRpc == NULL) \
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
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} while(0)
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#define NV_RM_RPC_ALLOC_SHARE_DEVICE(pGpu, hclient, hdevice, hclientshare, htargetclient, htargetdevice, hclass, \
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allocflags, vasize, vamode, bFirstDevice, status) \
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do \
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{ \
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OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL)) \
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{ \
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if (IS_GSP_CLIENT(pGpu)) \
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{ \
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NV_RM_RPC_ALLOC_SHARE_DEVICE_FWCLIENT(pGpu, hclient, hdevice, hclientshare, htargetclient, htargetdevice, hclass, \
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allocflags, vasize, vamode, bFirstDevice, status); \
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} \
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else \
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status = rpcAllocShareDevice_HAL(pGpu, pRpc, hclient, hdevice, hclientshare, \
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htargetclient, htargetdevice, hclass, \
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allocflags, vasize, vamode); \
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} else if (pRpc == NULL) \
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return NV_ERR_INSUFFICIENT_RESOURCES; \
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} \
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while (0)
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/*
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* Control RPC macro
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*/
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#define NV_RM_RPC_CONTROL(pGpu, hClient, hObject, cmd, pParams, paramSize, status) \
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do \
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{ \
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OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL)) \
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{ \
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if (IS_GSP_CLIENT(pGpu)) \
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{ \
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RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
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status = pRmApi->Control(pRmApi, hClient, hObject, cmd, \
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pParams, paramSize); \
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} \
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else \
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{ \
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status = rpcDmaControl_wrapper(pGpu, pRpc, hClient, hObject, \
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cmd, pParams, paramSize); \
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} \
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} else if (pRpc == NULL) \
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
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} while (0)
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#define NV_RM_RPC_ALLOC_CHANNEL(pGpu, hclient, hparent, hchannel, hclass, \
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pGpfifoAllocParams, pchid, status) \
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do \
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{ \
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OBJRPC *pRpc; \
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pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL)) \
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{ \
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if (IS_GSP_CLIENT(pGpu)) \
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{ \
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RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
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status = pRmApi->AllocWithHandle(pRmApi, hclient, hparent, hchannel, \
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hclass, pGpfifoAllocParams, \
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sizeof(*pGpfifoAllocParams)); \
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} \
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else \
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{ \
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status = rpcAllocChannelDma_HAL(pGpu, pRpc, hclient, hparent, hchannel, \
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hclass, pGpfifoAllocParams, pchid); \
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} \
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} else if (pRpc == NULL) \
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
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} \
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while (0)
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#define NV_RM_RPC_ALLOC_OBJECT(pGpu, hclient, hchannel, hobject, hclass, params, paramsSize, status) \
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do \
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{ \
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OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL)) \
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{ \
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if (IS_GSP_CLIENT(pGpu)) \
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{ \
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RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
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status = pRmApi->AllocWithHandle(pRmApi, hclient, hchannel, hobject, \
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hclass, params, paramsSize); \
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} \
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else \
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{ \
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status = rpcAllocObject_HAL(pGpu, pRpc, \
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hclient, hchannel, hobject, hclass, params);\
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} \
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} \
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} while (0)
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/*
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* free RPC macros
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*/
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#define NV_RM_RPC_FREE(pGpu, hclient, hparent, hobject, status) \
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do \
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{ \
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OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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if ((status == NV_OK) && (pRpc != NULL)) \
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{ \
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if (IS_GSP_CLIENT(pGpu)) \
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{ \
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RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
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status = pRmApi->Free(pRmApi, hclient, hobject); \
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||||
} \
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else \
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{ \
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status = rpcFree_HAL(pGpu, pRpc, hclient, hparent, hobject); \
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} \
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} else if (pRpc == NULL) \
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
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} while (0)
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#define NV_RM_RPC_FREE_ON_ERROR(pGpu, hclient, hparent, hobject) \
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do \
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{ \
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OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
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NV_ASSERT(pRpc != NULL); \
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/* used in failure cases, macro doesn't overwrite rmStatus */ \
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if (pRpc != NULL) \
|
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{ \
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if (IS_GSP_CLIENT(pGpu)) \
|
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{ \
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RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
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pRmApi->Free(pRmApi, hclient, hobject); \
|
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} \
|
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else \
|
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{ \
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rpcFree_HAL(pGpu, pRpc, hclient, hparent, hobject); \
|
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} \
|
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} else if (pRpc == NULL) \
|
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status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} \
|
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while (0)
|
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|
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#define NV_RM_RPC_ALLOC_EVENT(pGpu, hclient, hparentclient, hchannel, hobject, \
|
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hevent, hclass, idx, status) \
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do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
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NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
{ \
|
||||
if (IS_GSP_CLIENT(pGpu)) \
|
||||
{ \
|
||||
RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
|
||||
NV0005_ALLOC_PARAMETERS allocParams = {0}; \
|
||||
allocParams.hParentClient = hparentclient; \
|
||||
allocParams.hClass = hclass; \
|
||||
allocParams.notifyIndex = idx | NV01_EVENT_CLIENT_RM; \
|
||||
allocParams.data = 0; \
|
||||
status = pRmApi->AllocWithHandle(pRmApi, hclient, \
|
||||
hobject, hevent, \
|
||||
hclass, &allocParams, \
|
||||
sizeof(allocParams)); \
|
||||
} \
|
||||
else \
|
||||
{ \
|
||||
status = rpcAllocEvent_HAL(pGpu, pRpc, hclient, hparentclient, \
|
||||
hchannel, hobject, hevent, hclass, idx);\
|
||||
} \
|
||||
} else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while(0)
|
||||
|
||||
#define NV_RM_RPC_ALLOC_SUBDEVICE(pGpu, hclient, hdevice, hsubdevice, \
|
||||
hclass, subDeviceInst, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
{ \
|
||||
if (IS_GSP_CLIENT(pGpu)) \
|
||||
{ \
|
||||
RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
|
||||
NV2080_ALLOC_PARAMETERS alloc_params = {0}; \
|
||||
\
|
||||
alloc_params.subDeviceId = subDeviceInst; \
|
||||
\
|
||||
status = pRmApi->AllocWithHandle(pRmApi, hclient, hdevice, hsubdevice, \
|
||||
hclass, &alloc_params, \
|
||||
sizeof(alloc_params)); \
|
||||
} \
|
||||
else \
|
||||
status = rpcAllocSubdevice_HAL(pGpu, pRpc, hclient, hdevice, \
|
||||
hsubdevice, hclass, subDeviceInst); \
|
||||
} else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_DUP_OBJECT(pGpu, hclient, hparent, hobject, hclient_src, \
|
||||
hobject_src, flags, bAutoFreeRpc, pDstRef, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
{ \
|
||||
if (IS_GSP_CLIENT(pGpu)) \
|
||||
{ \
|
||||
RM_API *pRmApi = GPU_GET_PHYSICAL_RMAPI(pGpu); \
|
||||
status = pRmApi->DupObject(pRmApi, hclient, hparent, \
|
||||
&hobject, hclient_src, \
|
||||
hobject_src, flags); \
|
||||
} \
|
||||
else \
|
||||
status = rpcDupObject_HAL(pGpu, pRpc, hclient, hparent, \
|
||||
hobject, hclient_src, \
|
||||
hobject_src, flags); \
|
||||
if ((bAutoFreeRpc) && (pDstRef != NULL) && (status == NV_OK)) \
|
||||
{ \
|
||||
RmResource *pRmResource; \
|
||||
pRmResource = dynamicCast(((RsResourceRef*)pDstRef)->pResource, RmResource); \
|
||||
pRmResource->bRpcFree = NV_TRUE; \
|
||||
} \
|
||||
} else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
static inline void NV_RM_RPC_MANAGE_HW_RESOURCE_ALLOC(OBJGPU *pGpu, ...) { return; }
|
||||
static inline void NV_RM_RPC_MANAGE_HW_RESOURCE_FREE(OBJGPU *pGpu, ...) { return; }
|
||||
static inline void NV_RM_RPC_SIM_UPDATE_DISP_CONTEXT_DMA(OBJGPU *pGpu, ...) { return; }
|
||||
static inline void NV_RM_RPC_SIM_DELETE_DISP_CONTEXT_DMA(OBJGPU *pGpu, ...) { return; }
|
||||
static inline void NV_RM_RPC_SIM_UPDATE_DISP_CHANNEL_INFO(OBJGPU *pGpu, ...) { return; }
|
||||
static inline void NV_RM_RPC_SIM_FREE_INFRA(OBJGPU *pGpu, ...) { return; }
|
||||
|
||||
#define NV_RM_RPC_SET_GUEST_SYSTEM_INFO(pGpu, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = RmRpcSetGuestSystemInfo(pGpu, pRpc); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while(0)
|
||||
|
||||
#define NV_RM_RPC_SET_SYSMEM_DIRTY_PAGE_TRACKING_BUFFER(pGpu, status, bitmapInfo) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcSetSysmemDirtyPageTrackingBuffer_HAL(pGpu, pRpc, bitmapInfo);\
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while(0)
|
||||
|
||||
#define NV_RM_RPC_UNLOADING_GUEST_DRIVER(pGpu, status, bInPMTransition, bGc6Entering, newPMLevel) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcUnloadingGuestDriver_HAL(pGpu, pRpc, bInPMTransition, bGc6Entering, newPMLevel); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} \
|
||||
while (0)
|
||||
|
||||
#define NV_RM_RPC_GPU_EXEC_REG_OPS(pGpu, hClient, hObject, pParams, pRegOps, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcGpuExecRegOps_HAL(pGpu, pRpc, hClient, hObject, pParams, pRegOps); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} \
|
||||
while (0)
|
||||
|
||||
#define NV_RM_RPC_REGISTER_VIRTUAL_EVENT_BUFFER(pGpu, hClient, hSubdevice, hEventBuffer, hBufferHeader, hRecordBuffer, recordSize, recordCount, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcRegisterVirtualEventBuffer_HAL(pGpu, pRpc, hClient, hSubdevice, hEventBuffer, hBufferHeader, hRecordBuffer, recordSize, recordCount); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_UPDATE_BAR_PDE(pGpu, barType, entryValue, entryLevelShift, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcUpdateBarPde_HAL(pGpu, pRpc, barType, entryValue, entryLevelShift); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_SET_PAGE_DIRECTORY(pGpu, hClient, hDevice, pParams, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcSetPageDirectory_HAL(pGpu, pRpc, hClient, hDevice, pParams); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_UNSET_PAGE_DIRECTORY(pGpu, hClient, hDevice, pParams, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcUnsetPageDirectory_HAL(pGpu, pRpc, hClient, hDevice, pParams); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
static inline void NV_RM_RPC_PMA_SCRUBBER_SHARED_BUFFER_GUEST_PAGES_OPERATION(OBJGPU *pGpu, ...) { return; }
|
||||
|
||||
#define NV_RM_RPC_INVALIDATE_TLB(pGpu, status, pdbAddress, regVal) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcInvalidateTlb_HAL(pGpu, pRpc, pdbAddress, regVal); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while(0)
|
||||
|
||||
//
|
||||
// DCE_CLIENT_RM specific RPCs
|
||||
//
|
||||
|
||||
#define NV_RM_RPC_DCE_RM_INIT(pGpu, bInit, status) do {} while (0)
|
||||
|
||||
//
|
||||
// GSP_CLIENT_RM specific RPCs
|
||||
//
|
||||
|
||||
#define NV_RM_RPC_GET_GSP_STATIC_INFO(pGpu, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcGetGspStaticInfo_HAL(pGpu, pRpc); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_GSP_SET_SYSTEM_INFO(pGpu, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcGspSetSystemInfo_HAL(pGpu, pRpc); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_SET_REGISTRY(pGpu, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcSetRegistry_HAL(pGpu, pRpc); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_DUMP_PROTOBUF_COMPONENT(pGpu, status, pPrbEnc, pNvDumpState, \
|
||||
component) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcDumpProtobufComponent_HAL(pGpu, pRpc, pPrbEnc, \
|
||||
pNvDumpState, component); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
#define NV_RM_RPC_ECC_NOTIFIER_WRITE_ACK(pGpu, status) \
|
||||
do \
|
||||
{ \
|
||||
OBJRPC *pRpc = GPU_GET_RPC(pGpu); \
|
||||
NV_ASSERT(pRpc != NULL); \
|
||||
if ((status == NV_OK) && (pRpc != NULL)) \
|
||||
status = rpcEccNotifierWriteAck_HAL(pGpu, pRpc); \
|
||||
else if (pRpc == NULL) \
|
||||
status = NV_ERR_INSUFFICIENT_RESOURCES; \
|
||||
} while (0)
|
||||
|
||||
void teardownSysmemPfnBitMap(OBJGPU *pGpu, OBJVGPU *pVGpu);
|
||||
|
||||
NV_STATUS RmRpcPerfGetCurrentPstate(OBJGPU *pGpu, NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS *pParamStructPtr);
|
||||
|
||||
static inline NV_STATUS RmRpcSimFreeInfra(OBJGPU *pGpu, ...) { return NV_OK; }
|
||||
static inline NV_STATUS RmRpcSimUpdateDisplayContextDma(OBJGPU *pGpu, ...) { return NV_ERR_NOT_SUPPORTED; }
|
||||
static inline NV_STATUS RmRpcSimDeleteDisplayContextDma(OBJGPU *pGpu, ...) { return NV_ERR_NOT_SUPPORTED; }
|
||||
static inline NV_STATUS RmRpcSimUpdateDispChannelInfo(OBJGPU *pGpu, ...) { return NV_ERR_NOT_SUPPORTED; }
|
||||
static inline NV_STATUS RmRpcHwResourceAlloc(OBJGPU *pGpu, ...) { return NV_ERR_NOT_SUPPORTED; }
|
||||
static inline NV_STATUS RmRpcHwResourceFree(OBJGPU *pGpu, ...) { return NV_ERR_NOT_SUPPORTED; }
|
||||
static inline NV_STATUS RmRpcPerfGetPstateInfo(OBJGPU *pGpu, ...) { return NV_ERR_NOT_SUPPORTED; }
|
||||
static inline NV_STATUS RmRpcPerfGetVirtualPstateInfo(OBJGPU *pGpu, ...) { return NV_ERR_NOT_SUPPORTED; }
|
||||
|
||||
static inline NV_STATUS RmRpcSimEscapeRead(OBJGPU *pGpu, const char *path, NvU32 index,
|
||||
NvU32 count, NvU32 *data) { return NV_ERR_NOT_SUPPORTED; }
|
||||
static inline NV_STATUS RmRpcSimEscapeWrite(OBJGPU *pGpu, const char *path, NvU32 index,
|
||||
NvU32 count, NvU32 data) { return NV_ERR_NOT_SUPPORTED; }
|
||||
|
||||
NV_STATUS RmRpcSetGuestSystemInfo(OBJGPU *pGpu, OBJRPC *pRpc);
|
||||
|
||||
/*!
|
||||
* Defines the size of the GSP sim access buffer.
|
||||
*/
|
||||
#define GSP_SIM_ACCESS_BUFFER_SIZE 0x4000
|
||||
|
||||
/*!
|
||||
* Defines the structure used to pass SimRead data from Kernel to Physical RM.
|
||||
*/
|
||||
typedef struct SimAccessBuffer
|
||||
{
|
||||
volatile NvU32 data[GSP_SIM_ACCESS_BUFFER_SIZE];
|
||||
volatile NvU32 seq;
|
||||
} SimAccessBuffer;
|
||||
|
||||
#endif // __vgpu_dev_nv_rpc_h__
|
||||
Reference in New Issue
Block a user