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This commit is contained in:
Bernhard Stoeckner
2024-03-19 16:56:28 +01:00
parent 12933b2d3c
commit 3bf16b890c
78 changed files with 1400 additions and 590 deletions
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3
src/common/displayport/inc/dp_connectorimpl.h
View File

@@ -348,6 +348,9 @@ namespace DisplayPort
//
bool bPowerDownPhyBeforeD3;
// Force DSC on sink irrespective of LT status
bool bForceDscOnSink;
//
// Reset the MSTM_CTRL registers on branch device irrespective of
// IRQ VECTOR register having stale message. Certain branch devices

4
src/common/displayport/inc/dp_linkconfig.h
View File

@@ -294,8 +294,8 @@ namespace DisplayPort
else
{
// if FEC is not enabled, link overhead comprises only of
// 0.05% downspread.
return rate - 5 * rate/ 1000;
// 0.6% downspread.
return rate - 6 * rate/ 1000;
}
}

6
src/common/displayport/inc/dp_regkeydatabase.h
View File

@@ -79,6 +79,11 @@
//
#define NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED "DP_BUG_4388987_WAR"
//
// Bug 4459839 : This regkey will enable DSC irrespective of LT status.
//
#define NV_DP_REGKEY_FORCE_DSC_ON_SINK "DP_FORCE_DSC_ON_SINK"
//
// Data Base used to store all the regkey values.
// The actual data base is declared statically in dp_evoadapter.cpp.
@@ -113,6 +118,7 @@ struct DP_REGKEY_DATABASE
bool bPowerDownPhyBeforeD3;
bool bReassessMaxLink;
bool bMSTPCONCapsReadDisabled;
bool bForceDscOnSink;
};
#endif //INCLUDED_DP_REGKEYDATABASE_H

35
src/common/displayport/src/dp_connectorimpl.cpp
View File

@@ -174,6 +174,7 @@ void ConnectorImpl::applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatab
this->bDscMstCapBug3143315 = dpRegkeyDatabase.bDscMstCapBug3143315;
this->bPowerDownPhyBeforeD3 = dpRegkeyDatabase.bPowerDownPhyBeforeD3;
this->bReassessMaxLink = dpRegkeyDatabase.bReassessMaxLink;
this->bForceDscOnSink = dpRegkeyDatabase.bForceDscOnSink;
}
void ConnectorImpl::setPolicyModesetOrderMitigation(bool enabled)
@@ -3129,7 +3130,7 @@ bool ConnectorImpl::notifyAttachBegin(Group * target, // Gr
// if LT is successful, see if panel supports DSC and if so, set DSC enabled/disabled
// according to the mode requested.
if(bLinkTrainingStatus)
if(bLinkTrainingStatus || bForceDscOnSink)
{
for (Device * dev = target->enumDevices(0); dev; dev = target->enumDevices(dev))
{
@@ -4631,6 +4632,11 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig)
}
}
//
// There is no point in fallback here since we are link training
// to loweset link config that can support the mode.
//
lowestSelected.policy.setSkipFallBack(true);
bLinkTrainingSuccessful = train(lowestSelected, false);
//
// If LT failed, check if skipLT was marked. If so, clear the flag and
@@ -4648,16 +4654,37 @@ bool ConnectorImpl::trainLinkOptimized(LinkConfiguration lConfig)
}
if (!bLinkTrainingSuccessful)
{
// Try fall back to max link config and if that fails try original assessed link configuration
// If optimized link config fails, try max link config with fallback.
if (!train(getMaxLinkConfig(), false))
{
//
// Note here that if highest link config fails and a lower
// link config passes, link training will be returned as
// failure but activeLinkConfig will be set to that passing config.
//
if (!willLinkSupportModeSST(activeLinkConfig, groupAttached->lastModesetInfo))
{
//
// If none of the link configs pass LT or a fall back link config passed LT
// but cannot support the mode, then we will force the optimized link config
// on the link and mark LT as fail.
//
train(lowestSelected, true);
// Mark link training as failed since we forced it
bLinkTrainingSuccessful = false;
}
else
{
//
// If a fallback link config pass LT and can support
// the mode, mark LT as pass.
//
bLinkTrainingSuccessful = true;
}
}
else
{
// If LT passes at max link config, mark LT as pass.
bLinkTrainingSuccessful = true;
}
}
}

3
src/common/displayport/src/dp_evoadapter.cpp
View File

@@ -94,7 +94,8 @@ const struct
{NV_DP_DSC_MST_CAP_BUG_3143315, &dpRegkeyDatabase.bDscMstCapBug3143315, DP_REG_VAL_BOOL},
{NV_DP_REGKEY_POWER_DOWN_PHY, &dpRegkeyDatabase.bPowerDownPhyBeforeD3, DP_REG_VAL_BOOL},
{NV_DP_REGKEY_REASSESS_MAX_LINK, &dpRegkeyDatabase.bReassessMaxLink, DP_REG_VAL_BOOL},
{NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED, &dpRegkeyDatabase.bMSTPCONCapsReadDisabled, DP_REG_VAL_BOOL}
{NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED, &dpRegkeyDatabase.bMSTPCONCapsReadDisabled, DP_REG_VAL_BOOL},
{NV_DP_REGKEY_FORCE_DSC_ON_SINK, &dpRegkeyDatabase.bForceDscOnSink, DP_REG_VAL_BOOL},
};
EvoMainLink::EvoMainLink(EvoInterface * provider, Timer * timer) :

20
src/common/inc/nvBldVer.h
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@@ -36,25 +36,25 @@
// and then checked back in. You cannot make changes to these sections without
// corresponding changes to the buildmeister script
#ifndef NV_BUILD_BRANCH
#define NV_BUILD_BRANCH r551_40
#define NV_BUILD_BRANCH r550_00
#endif
#ifndef NV_PUBLIC_BRANCH
#define NV_PUBLIC_BRANCH r551_40
#define NV_PUBLIC_BRANCH r550_00
#endif
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS)
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r550/r551_40-171"
#define NV_BUILD_CHANGELIST_NUM (33992326)
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r550/r550_00-204"
#define NV_BUILD_CHANGELIST_NUM (34025356)
#define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "rel/gpu_drv/r550/r551_40-171"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (33992326)
#define NV_BUILD_NAME "rel/gpu_drv/r550/r550_00-204"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34025356)
#else /* Windows builds */
#define NV_BUILD_BRANCH_VERSION "r551_40-15"
#define NV_BUILD_CHANGELIST_NUM (33992326)
#define NV_BUILD_BRANCH_VERSION "r550_00-192"
#define NV_BUILD_CHANGELIST_NUM (34025356)
#define NV_BUILD_TYPE "Official"
#define NV_BUILD_NAME "551.78"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (33992326)
#define NV_BUILD_NAME "551.86"
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34025356)
#define NV_BUILD_BRANCH_BASE_VERSION R550
#endif
// End buildmeister python edited section

2
src/common/inc/nvUnixVersion.h
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@@ -4,7 +4,7 @@
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
#define NV_VERSION_STRING "550.54.15"
#define NV_VERSION_STRING "550.67"
#else

5
src/common/modeset/timing/nvt_edid.c
View File

@@ -2388,7 +2388,8 @@ NvU32 NvTiming_EDIDStrongValidationMask(NvU8 *pEdid, NvU32 length)
if (parseCta861DataBlockInfo(pData_collection, (NvU32)ctaDTD_Offset - 4, NULL) == NVT_STATUS_SUCCESS)
{
pData_collection++;
pData_collection++; // go to the next byte. skip Tag+Length byte
if (ctaBlockTag == NVT_CEA861_TAG_VIDEO)
{
for (i=0; i < ctaPayload; i++)
@@ -2432,6 +2433,8 @@ NvU32 NvTiming_EDIDStrongValidationMask(NvU8 *pEdid, NvU32 length)
}
else
{
pData_collection++; // go to the next byte. skip Tag+Length byte
ret |= NVT_EDID_VALIDATION_ERR_MASK(NVT_EDID_VALIDATION_ERR_EXT_CTA_INVALID_DATA_BLOCK);
pData_collection += ctaPayload;
}

34
src/common/modeset/timing/nvt_edidext_861.c
View File

@@ -1609,7 +1609,6 @@ void getEdidHDM1_4bVsdbTiming(NVT_EDID_INFO *pInfo)
CODE_SEGMENT(PAGE_DD_CODE)
NVT_STATUS get861ExtInfo(NvU8 *p, NvU32 size, NVT_EDID_CEA861_INFO *p861info)
{
NvU32 dtd_offset;
// sanity check
if (p == NULL || size < sizeof(EDIDV1STRUC))
@@ -1725,8 +1724,8 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p,
if (payload >= 1)
{
ext_tag = p[i];
if (ext_tag == NVT_CEA861_EXT_TAG_VIDEO_CAP && payload < 2) return NVT_STATUS_ERR;
else if (ext_tag == NVT_CEA861_EXT_TAG_COLORIMETRY && payload < 3) return NVT_STATUS_ERR;
if (ext_tag == NVT_CEA861_EXT_TAG_VIDEO_CAP && (payload != 2)) return NVT_STATUS_ERR;
else if (ext_tag == NVT_CEA861_EXT_TAG_COLORIMETRY && payload != 3) return NVT_STATUS_ERR;
else if (ext_tag == NVT_CEA861_EXT_TAG_VIDEO_FORMAT_PREFERENCE && payload < 2) return NVT_STATUS_ERR;
else if (ext_tag == NVT_CEA861_EXT_TAG_YCBCR420_VIDEO && payload < 2) return NVT_STATUS_ERR;
else if (ext_tag == NVT_CEA861_EXT_TAG_YCBCR420_CAP && payload < 1) return NVT_STATUS_ERR;
@@ -1856,19 +1855,22 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p,
}
else if (tag == NVT_CTA861_TAG_VIDEO_FORMAT)
{
p861info->vfdb[vfd_index].info.vfd_len = p[i] & 0x03;
p861info->vfdb[vfd_index].info.ntsc = (p[i] & 0x40) >> 6;
p861info->vfdb[vfd_index].info.y420 = (p[i] & 0x80) >> 7;
p861info->vfdb[vfd_index].total_vfd = (NvU8)(payload - 1) / (p861info->vfdb[vfd_index].info.vfd_len + 1);
i++; payload--;
for (j = 0; j < payload; j++, i++)
if (payload > 0)
{
p861info->vfdb[vfd_index].video_format_desc[j] = p[i];
}
p861info->vfdb[vfd_index].info.vfd_len = p[i] & 0x03;
p861info->vfdb[vfd_index].info.ntsc = (p[i] & 0x40) >> 6;
p861info->vfdb[vfd_index].info.y420 = (p[i] & 0x80) >> 7;
p861info->vfdb[vfd_index].total_vfd = (NvU8)(payload - 1) / (p861info->vfdb[vfd_index].info.vfd_len + 1);
p861info->total_vfdb = ++vfd_index;
i++; payload--;
for (j = 0; (j < payload) && (p861info->vfdb[vfd_index].total_vfd != 0); j++, i++)
{
p861info->vfdb[vfd_index].video_format_desc[j] = p[i];
}
p861info->total_vfdb = ++vfd_index;
}
}
else if (tag == NVT_CEA861_TAG_EXTENDED_FLAG)
{
@@ -1879,14 +1881,14 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p,
{
p861info->video_capability = p[i + 1] & NVT_CEA861_VIDEO_CAPABILITY_MASK;
p861info->valid.VCDB = 1;
i += 2;
i += payload;
}
else if (ext_tag == NVT_CEA861_EXT_TAG_COLORIMETRY && payload >= 3)
{
p861info->colorimetry.byte1 = p[i + 1] & NVT_CEA861_COLORIMETRY_MASK;
p861info->colorimetry.byte2 = p[i + 2] & NVT_CEA861_GAMUT_METADATA_MASK;
p861info->valid.colorimetry = 1;
i += 3;
i += payload;
}
else if (ext_tag == NVT_CEA861_EXT_TAG_VIDEO_FORMAT_PREFERENCE && payload >= 2)
{

3
src/common/nvlink/inband/interface/nvlink_inband_msg.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -80,6 +80,7 @@ typedef struct
#define NVLINK_INBAND_GPU_PROBE_CAPS_SRIOV_ENABLED NVBIT(0)
#define NVLINK_INBAND_GPU_PROBE_CAPS_PROBE_UPDATE NVBIT(1)
#define NVLINK_INBAND_GPU_PROBE_CAPS_EGM_SUPPORT NVBIT(2)
/* Add more caps as need in the future */

16
src/common/nvlink/kernel/nvlink/interface/nvlink_kern_shutdown_entry.c
View File

@@ -378,6 +378,21 @@ nvlink_lib_powerdown_links_from_active_to_off
lockLinkCount++;
}
if (lockLinkCount == 0)
{
if (conns != NULL)
nvlink_free((void *)conns);
if (lockLinks != NULL)
nvlink_free((void *)lockLinks);
// Release the top-level lock
nvlink_lib_top_lock_release();
NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS,
"%s: No conns were found\n", __FUNCTION__));
return NVL_NOT_FOUND;
}
// Acquire the per-link locks for all links captured
status = nvlink_lib_link_locks_acquire(lockLinks, lockLinkCount);
if (status != NVL_SUCCESS)
@@ -923,4 +938,3 @@ nvlink_core_powerdown_floorswept_conns_to_off_end:
return status;
}

2
src/common/nvswitch/kernel/inc/boards_nvswitch.h
View File

@@ -38,6 +38,7 @@
#define NVSWITCH_BOARD_LS10_5612_0002_ES 0x03D6
#define NVSWITCH_BOARD_LS10_4697_0000_895 0x03B9
#define NVSWITCH_BOARD_LS10_4262_0000_895 0x04FE
#define NVSWITCH_BOARD_LS10_4300_0000_895 0x0571
#define NVSWITCH_BOARD_UNKNOWN_NAME "UNKNOWN"
@@ -48,5 +49,6 @@
#define NVSWITCH_BOARD_LS10_5612_0002_ES_NAME "LS10_5612_0002_ES"
#define NVSWITCH_BOARD_LS10_4697_0000_895_NAME "LS10_4697_0000_895"
#define NVSWITCH_BOARD_LS10_4262_0000_895_NAME "LS10_4262_0000_895"
#define NVSWITCH_BOARD_LS10_4300_0000_895_NAME "LS10_4300_0000_895"
#endif // _BOARDS_NVSWITCH_H_

12
src/common/nvswitch/kernel/ls10/intr_ls10.c
View File

@@ -894,9 +894,9 @@ _nvswitch_collect_error_info_ls10
{
data->flags |= NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_ROUTE_HDR;
NVSWITCH_PRINT(device, INFO,
"ROUTE: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
data->data[i-8], data->data[i-7], data->data[i-6], data->data[i-5],
data->data[i-4], data->data[i-3], data->data[i-2], data->data[i-1]);
"ROUTE: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
data->data[i-7], data->data[i-6], data->data[i-5], data->data[i-4],
data->data[i-3], data->data[i-2], data->data[i-1]);
}
}
}
@@ -940,9 +940,9 @@ _nvswitch_collect_error_info_ls10
{
data->flags |= NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_INGRESS_HDR;
NVSWITCH_PRINT(device, INFO,
"INGRESS: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
data->data[i-7], data->data[i-6], data->data[i-5], data->data[i-4],
data->data[i-3], data->data[i-2], data->data[i-1]);
"INGRESS: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
data->data[i-6], data->data[i-5], data->data[i-4], data->data[i-3],
data->data[i-2], data->data[i-1]);
}
}
}

27
src/common/nvswitch/kernel/ls10/pmgr_ls10.c
View File

@@ -32,6 +32,7 @@
#include "export_nvswitch.h"
#include "soe/soe_nvswitch.h"
#include "soe/soeifcore.h"
#include "boards_nvswitch.h"
#include "nvswitch/ls10/dev_pmgr.h"
@@ -176,6 +177,16 @@ static const NVSWITCH_GPIO_INFO nvswitch_gpio_pin_Default[] =
static const NvU32 nvswitch_gpio_pin_Default_size = NV_ARRAY_ELEMENTS(nvswitch_gpio_pin_Default);
static const NVSWITCH_GPIO_INFO nvswitch_gpio_pin_4300[] =
{
NVSWITCH_DESCRIBE_GPIO_PIN( 0, _INSTANCE_ID0, 0, IN), // Instance ID bit 0
NVSWITCH_DESCRIBE_GPIO_PIN( 1, _INSTANCE_ID1, 0, IN), // Instance ID bit 1
NVSWITCH_DESCRIBE_GPIO_PIN( 2, _INSTANCE_ID2, 0, IN), // Instance ID bit 2
NVSWITCH_DESCRIBE_GPIO_PIN( 6, _INSTANCE_ID3, 0, IN), // Instance ID bit 3
NVSWITCH_DESCRIBE_GPIO_PIN( 7, _INSTANCE_ID4, 0, IN), // Instance ID bit 4
};
static const NvU32 nvswitch_gpio_pin_4300_size = NV_ARRAY_ELEMENTS(nvswitch_gpio_pin_4300);
//
// Initialize the software state of the switch I2C & GPIO interface
// Temporarily forcing default GPIO values.
@@ -191,6 +202,8 @@ nvswitch_init_pmgr_devices_ls10
{
ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device);
PNVSWITCH_OBJI2C pI2c = device->pI2c;
NvlStatus retval;
NvU16 boardId;
if (IS_FMODEL(device) || IS_EMULATION(device) || IS_RTLSIM(device))
{
@@ -200,8 +213,18 @@ nvswitch_init_pmgr_devices_ls10
}
else
{
chip_device->gpio_pin = nvswitch_gpio_pin_Default;
chip_device->gpio_pin_size = nvswitch_gpio_pin_Default_size;
retval = nvswitch_get_board_id(device, &boardId);
if (retval == NVL_SUCCESS &&
boardId == NVSWITCH_BOARD_LS10_4300_0000_895)
{
chip_device->gpio_pin = nvswitch_gpio_pin_4300;
chip_device->gpio_pin_size = nvswitch_gpio_pin_4300_size;
}
else
{
chip_device->gpio_pin = nvswitch_gpio_pin_Default;
chip_device->gpio_pin_size = nvswitch_gpio_pin_Default_size;
}
}
pI2c->device_list = NULL;

2
src/common/nvswitch/kernel/nvswitch.c
View File

@@ -62,7 +62,7 @@ static NvlStatus _nvswitch_ctrl_inband_flush_data(nvswitch_device *device, NVSWI
#define NVSWITCH_DEV_CMD_DISPATCH_RESERVED(cmd) \
case cmd: \
{ \
retval = -NVL_ERR_NOT_IMPLEMENTED; \
retval = -NVL_ERR_NOT_SUPPORTED; \
break; \
} \