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https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-02 06:29:47 +00:00
550.67
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@@ -38,6 +38,7 @@
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#define NVSWITCH_BOARD_LS10_5612_0002_ES 0x03D6
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#define NVSWITCH_BOARD_LS10_4697_0000_895 0x03B9
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#define NVSWITCH_BOARD_LS10_4262_0000_895 0x04FE
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#define NVSWITCH_BOARD_LS10_4300_0000_895 0x0571
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#define NVSWITCH_BOARD_UNKNOWN_NAME "UNKNOWN"
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@@ -48,5 +49,6 @@
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#define NVSWITCH_BOARD_LS10_5612_0002_ES_NAME "LS10_5612_0002_ES"
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#define NVSWITCH_BOARD_LS10_4697_0000_895_NAME "LS10_4697_0000_895"
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#define NVSWITCH_BOARD_LS10_4262_0000_895_NAME "LS10_4262_0000_895"
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#define NVSWITCH_BOARD_LS10_4300_0000_895_NAME "LS10_4300_0000_895"
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#endif // _BOARDS_NVSWITCH_H_
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@@ -894,9 +894,9 @@ _nvswitch_collect_error_info_ls10
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{
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data->flags |= NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_ROUTE_HDR;
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NVSWITCH_PRINT(device, INFO,
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"ROUTE: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
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data->data[i-8], data->data[i-7], data->data[i-6], data->data[i-5],
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data->data[i-4], data->data[i-3], data->data[i-2], data->data[i-1]);
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"ROUTE: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
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data->data[i-7], data->data[i-6], data->data[i-5], data->data[i-4],
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data->data[i-3], data->data[i-2], data->data[i-1]);
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}
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}
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}
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@@ -940,9 +940,9 @@ _nvswitch_collect_error_info_ls10
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{
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data->flags |= NVSWITCH_RAW_ERROR_LOG_DATA_FLAG_INGRESS_HDR;
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NVSWITCH_PRINT(device, INFO,
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"INGRESS: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
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data->data[i-7], data->data[i-6], data->data[i-5], data->data[i-4],
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data->data[i-3], data->data[i-2], data->data[i-1]);
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"INGRESS: HEADER: 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
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data->data[i-6], data->data[i-5], data->data[i-4], data->data[i-3],
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data->data[i-2], data->data[i-1]);
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}
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}
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}
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@@ -32,6 +32,7 @@
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#include "export_nvswitch.h"
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#include "soe/soe_nvswitch.h"
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#include "soe/soeifcore.h"
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#include "boards_nvswitch.h"
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#include "nvswitch/ls10/dev_pmgr.h"
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@@ -176,6 +177,16 @@ static const NVSWITCH_GPIO_INFO nvswitch_gpio_pin_Default[] =
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static const NvU32 nvswitch_gpio_pin_Default_size = NV_ARRAY_ELEMENTS(nvswitch_gpio_pin_Default);
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static const NVSWITCH_GPIO_INFO nvswitch_gpio_pin_4300[] =
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{
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NVSWITCH_DESCRIBE_GPIO_PIN( 0, _INSTANCE_ID0, 0, IN), // Instance ID bit 0
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NVSWITCH_DESCRIBE_GPIO_PIN( 1, _INSTANCE_ID1, 0, IN), // Instance ID bit 1
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NVSWITCH_DESCRIBE_GPIO_PIN( 2, _INSTANCE_ID2, 0, IN), // Instance ID bit 2
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NVSWITCH_DESCRIBE_GPIO_PIN( 6, _INSTANCE_ID3, 0, IN), // Instance ID bit 3
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NVSWITCH_DESCRIBE_GPIO_PIN( 7, _INSTANCE_ID4, 0, IN), // Instance ID bit 4
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};
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static const NvU32 nvswitch_gpio_pin_4300_size = NV_ARRAY_ELEMENTS(nvswitch_gpio_pin_4300);
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//
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// Initialize the software state of the switch I2C & GPIO interface
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// Temporarily forcing default GPIO values.
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@@ -191,6 +202,8 @@ nvswitch_init_pmgr_devices_ls10
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{
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ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device);
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PNVSWITCH_OBJI2C pI2c = device->pI2c;
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NvlStatus retval;
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NvU16 boardId;
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if (IS_FMODEL(device) || IS_EMULATION(device) || IS_RTLSIM(device))
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{
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@@ -200,8 +213,18 @@ nvswitch_init_pmgr_devices_ls10
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}
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else
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{
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chip_device->gpio_pin = nvswitch_gpio_pin_Default;
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chip_device->gpio_pin_size = nvswitch_gpio_pin_Default_size;
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retval = nvswitch_get_board_id(device, &boardId);
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if (retval == NVL_SUCCESS &&
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boardId == NVSWITCH_BOARD_LS10_4300_0000_895)
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{
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chip_device->gpio_pin = nvswitch_gpio_pin_4300;
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chip_device->gpio_pin_size = nvswitch_gpio_pin_4300_size;
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}
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else
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{
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chip_device->gpio_pin = nvswitch_gpio_pin_Default;
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chip_device->gpio_pin_size = nvswitch_gpio_pin_Default_size;
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}
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}
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pI2c->device_list = NULL;
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@@ -62,7 +62,7 @@ static NvlStatus _nvswitch_ctrl_inband_flush_data(nvswitch_device *device, NVSWI
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#define NVSWITCH_DEV_CMD_DISPATCH_RESERVED(cmd) \
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case cmd: \
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{ \
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retval = -NVL_ERR_NOT_IMPLEMENTED; \
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retval = -NVL_ERR_NOT_SUPPORTED; \
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break; \
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} \
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