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https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-05-05 05:31:42 +00:00
530.30.02
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@@ -50,6 +50,9 @@
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#define UVM_CHANNEL_NUM_GPFIFO_ENTRIES_MIN 32
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#define UVM_CHANNEL_NUM_GPFIFO_ENTRIES_MAX (1024 * 1024)
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// Maximum number of channels per pool.
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#define UVM_CHANNEL_MAX_NUM_CHANNELS_PER_POOL 8
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// Semaphore payloads cannot advance too much between calls to
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// uvm_gpu_tracking_semaphore_update_completed_value(). In practice the jumps
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// are bound by gpfifo sizing as we have to update the completed value to
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@@ -61,6 +64,14 @@
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// uvm_channel.h includes uvm_gpu_semaphore.h.
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#define UVM_GPU_SEMAPHORE_MAX_JUMP (2 * UVM_CHANNEL_NUM_GPFIFO_ENTRIES_MAX)
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#define uvm_channel_pool_assert_locked(pool) ( \
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{ \
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if (uvm_channel_pool_is_proxy(pool)) \
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uvm_assert_mutex_locked(&(pool)->mutex); \
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else \
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uvm_assert_spinlock_locked(&(pool)->spinlock); \
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})
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// Channel types
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typedef enum
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{
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@@ -162,7 +173,20 @@ typedef struct
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// Pool type: Refer to the uvm_channel_pool_type_t enum.
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uvm_channel_pool_type_t pool_type;
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// Lock protecting the state of channels in the pool
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// Lock protecting the state of channels in the pool.
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//
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// There are two pool lock types available: spinlock and mutex. The mutex
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// variant is required when the thread holding the pool lock must
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// sleep (ex: acquire another mutex) deeper in the call stack, either in UVM
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// or RM. For example, work submission to proxy channels in SR-IOV heavy
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// entails calling an RM API that acquires a mutex, so the proxy channel
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// pool must use the mutex variant.
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//
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// Unless the mutex is required, the spinlock is preferred. This is because,
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// other than for proxy channels, work submission takes little time and does
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// not involve any RM calls, so UVM can avoid any invocation that may result
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// on a sleep. All non-proxy channel pools use the spinlock variant, even in
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// SR-IOV heavy.
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union {
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uvm_spinlock_t spinlock;
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uvm_mutex_t mutex;
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@@ -275,7 +299,7 @@ struct uvm_channel_manager_struct
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unsigned num_channel_pools;
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// Mask containing the indexes of the usable Copy Engines. Each usable CE
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// has a pool associated with it, see channel_manager_ce_pool
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// has at least one pool associated with it.
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DECLARE_BITMAP(ce_mask, UVM_COPY_ENGINE_COUNT_MAX);
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struct
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@@ -313,10 +337,6 @@ struct uvm_channel_manager_struct
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// Create a channel manager for the GPU
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NV_STATUS uvm_channel_manager_create(uvm_gpu_t *gpu, uvm_channel_manager_t **manager_out);
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void uvm_channel_pool_lock(uvm_channel_pool_t *pool);
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void uvm_channel_pool_unlock(uvm_channel_pool_t *pool);
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void uvm_channel_pool_assert_locked(uvm_channel_pool_t *pool);
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static bool uvm_channel_pool_is_proxy(uvm_channel_pool_t *pool)
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{
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UVM_ASSERT(pool->pool_type < UVM_CHANNEL_POOL_TYPE_MASK);
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@@ -329,10 +349,16 @@ static bool uvm_channel_is_proxy(uvm_channel_t *channel)
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return uvm_channel_pool_is_proxy(channel->pool);
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}
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static bool uvm_channel_pool_is_ce(uvm_channel_pool_t *pool)
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{
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UVM_ASSERT(pool->pool_type < UVM_CHANNEL_POOL_TYPE_MASK);
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return (pool->pool_type == UVM_CHANNEL_POOL_TYPE_CE) || uvm_channel_pool_is_proxy(pool);
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}
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static bool uvm_channel_is_ce(uvm_channel_t *channel)
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{
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UVM_ASSERT(channel->pool->pool_type < UVM_CHANNEL_POOL_TYPE_MASK);
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return (channel->pool->pool_type == UVM_CHANNEL_POOL_TYPE_CE) || uvm_channel_is_proxy(channel);
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return uvm_channel_pool_is_ce(channel->pool);
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}
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// Proxy channels are used to push page tree related methods, so their channel
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@@ -449,6 +475,10 @@ NV_STATUS uvm_channel_write_ctrl_gpfifo(uvm_channel_t *channel, NvU64 ctrl_fifo_
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const char *uvm_channel_type_to_string(uvm_channel_type_t channel_type);
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const char *uvm_channel_pool_type_to_string(uvm_channel_pool_type_t channel_pool_type);
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// Returns the number of available GPFIFO entries. The function internally
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// acquires the channel pool lock.
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NvU32 uvm_channel_get_available_gpfifo_entries(uvm_channel_t *channel);
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void uvm_channel_print_pending_pushes(uvm_channel_t *channel);
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static uvm_gpu_t *uvm_channel_get_gpu(uvm_channel_t *channel)
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