mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-09 17:50:00 +00:00
530.30.02
This commit is contained in:
Andy Ritger
@@ -74,14 +74,13 @@ enum
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/*!
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* Read VRs
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* Needed to be in sync with chips_a defines
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*/
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RM_SOE_CORE_CMD_GET_VOLTAGE_VALUES,
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/*!
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* Init PLM2 protected registers
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*/
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RM_SOE_CORE_CMD_INIT_L2_STATE
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RM_SOE_CORE_CMD_INIT_L2_STATE,
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};
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// Timeout for SOE reset callback function
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@@ -27,6 +27,7 @@
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#include "flcnifcmn.h"
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#define INFOROM_FS_FILE_NAME_SIZE 3
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#define INFOROM_BBX_OBJ_XID_ENTRIES 10
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enum
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{
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@@ -70,6 +71,7 @@ typedef struct
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typedef struct
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{
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NvU8 cmdType;
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NvU32 sizeInBytes;
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RM_FLCN_U64 dmaHandle;
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} RM_SOE_IFR_CMD_BBX_SXID_GET_PARAMS;
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@@ -82,4 +84,19 @@ typedef union
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RM_SOE_IFR_CMD_BBX_SXID_GET_PARAMS bbxSxidGet;
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} RM_SOE_IFR_CMD;
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// entry of getSxid
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typedef struct
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{
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NvU32 sxid;
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NvU32 timestamp;
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} RM_SOE_BBX_SXID_ENTRY;
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// SXID data array return to getSxid
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typedef struct
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{
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NvU32 sxidCount;
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RM_SOE_BBX_SXID_ENTRY sxidFirst[INFOROM_BBX_OBJ_XID_ENTRIES];
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RM_SOE_BBX_SXID_ENTRY sxidLast[INFOROM_BBX_OBJ_XID_ENTRIES];
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} RM_SOE_BBX_GET_SXID_DATA;
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#endif // _SOEIFIFR_H_
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@@ -75,7 +75,6 @@ enum
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{
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RM_SOE_THERM_MSG_ID_SLOWDOWN_STATUS,
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RM_SOE_THERM_MSG_ID_SHUTDOWN_STATUS,
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RM_SOE_THERM_MSG_ID_ACK_FORCE_SLOWDOWN,
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};
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/*!
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@@ -103,7 +102,6 @@ typedef struct
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NvBool bSlowdown;
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NvTemp maxTemperature;
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NvTemp warnThreshold;
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NvBool bLinksL1Status;
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struct
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{
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2018-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2018-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -3816,8 +3816,8 @@ typedef struct
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#define CTRL_NVSWITCH_CLEAR_COUNTERS 0x51
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#define CTRL_NVSWITCH_SET_NVLINK_ERROR_THRESHOLD 0x52
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#define CTRL_NVSWITCH_GET_NVLINK_ERROR_THRESHOLD 0x53
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#define CTRL_NVSWITCH_GET_VOLTAGE 0x55
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#define CTRL_NVSWITCH_GET_BOARD_PART_NUMBER 0x54
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#define CTRL_NVSWITCH_GET_VOLTAGE 0x54
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#define CTRL_NVSWITCH_GET_BOARD_PART_NUMBER 0x55
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#ifdef __cplusplus
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}
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@@ -895,7 +895,6 @@ nvswitch_os_vsnprintf
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void
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nvswitch_os_assert_log
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(
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int cond,
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const char *pFormat,
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...
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);
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@@ -1172,6 +1172,14 @@ _flcnQueueResponseHandle_IMPL
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NVSWITCH_ASSERT(pQueueInfo != NULL);
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if (pMsgGen == NULL)
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{
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NVSWITCH_PRINT(device, ERROR,
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"%s: NULL message\n",
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__FUNCTION__);
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return NV_ERR_GENERIC;
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}
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// get the sequence info data associated with this message
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pSeqInfo = flcnableQueueSeqInfoGet(device, pFlcn->pFlcnable, pMsgGen->hdr.seqNumId);
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if ((pSeqInfo == NULL) ||
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@@ -1188,7 +1196,7 @@ _flcnQueueResponseHandle_IMPL
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}
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// If response was requested
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if (pSeqInfo->pMsgResp != NULL && pMsgGen != NULL)
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if (pSeqInfo->pMsgResp != NULL)
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{
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NVSWITCH_ASSERT(pSeqInfo->pMsgResp->hdr.size == pMsgGen->hdr.size);
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msgSize = pMsgGen->hdr.size - RM_FLCN_QUEUE_HDR_SIZE;
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@@ -125,12 +125,21 @@ static NV_INLINE void nvswitch_clear_flags(NvU32 *val, NvU32 flags)
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// This macro should be used to check assertion statements and print Error messages.
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//
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#if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
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#define NVSWITCH_ASSERT(_cond) \
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nvswitch_os_assert_log((_cond), "NVSwitch: Assertion failed in %s() at %s:%d\n", \
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__FUNCTION__ , __FILE__, __LINE__)
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void nvswitch_assert_log
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(
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const char *function,
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const char *file,
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NvU32 line
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);
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#define NVSWITCH_ASSERT(_cond) \
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((void)((!(_cond)) ? nvswitch_assert_log(__FUNCTION__, __FILE__, __LINE__) : 0))
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#else
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#define NVSWITCH_ASSERT(_cond) \
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nvswitch_os_assert_log((_cond), "NVSwitch: Assertion failed \n")
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void nvswitch_assert_log(void);
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#define NVSWITCH_ASSERT(_cond) \
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((void)((!(_cond)) ? nvswitch_assert_log() : 0))
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#endif
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#define NVSWITCH_ASSERT_ERROR_INFO(errorCategory, errorInfo) NVSWITCH_ASSERT(0x0)
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@@ -52,6 +52,7 @@
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_op(void, nvswitch_destroy_device_state, (nvswitch_device *device), _arch) \
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_op(void, nvswitch_determine_platform, (nvswitch_device *device), _arch) \
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_op(NvU32, nvswitch_get_num_links, (nvswitch_device *device), _arch) \
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_op(NvU8, nvswitch_get_num_links_per_nvlipt,(nvswitch_device *device), _arch) \
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_op(NvBool, nvswitch_is_link_valid, (nvswitch_device *device, NvU32 link_id), _arch) \
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_op(void, nvswitch_set_fatal_error, (nvswitch_device *device, NvBool device_fatal, NvU32 link_id), _arch) \
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_op(NvU32, nvswitch_get_swap_clk_default, (nvswitch_device *device), _arch) \
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@@ -119,7 +120,6 @@
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_op(NvlStatus, nvswitch_deassert_link_reset, (nvswitch_device *device, nvlink_link *link), _arch) \
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_op(NvBool, nvswitch_is_soe_supported, (nvswitch_device *device), _arch) \
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_op(NvlStatus, nvswitch_init_soe, (nvswitch_device *device), _arch) \
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_op(void, nvswitch_soe_init_l2_state, (nvswitch_device *device), _arch) \
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_op(NvBool, nvswitch_is_inforom_supported, (nvswitch_device *device), _arch) \
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_op(NvBool, nvswitch_is_spi_supported, (nvswitch_device *device), _arch) \
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_op(NvBool, nvswitch_is_smbpbi_supported, (nvswitch_device *device), _arch) \
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@@ -138,6 +138,9 @@
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_op(NvlStatus, nvswitch_inforom_nvl_update_link_correctable_error_info, (nvswitch_device *device, void *pNvlGeneric, void *pData, NvU8 linkId, NvU8 nvliptInstance, NvU8 localLinkIdx, void *pErrorCounts, NvBool *bDirty), _arch) \
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_op(NvlStatus, nvswitch_inforom_nvl_get_max_correctable_error_rate, (nvswitch_device *device, NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS *p), _arch) \
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_op(NvlStatus, nvswitch_inforom_nvl_get_errors, (nvswitch_device *device, NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *p), _arch) \
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_op(NvlStatus, nvswitch_inforom_nvl_setL1Threshold, (nvswitch_device *device, void *pNvlGeneric, NvU32 word1, NvU32 word2), _arch) \
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_op(NvlStatus, nvswitch_inforom_nvl_getL1Threshold, (nvswitch_device *device, void *pNvlGeneric, NvU32 *word1, NvU32 *word2), _arch) \
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_op(NvlStatus, nvswitch_inforom_nvl_setup_nvlink_state, (nvswitch_device *device, INFOROM_NVLINK_STATE *pNvlinkState, NvU8 version), _arch) \
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_op(NvlStatus, nvswitch_inforom_ecc_get_errors, (nvswitch_device *device, NVSWITCH_GET_ECC_ERROR_COUNTS_PARAMS *p), _arch) \
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_op(void, nvswitch_load_uuid, (nvswitch_device *device), _arch) \
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_op(void, nvswitch_i2c_set_hw_speed_mode, (nvswitch_device *device, NvU32 port, NvU32 speedMode), _arch) \
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@@ -223,8 +226,9 @@
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_op(NvlStatus, nvswitch_ctrl_clear_counters, (nvswitch_device *device, NVSWITCH_NVLINK_CLEAR_COUNTERS_PARAMS *ret), _arch) \
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_op(NvlStatus, nvswitch_ctrl_set_nvlink_error_threshold, (nvswitch_device *device, NVSWITCH_SET_NVLINK_ERROR_THRESHOLD_PARAMS *pParams), _arch) \
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_op(NvlStatus, nvswitch_ctrl_get_nvlink_error_threshold, (nvswitch_device *device, NVSWITCH_GET_NVLINK_ERROR_THRESHOLD_PARAMS *pParams), _arch) \
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_op(NvlStatus, nvswitch_ctrl_get_board_part_number, (nvswitch_device *device, NVSWITCH_GET_BOARD_PART_NUMBER_VECTOR *p), _arch) \
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_op(NvlStatus, nvswitch_ctrl_therm_read_voltage, (nvswitch_device *device, NVSWITCH_CTRL_GET_VOLTAGE_PARAMS *info), _arch) \
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_op(NvlStatus, nvswitch_ctrl_get_board_part_number, (nvswitch_device *device, NVSWITCH_GET_BOARD_PART_NUMBER_VECTOR *p), _arch)
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_op(void, nvswitch_soe_init_l2_state, (nvswitch_device *device), _arch) \
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#define NVSWITCH_HAL_FUNCTION_LIST_LS10(_op, _arch) \
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_op(NvlStatus, nvswitch_launch_ALI, (nvswitch_device *device), _arch) \
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@@ -0,0 +1,94 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef _INFOROM_NVL_V3_NVSWITCH_H_
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#define _INFOROM_NVL_V3_NVSWITCH_H_
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#include "inforom/inforom_nvswitch.h"
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#define LUT_ELEMENT(block, dir, subtype, type, sev) \
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{ INFOROM_NVL_ERROR_TYPE ## type, \
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FLD_SET_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _SEVERITY, sev, 0) | \
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FLD_SET_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _DIRECTION, dir, 0), \
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block ## dir ## subtype ## type, \
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INFOROM_NVL_ERROR_BLOCK_TYPE_ ## block \
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}
|
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|
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NvlStatus inforom_nvl_v3_map_error
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(
|
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INFOROM_NVLINK_ERROR_TYPES error,
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NvU8 *pHeader,
|
||||
NvU16 *pMetadata,
|
||||
NvU8 *pErrorSubtype,
|
||||
INFOROM_NVL_ERROR_BLOCK_TYPE *pBlockType
|
||||
);
|
||||
|
||||
NvlStatus
|
||||
inforom_nvl_v3_encode_nvlipt_error_subtype
|
||||
(
|
||||
NvU8 localLinkIdx,
|
||||
NvU8 *pSubtype
|
||||
);
|
||||
|
||||
NvBool
|
||||
inforom_nvl_v3_should_replace_error_rate_entry
|
||||
(
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pErrorRate,
|
||||
NvU32 flitCrcRate,
|
||||
NvU32 *pLaneCrcRates
|
||||
);
|
||||
|
||||
void
|
||||
inforom_nvl_v3_seconds_to_day_and_month
|
||||
(
|
||||
NvU32 sec,
|
||||
NvU32 *pDay,
|
||||
NvU32 *pMonth
|
||||
);
|
||||
|
||||
void
|
||||
inforom_nvl_v3_update_error_rate_entry
|
||||
(
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pErrorRate,
|
||||
NvU32 newSec,
|
||||
NvU32 newFlitCrcRate,
|
||||
NvU32 *pNewLaneCrcRates
|
||||
);
|
||||
|
||||
NvlStatus
|
||||
inforom_nvl_v3_map_error_to_userspace_error
|
||||
(
|
||||
nvswitch_device *device,
|
||||
INFOROM_NVL_OBJECT_V3_ERROR_ENTRY *pErrorLog,
|
||||
NVSWITCH_NVLINK_ERROR_ENTRY *pNvlError
|
||||
);
|
||||
|
||||
void
|
||||
inforom_nvl_v3_update_correctable_error_rates
|
||||
(
|
||||
INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE_V3S *pState,
|
||||
NvU8 link,
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *pCounts
|
||||
);
|
||||
|
||||
#endif //_INFOROM_NVL_V3_NVSWITCH_H_
|
||||
@@ -0,0 +1,37 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef _INFOROM_NVL_V4_NVSWITCH_H_
|
||||
#define _INFOROM_NVL_V4_NVSWITCH_H_
|
||||
|
||||
#include "inforom/inforom_nvswitch.h"
|
||||
|
||||
void
|
||||
inforom_nvl_v4_update_correctable_error_rates
|
||||
(
|
||||
INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE_V4S *pState,
|
||||
NvU8 link,
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *pCounts
|
||||
);
|
||||
|
||||
#endif //_INFOROM_NVL_V4_NVSWITCH_H_
|
||||
@@ -46,6 +46,12 @@
|
||||
(destName)[2] = (srcName)[2]; \
|
||||
}
|
||||
|
||||
#define m_inforom_nvl_get_new_errors_per_minute(value, pSum) \
|
||||
do \
|
||||
{ \
|
||||
*pSum = (*pSum - (*pSum / 60)) + value; \
|
||||
} while (NV_FALSE) \
|
||||
|
||||
//
|
||||
// OS type defines.
|
||||
//
|
||||
@@ -99,6 +105,7 @@ struct inforom
|
||||
INFOROM_IMG_OBJECT_V1_00 object;
|
||||
} IMG;
|
||||
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
INFOROM_ECC_STATE *pEccState;
|
||||
INFOROM_OMS_STATE *pOmsState;
|
||||
|
||||
@@ -111,23 +118,23 @@ struct inforom
|
||||
// Generic InfoROM APIs
|
||||
NvlStatus nvswitch_initialize_inforom(nvswitch_device *device);
|
||||
NvlStatus nvswitch_inforom_read_object(nvswitch_device* device,
|
||||
const char *objectName, const char *pObjectFormat,
|
||||
const char objectName[3], const char *pObjectFormat,
|
||||
NvU8 *pPackedObject, void *pObject);
|
||||
NvlStatus nvswitch_inforom_write_object(nvswitch_device* device,
|
||||
const char *objectName, const char *pObjectFormat,
|
||||
const char objectName[3], const char *pObjectFormat,
|
||||
void *pObject, NvU8 *pOldPackedObject);
|
||||
void nvswitch_destroy_inforom(nvswitch_device *device);
|
||||
NvlStatus nvswitch_inforom_add_object(struct inforom *pInforom,
|
||||
INFOROM_OBJECT_HEADER_V1_00 *pHeader);
|
||||
NvlStatus nvswitch_inforom_get_object_version_info(nvswitch_device *device,
|
||||
const char *objectName, NvU8 *pVersion, NvU8 *pSubVersion);
|
||||
const char objectName[3], NvU8 *pVersion, NvU8 *pSubVersion);
|
||||
void *nvswitch_add_halinfo_node(NVListPtr head, int type, int size);
|
||||
void *nvswitch_get_halinfo_node(NVListPtr head, int type);
|
||||
void nvswitch_inforom_post_init(nvswitch_device *device);
|
||||
NvlStatus nvswitch_initialize_inforom_objects(nvswitch_device *device);
|
||||
void nvswitch_destroy_inforom_objects(nvswitch_device *device);
|
||||
NvlStatus nvswitch_inforom_load_object(nvswitch_device* device,
|
||||
struct inforom *pInforom, const char *objectName,
|
||||
struct inforom *pInforom, const char objectName[3],
|
||||
const char *pObjectFormat, NvU8 *pPackedObject, void *pObject);
|
||||
void nvswitch_inforom_read_static_data(nvswitch_device *device,
|
||||
struct inforom *pInforom, RM_SOE_SMBPBI_INFOROM_DATA *pData);
|
||||
@@ -149,6 +156,8 @@ NvlStatus nvswitch_inforom_nvlink_get_max_correctable_error_rate(nvswitch_device
|
||||
NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS *params);
|
||||
NvlStatus nvswitch_inforom_nvlink_get_errors(nvswitch_device *device,
|
||||
NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *params);
|
||||
NvlStatus nvswitch_inforom_nvlink_setL1Threshold(nvswitch_device *device, NvU32 word1, NvU32 word2);
|
||||
NvlStatus nvswitch_inforom_nvlink_getL1Threshold(nvswitch_device *device, NvU32 *word1, NvU32 *word2);
|
||||
|
||||
// InfoROM ECC APIs
|
||||
NvlStatus nvswitch_inforom_ecc_load(nvswitch_device *device);
|
||||
|
||||
@@ -58,6 +58,29 @@ nvswitch_inforom_nvl_get_errors_lr10
|
||||
NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *params
|
||||
);
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setL1Threshold_lr10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 word1,
|
||||
NvU32 word2
|
||||
);
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_getL1Threshold_lr10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 *word1,
|
||||
NvU32 *word2
|
||||
);
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setup_nvlink_state_lr10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
INFOROM_NVLINK_STATE *pNvlinkState,
|
||||
NvU8 version
|
||||
);
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_ecc_log_error_event_lr10
|
||||
(
|
||||
|
||||
@@ -643,8 +643,8 @@ NvlStatus nvswitch_ctrl_get_nvlink_lp_counters_lr10(nvswitch_device *device, NVS
|
||||
NvlStatus nvswitch_service_nvldl_fatal_link_lr10(nvswitch_device *device, NvU32 nvliptInstance, NvU32 link);
|
||||
NvlStatus nvswitch_ctrl_inband_send_data_lr10(nvswitch_device *device, NVSWITCH_INBAND_SEND_DATA_PARAMS *p);
|
||||
NvlStatus nvswitch_ctrl_inband_read_data_lr10(nvswitch_device *device, NVSWITCH_INBAND_READ_DATA_PARAMS *p);
|
||||
void nvswitch_send_inband_nack_lr10(nvswitch_device *device, NvU32 *msghdr, NvU32 linkId);
|
||||
NvU32 nvswitch_get_max_persistent_message_count_lr10(nvswitch_device *device);
|
||||
void nvswitch_send_inband_nack_lr10(nvswitch_device *device, NvU32 *msghdr, NvU32 linkId);
|
||||
NvU32 nvswitch_get_max_persistent_message_count_lr10(nvswitch_device *device);
|
||||
NvlStatus nvswitch_launch_ALI_link_training_lr10(nvswitch_device *device, nvlink_link *link, NvBool bSync);
|
||||
NvlStatus nvswitch_service_minion_link_lr10(nvswitch_device *device, NvU32 nvliptInstance);
|
||||
void nvswitch_apply_recal_settings_lr10(nvswitch_device *device, nvlink_link *link);
|
||||
|
||||
@@ -44,6 +44,43 @@ NvlStatus nvswitch_inforom_nvl_update_link_correctable_error_info_ls10
|
||||
NvBool *bDirty
|
||||
);
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvl_get_max_correctable_error_rate_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS *params
|
||||
);
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvl_get_errors_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *params
|
||||
);
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setL1Threshold_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 word1,
|
||||
NvU32 word2
|
||||
);
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_getL1Threshold_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 *word1,
|
||||
NvU32 *word2
|
||||
);
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setup_nvlink_state_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
INFOROM_NVLINK_STATE *pNvlinkState,
|
||||
NvU8 version
|
||||
);
|
||||
|
||||
void
|
||||
nvswitch_initialize_oms_state_ls10
|
||||
(
|
||||
|
||||
@@ -175,6 +175,9 @@
|
||||
|
||||
#define NVSWITCH_NUM_LINKS_PER_NVLIPT_LS10 (NVSWITCH_NUM_LINKS_LS10/NUM_NVLIPT_ENGINE_LS10)
|
||||
|
||||
#define NVSWITCH_NVLIPT_GET_PUBLIC_ID_LS10(_physlinknum) \
|
||||
((_physlinknum)/NVSWITCH_LINKS_PER_NVLIPT_LS10)
|
||||
|
||||
#define NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(_physlinknum) \
|
||||
((_physlinknum)%NVSWITCH_NUM_LINKS_PER_NVLIPT_LS10)
|
||||
|
||||
@@ -809,10 +812,6 @@ typedef const struct
|
||||
#define nvswitch_corelib_write_discovery_token_ls10 nvswitch_corelib_write_discovery_token_lr10
|
||||
#define nvswitch_corelib_read_discovery_token_ls10 nvswitch_corelib_read_discovery_token_lr10
|
||||
|
||||
#define nvswitch_inforom_nvl_get_minion_data_ls10 nvswitch_inforom_nvl_get_minion_data_lr10
|
||||
#define nvswitch_inforom_nvl_set_minion_data_ls10 nvswitch_inforom_nvl_set_minion_data_lr10
|
||||
#define nvswitch_inforom_nvl_get_max_correctable_error_rate_ls10 nvswitch_inforom_nvl_get_max_correctable_error_rate_lr10
|
||||
#define nvswitch_inforom_nvl_get_errors_ls10 nvswitch_inforom_nvl_get_errors_lr10
|
||||
#define nvswitch_inforom_ecc_log_error_event_ls10 nvswitch_inforom_ecc_log_error_event_lr10
|
||||
#define nvswitch_inforom_ecc_get_errors_ls10 nvswitch_inforom_ecc_get_errors_lr10
|
||||
#define nvswitch_inforom_bbx_get_sxid_ls10 nvswitch_inforom_bbx_get_sxid_lr10
|
||||
@@ -889,10 +888,6 @@ NvlStatus nvswitch_corelib_set_tx_mode_lr10(nvlink_link *link, NvU64 mode, NvU32
|
||||
NvlStatus nvswitch_corelib_get_tl_link_mode_lr10(nvlink_link *link, NvU64 *mode);
|
||||
void nvswitch_init_buffer_ready_lr10(nvswitch_device *device, nvlink_link *link, NvBool bNportBufferReady);
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_get_minion_data_lr10(nvswitch_device *device, void *pNvlGeneric, NvU8 linkId, NvU32 *seedData);
|
||||
NvlStatus nvswitch_inforom_nvl_set_minion_data_lr10(nvswitch_device *device, void *pNvlGeneric, NvU8 linkId, NvU32 *seedData, NvU32 size, NvBool *bDirty);
|
||||
NvlStatus nvswitch_inforom_nvl_get_max_correctable_error_rate_lr10(nvswitch_device *device, NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS *params);
|
||||
NvlStatus nvswitch_inforom_nvl_get_errors_lr10(nvswitch_device *device, NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *params);
|
||||
NvlStatus nvswitch_inforom_ecc_log_error_event_lr10(nvswitch_device *device, INFOROM_ECC_OBJECT *pEccGeneric, INFOROM_NVS_ECC_ERROR_EVENT *err_event);
|
||||
NvlStatus nvswitch_inforom_ecc_get_errors_lr10(nvswitch_device *device, NVSWITCH_GET_ECC_ERROR_COUNTS_PARAMS *params);
|
||||
NvlStatus nvswitch_inforom_bbx_get_sxid_lr10(nvswitch_device *device, NVSWITCH_GET_SXIDS_PARAMS *params);
|
||||
@@ -972,10 +967,10 @@ void nvswitch_store_topology_information_ls10(nvswitch_device *device, nvli
|
||||
NvlStatus nvswitch_ctrl_i2c_indexed_ls10(nvswitch_device *device, NVSWITCH_CTRL_I2C_INDEXED_PARAMS *pParams);
|
||||
NvBool nvswitch_i2c_is_device_access_allowed_ls10(nvswitch_device *device, NvU32 port, NvU8 addr, NvBool bIsRead);
|
||||
NvlStatus nvswitch_minion_get_ali_debug_registers_ls10(nvswitch_device *device, nvlink_link *link, NVSWITCH_MINION_ALI_DEBUG_REGISTERS *params);
|
||||
void nvswitch_execute_unilateral_link_shutdown_ls10(nvlink_link *link);
|
||||
void nvswitch_setup_link_system_registers_ls10(nvswitch_device *device, nvlink_link *link);
|
||||
void nvswitch_load_link_disable_settings_ls10(nvswitch_device *device, nvlink_link *link);
|
||||
void nvswitch_link_disable_interrupts_ls10(nvswitch_device *device, NvU32 link);
|
||||
void nvswitch_execute_unilateral_link_shutdown_ls10(nvlink_link *link);
|
||||
|
||||
void nvswitch_init_dlpl_interrupts_ls10(nvlink_link *link);
|
||||
NvlStatus nvswitch_reset_and_drain_links_ls10(nvswitch_device *device, NvU64 link_mask);
|
||||
@@ -1007,6 +1002,7 @@ void nvswitch_set_error_rate_threshold_ls10(nvlink_link *link, NvBool bIsDe
|
||||
void nvswitch_configure_error_rate_threshold_interrupt_ls10(nvlink_link *link, NvBool bEnable);
|
||||
NvlStatus nvswitch_reset_and_train_link_ls10(nvswitch_device *device, nvlink_link *link);
|
||||
NvBool nvswitch_are_link_clocks_on_ls10(nvswitch_device *device, nvlink_link *link, NvU32 clocksMask);
|
||||
void nvswitch_get_error_rate_threshold_ls10(nvlink_link *link);
|
||||
|
||||
#endif //_LS10_H_
|
||||
|
||||
|
||||
@@ -111,10 +111,12 @@ NvlStatus nvswitch_mc_build_mcp_list_ls10(nvswitch_device *device, NvU32 *port_l
|
||||
NvU32 *entries_used);
|
||||
|
||||
NvlStatus nvswitch_mc_unwind_directives_ls10(nvswitch_device *device,
|
||||
NVSWITCH_TCP_DIRECTIVE_LS10* directives,
|
||||
NvU32 *ports, NvU8 *vc_hop,
|
||||
NvU32 *ports_per_spray_group, NvU32 *replica_offset,
|
||||
NvBool *replica_valid);
|
||||
NVSWITCH_TCP_DIRECTIVE_LS10 directives[NVSWITCH_MC_TCP_LIST_SIZE_LS10],
|
||||
NvU32 ports[NVSWITCH_MC_MAX_PORTS],
|
||||
NvU8 vc_hop[NVSWITCH_MC_MAX_PORTS],
|
||||
NvU32 ports_per_spray_group[NVSWITCH_MC_MAX_SPRAYGROUPS],
|
||||
NvU32 replica_offset[NVSWITCH_MC_MAX_SPRAYGROUPS],
|
||||
NvBool replica_valid[NVSWITCH_MC_MAX_SPRAYGROUPS]);
|
||||
|
||||
NvlStatus nvswitch_mc_invalidate_mc_rid_entry_ls10(nvswitch_device *device, NvU32 port, NvU32 index,
|
||||
NvBool use_extended_table, NvBool zero);
|
||||
|
||||
@@ -39,8 +39,6 @@ void nvswitch_cci_soe_callback_ls10(nvswitch_device *device, RM_FLCN_MSG *pGenMs
|
||||
void *pParams, NvU32 seqDesc, NV_STATUS status);
|
||||
NvlStatus nvswitch_set_nport_tprod_state_ls10(nvswitch_device *device, NvU32 nport);
|
||||
void nvswitch_soe_unregister_events_ls10(nvswitch_device *device);
|
||||
void nvswitch_therm_soe_callback_ls10(nvswitch_device *device, union RM_FLCN_MSG *pMsg,
|
||||
void *pParams, NvU32 seqDesc, NV_STATUS status);
|
||||
NvlStatus nvswitch_soe_register_event_callbacks_ls10(nvswitch_device *device);
|
||||
NvlStatus nvswitch_soe_restore_nport_state_ls10(nvswitch_device *device, NvU32 nport);
|
||||
NvlStatus nvswitch_soe_issue_nport_reset_ls10(nvswitch_device *device, NvU32 nport);
|
||||
|
||||
@@ -444,7 +444,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0xfeffbf22, 0x99900149, 0x0142fe14, 0x94bd9fa0, 0xa00c2290, 0x3da37e29, 0x00a03300, 0xda040b56,
|
||||
0x00002944, 0x2db2bcb2, 0x0042d77e, 0xa433a032, 0x41fe4300, 0x10119001, 0x8e7e1ab2, 0xa0320033,
|
||||
0x3100a433, 0x2bbf1cbf, 0x24d1a4bd, 0x7e000014, 0xa000b06c, 0x00a0b31a, 0x7eb43d1a, 0xb300b104,
|
||||
0xbf1200a0, 0x7eff001a, 0x3e00b63b, 0x00003371, 0x0149feff, 0xbf149990, 0x05dcd99f, 0x99bf0000,
|
||||
0xbf1200a0, 0x7eff001a, 0x3e00b63e, 0x00003371, 0x0149feff, 0xbf149990, 0x05dcd99f, 0x99bf0000,
|
||||
0xf9a60a32, 0x7e070bf4, 0xfb003a31, 0x0e090c25, 0xa43da9a0, 0x30f400f8, 0x05dcdfd8, 0x62f90000,
|
||||
0x30f4ffbf, 0x0149fef4, 0xa04c9990, 0xb2a93f9f, 0x01a398a6, 0x0d019033, 0x60489d33, 0x35a33e03,
|
||||
0x04301800, 0x1b010d33, 0x03329801, 0x3d043198, 0x10dc4ba4, 0xd501004c, 0x00000644, 0x0038327e,
|
||||
@@ -569,7 +569,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0x328908f4, 0xfbfa324f, 0xbf02f971, 0xbcb0b2b9, 0xb9a6b0c9, 0xe41708f4, 0xbcffffd9, 0xfba6f09b,
|
||||
0x980b08f4, 0xf9a60109, 0xf8050df4, 0xb2dc7202, 0x28d77eed, 0xb201fb00, 0x05ab98b9, 0xdeb2cfb2,
|
||||
0xfd729cb2, 0x0042a97e, 0xf0fc00f8, 0xf9fc30f4, 0xbf62f9f0, 0x08e1b0b9, 0xd4b2a5b2, 0xa630c9bc,
|
||||
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x010124bd, 0x763efc06, 0x02f80043,
|
||||
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x24bd0101, 0x763efc06, 0x02f80043,
|
||||
0x853e0101, 0x42bc0043, 0x0096b192, 0x060df401, 0x90010049, 0x96ff0399, 0x0b947e04, 0xb23bb200,
|
||||
0xdd0c725a, 0x00001200, 0x7e3030bc, 0x320028d7, 0x00a433a1, 0x08b0b434, 0xb209c0b4, 0x1200da2d,
|
||||
0x20bc0000, 0x01004e20, 0x0021367e, 0x0a00a033, 0x853e02f8, 0x00da0043, 0xbd000012, 0x01004cb4,
|
||||
@@ -646,7 +646,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0x01b024a1, 0x08113001, 0x300c1130, 0x050d1c01, 0xda00c04e, 0x000005d0, 0x005d0a7e, 0x001404da,
|
||||
0x0c040b00, 0x59377e08, 0x00ad3300, 0x4d4c00f6, 0x00c3f171, 0x00d8db00, 0xa1300000, 0x00a13028,
|
||||
0x3010a130, 0xa13014a1, 0x20a13018, 0xb024a130, 0x11300101, 0x0c113008, 0x0d1c0130, 0x00804e09,
|
||||
0x0005d4da, 0x5d0a7e00, 0x1428da00, 0x040b0000, 0x377e080c, 0xad330059, 0x4c00a900, 0xc3f1b7c7,
|
||||
0x0005d4da, 0x5d0a7e00, 0x1428da00, 0x040b0000, 0x377e080c, 0xad330059, 0x4c00a900, 0xc3f1b7ca,
|
||||
0xb4db0000, 0x30000000, 0xa13028a1, 0x10a13000, 0x3014a130, 0xa13018a1, 0x24a13020, 0x300c1130,
|
||||
0x01b01c01, 0x08113001, 0xc04e0a0d, 0x05d8da00, 0x0a7e0000, 0x1cda005d, 0x0b000014, 0x7e080c04,
|
||||
0x33005937, 0x7e5c00a4, 0x7e005c97, 0x7e004db4, 0x7e005931, 0x7e000a74, 0x7e003cf7, 0x7e005249,
|
||||
@@ -662,7 +662,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0x3d071bf4, 0xc700f8a4, 0x96b024f9, 0x0b9cf002, 0x00f89a32, 0x0089050f, 0x9ff60180, 0xb8060f00,
|
||||
0x00010099, 0xf8009ff6, 0x02008900, 0x0099cf01, 0x1000008f, 0xf4049ffd, 0x34da181b, 0x7e008204,
|
||||
0xf0001a27, 0x1bf401a4, 0x0a02f809, 0x3d00f824, 0xd900f8a4, 0x00001430, 0x34da99bf, 0x98000014,
|
||||
0x95f90e99, 0x1e0a00f8, 0x00b99e7e, 0x0600a033, 0x00f802f8, 0x0100008f, 0xf6590049, 0x00f8009f,
|
||||
0x95f90e99, 0x1e0a00f8, 0x00b9a17e, 0x0600a033, 0x00f802f8, 0x0100008f, 0xf6590049, 0x00f8009f,
|
||||
0x00900089, 0xf00099ce, 0x0bf40194, 0xf1008e20, 0x00e9ce00, 0x9ffdef0f, 0x00e9f704, 0x5200eeb8,
|
||||
0x00e9ce02, 0xf7049ffd, 0x00f800e9, 0x7e0a004a, 0xe7001a27, 0xb30114aa, 0x4f1e06a4, 0xf9cf4f00,
|
||||
0xe899c700, 0x110f94b3, 0xf000f9cf, 0x9cf0ff94, 0xf89a320b, 0xf8a43d00, 0x8902f900, 0xce009000,
|
||||
@@ -859,7 +859,7 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0x4c99c700, 0x6a0090b3, 0xf60190b3, 0xde3e02f8, 0xf9cf0066, 0x4c99c700, 0x3a0090b3, 0xf60190b3,
|
||||
0xf23e02f8, 0x00d90066, 0xbf000014, 0x014bfe9a, 0xbb90080c, 0x006e7e14, 0x0149fe00, 0xbf1c9990,
|
||||
0x05dcd99f, 0x99bf0000, 0x0bf5f9a6, 0xe03e00ba, 0x00890067, 0x99cf01c2, 0x0608de00, 0x9fc70000,
|
||||
0x1899c710, 0x3516ef35, 0x063e15e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
|
||||
0x1899c710, 0x3515ef35, 0x063e14e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
|
||||
0x9ff70201, 0x009fcf00, 0xf23e9fb2, 0x00890066, 0x99cf01c2, 0x009fe400, 0xff94f120, 0x00fdb33f,
|
||||
0xc13eff40, 0x448f0066, 0x0089066f, 0x9ff601c1, 0x00f1df00, 0x99b88000, 0xf7020100, 0x9fcf009f,
|
||||
0x3e9fb200, 0x890066a8, 0xcf01c200, 0x9fe40099, 0x94f12000, 0xfdb33fff, 0x3efec700, 0x8f006681,
|
||||
@@ -1347,17 +1347,17 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0xf4004096, 0x9631251d, 0x1cf4005a, 0x00d0331e, 0xffefc41b, 0xf404f9c4, 0xf9c4151b, 0x0294b30a,
|
||||
0x07a9180b, 0x08009033, 0x00f8060a, 0x00f8a4bd, 0x020f12f9, 0xa0b2b1b2, 0x2200a0b3, 0x94f0a93f,
|
||||
0x171bf408, 0x00a30f7e, 0x060010b3, 0x09181a20, 0x26060f08, 0x051bf4a9, 0xfab2f4bd, 0xa9b211fb,
|
||||
0xc0b3020a, 0x9abf1200, 0xb4b6cdb2, 0x00804c07, 0x00b75e7e, 0x30f400f8, 0x05dcdff8, 0x22f90000,
|
||||
0xc0b3020a, 0x9abf1200, 0xb4b6cdb2, 0x00804c07, 0x00b7617e, 0x30f400f8, 0x05dcdff8, 0x22f90000,
|
||||
0x49feffbf, 0x10999001, 0x9fa0a0b2, 0x00b3020a, 0x0abf3400, 0xb294943d, 0x0141fe07, 0x11902bb2,
|
||||
0x20010c0f, 0x7e1db219, 0xb300b775, 0x3f1700a4, 0xb20abf19, 0xf01db22b, 0x010cfd94, 0x5e7e1920,
|
||||
0x20010c0f, 0x7e1db219, 0xb300b778, 0x3f1700a4, 0xb20abf19, 0xf01db22b, 0x010cfd94, 0x617e1920,
|
||||
0x49fe00b7, 0x10999001, 0xdcd99fbf, 0xbf000005, 0xf4f9a699, 0x317e070b, 0x25fb003a, 0xf830f408,
|
||||
0x0005dcdf, 0xbf42f900, 0x0149feff, 0xb2189990, 0xb29fa0a1, 0xb2c0b2b4, 0x00a0b3d3, 0x00c0b356,
|
||||
0x07cf1852, 0x42fe94bd, 0x14229001, 0xa001ff10, 0x07cf3529, 0x0f7ecab2, 0x2bb200a3, 0xb2080a35,
|
||||
0xa7b17e1a, 0x00a4b300, 0xb22bbf2c, 0x7e1ab20c, 0xb300a43e, 0xb21e00a4, 0x7e4bb21a, 0xb300a456,
|
||||
0xb31200a4, 0xbf0e0030, 0x3e32a022, 0x0a00a531, 0x0149fe02, 0xbf189990, 0x05dcd99f, 0x99bf0000,
|
||||
0x0bf4f9a6, 0x3a317e07, 0x0845fb00, 0xc0b202f9, 0x2400a0b3, 0x2000c0b3, 0xb4b6aabf, 0x00804c07,
|
||||
0x757e0db2, 0xa4b300b7, 0x0ab21000, 0x00a32f7e, 0x00a5763e, 0x01fb020a, 0x1700a0b3, 0x1300c0b3,
|
||||
0xcdb2aabf, 0x0c07b4b6, 0xb7757e10, 0x0a00f800, 0xf900f802, 0xb2b3b242, 0x00a2b2c4, 0x00a0b302,
|
||||
0x787e0db2, 0xa4b300b7, 0x0ab21000, 0x00a32f7e, 0x00a5763e, 0x01fb020a, 0x1700a0b3, 0x1300c0b3,
|
||||
0xcdb2aabf, 0x0c07b4b6, 0xb7787e10, 0x0a00f800, 0xf900f802, 0xb2b3b242, 0x00a2b2c4, 0x00a0b302,
|
||||
0xa5e97e42, 0xb2030000, 0x00a0b3a1, 0xb23bb236, 0x7e1cb22a, 0xb200a54c, 0x00a4b3a0, 0xbd1ab21e,
|
||||
0xa4107eb4, 0xb3a0b200, 0xb31000a4, 0x180c0040, 0x94f00619, 0xb249a0ff, 0x7e1bb22a, 0xb200a60b,
|
||||
0xf841fb0a, 0xf800f800, 0x98aeb200, 0xa0b30eaa, 0xf4bd0a00, 0x00a6013e, 0xb30fea98, 0x0f0e00a0,
|
||||
@@ -1366,40 +1366,40 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0x32a0b222, 0x0ad2b2c1, 0x00b0b302, 0x400cb85e, 0xd4bd0001, 0xb304c998, 0x33440090, 0xb3080014,
|
||||
0x3f3c0390, 0x26b93fcf, 0x321bf4f9, 0x1801cf18, 0xf92601b9, 0x18271bf4, 0xbf1802ce, 0x90ddbc02,
|
||||
0xb6909dbc, 0x99b80394, 0xbc000140, 0xef269009, 0xa00b1bf4, 0x3ea4bd29, 0x9000a6a7, 0xcc9001dd,
|
||||
0x14d4b318, 0xfb040ab3, 0xb2abbf21, 0xa6f009ac, 0x0d0bf4b9, 0xb503aa98, 0x5b7e01cb, 0x00f800b6,
|
||||
0x14d4b318, 0xfb040ab3, 0xb2abbf21, 0xa6f009ac, 0x0d0bf4b9, 0xb503aa98, 0x5e7e01cb, 0x00f800b6,
|
||||
0xa1b232f9, 0x04bdb2b2, 0xef3ef003, 0x19bf00a6, 0xb2010090, 0xf493a61a, 0x030a090d, 0x00a6f63e,
|
||||
0x1bf493a6, 0x3e020a09, 0x7e00a6f6, 0xa600a6a9, 0xdd08f402, 0x31fba4bd, 0xdff830f4, 0x000005dc,
|
||||
0xffbf82f9, 0x900149fe, 0xa3b22899, 0xb8b29fa0, 0x8400a9b3, 0x00b0b300, 0x0147fe7f, 0xbd05a498,
|
||||
0xbd54bd24, 0x24779014, 0x00a7603e, 0xbd0c3a98, 0xb002bc94, 0x7cb279a0, 0x00b65b7e, 0xff0f79bf,
|
||||
0xbd54bd24, 0x24779014, 0x00a7603e, 0xbd0c3a98, 0xb002bc94, 0x7cb279a0, 0x00b65e7e, 0xff0f79bf,
|
||||
0x0bf49fa6, 0x3e643d09, 0x9000a74e, 0x00900155, 0xf404a601, 0x6033d908, 0x11900700, 0x2024bc01,
|
||||
0xa6033998, 0x0b18f429, 0x04bd0106, 0x00a7513e, 0x1ab24bb2, 0x0016fc7e, 0x0df45aa6, 0x01119006,
|
||||
0x3d063998, 0xf419a6f4, 0x010f050c, 0xa4bd8f20, 0x00a7963e, 0x49fe020a, 0x28999001, 0xdcd99fbf,
|
||||
0xbf000005, 0xf4f9a699, 0x317e070b, 0x85fb003a, 0xf030f408, 0x0005dcdf, 0xbf82f900, 0x0149feff,
|
||||
0xfe309990, 0x9fa00147, 0xb208a998, 0x09b1b0a6, 0x91b0f105, 0xb2843d0a, 0x2c779090, 0xbd036998,
|
||||
0xa67fa0f4, 0x0708f409, 0x010804bd, 0xa60a90b4, 0x351bf409, 0x32008033, 0x00a8593e, 0xbc0c6a98,
|
||||
0x7cb24010, 0x5b7e4bb2, 0x79bf00b6, 0x9fa6ff0f, 0x900f1bf4, 0xf1090122, 0x1bf439a6, 0x9043b205,
|
||||
0x2c3e0111, 0x24bd00a8, 0xf10314bd, 0xa6056998, 0xcb08f419, 0x1e0020b3, 0x18f429a6, 0x0860b50f,
|
||||
0x7cb24010, 0x5e7e4bb2, 0x79bf00b6, 0x9fa6ff0f, 0x900f1bf4, 0xf1090122, 0x1bf439a6, 0x9043b205,
|
||||
0x2c3e0111, 0x14bd00a8, 0x24bdf103, 0xa6056998, 0xcb08f419, 0x1e0020b3, 0x18f429a6, 0x0860b50f,
|
||||
0xa009f0b4, 0xa86a3ef3, 0xa6f10f00, 0x051bf45f, 0x09bc05b2, 0xa7dc3e00, 0x091a0a00, 0xf459a6f1,
|
||||
0x65b50d0b, 0x0990b408, 0xa4bd95a0, 0x900149fe, 0x9fbf3099, 0x0005dcd9, 0xa699bf00, 0x070bf4f9,
|
||||
0x003a317e, 0xf41085fb, 0xdcd9f830, 0xf9000005, 0xfe99bf82, 0xff90014f, 0xa0a3b228, 0xb2b4b2f9,
|
||||
0x00c033d0, 0x3ddab20e, 0x7e140cb4, 0xfe00b78c, 0x14bd0142, 0x08242290, 0x06ff07fe, 0x3efb05fc,
|
||||
0x9800a939, 0x94bd0c3a, 0xa0b014bc, 0x7e2cb229, 0xbf00b65b, 0xa6f00f29, 0x560df49f, 0x9fa6fd0f,
|
||||
0x00c033d0, 0x3ddab20e, 0x7e140cb4, 0xfe00b78f, 0x14bd0142, 0x08242290, 0x06ff07fe, 0x3efb05fc,
|
||||
0x9800a939, 0x94bd0c3a, 0xa0b014bc, 0x7e2cb229, 0xbf00b65e, 0xa6f00f29, 0x560df49f, 0x9fa6fd0f,
|
||||
0xa6110cf4, 0x3018f496, 0x1bf495a6, 0xa9083e45, 0xf498a600, 0x97a62f0b, 0x98371bf4, 0x99900109,
|
||||
0x0109b501, 0x00a9363e, 0x90040998, 0x09b50199, 0xa9363e04, 0x02099800, 0xb5019990, 0x363e0209,
|
||||
0x099800a9, 0x01999003, 0x3e0309b5, 0xbf00a936, 0x01999009, 0x119009a0, 0x05399801, 0x08f419a6,
|
||||
0x0149fe85, 0xbf289990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07, 0x0885fb00, 0xdff830f4,
|
||||
0x000005dc, 0xa1b222f9, 0xb2b2ffbf, 0xbf03aa98, 0x0149fe1b, 0xfe109990, 0x9fa00140, 0xb20c0090,
|
||||
0xb65b7e0c, 0x980cbf00, 0x2bb2031a, 0x00b6727e, 0x09011b98, 0xf4b9a6ff, 0x1998101b, 0x0212b504,
|
||||
0x3e0292b5, 0x9800a9b0, 0x2cb2031a, 0x00b6727e, 0xbf031a98, 0x7efd0c1b, 0xfe00b672, 0x99900149,
|
||||
0xb65e7e0c, 0x980cbf00, 0x2bb2031a, 0x00b6757e, 0x09011b98, 0xf4b9a6ff, 0x1998101b, 0x0212b504,
|
||||
0x3e0292b5, 0x9800a9b0, 0x2cb2031a, 0x00b6757e, 0xbf031a98, 0x7efd0c1b, 0xfe00b675, 0x99900149,
|
||||
0xbf12a010, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07, 0x0825fb00, 0xdfc830f4, 0x000005dc,
|
||||
0xffbf82f9, 0xfef830f4, 0x99900149, 0x929fa060, 0xae180499, 0xa0f4bd1c, 0x05a9989f, 0x050aa2b2,
|
||||
0x330b91b0, 0x021a00e9, 0x980c2b98, 0x4afe092c, 0x90f10001, 0x44fe44aa, 0x01a6b201, 0xb6877e20,
|
||||
0x330b91b0, 0x021a00e9, 0x980c2b98, 0x4afe092c, 0x90f10001, 0x44fe44aa, 0x01a6b201, 0xb68a7e20,
|
||||
0xb205b200, 0x304490a3, 0x00aa713e, 0xa6082998, 0x310bf439, 0x3bb22ab2, 0x4db2010c, 0x00a8877e,
|
||||
0xb3044998, 0x981f0094, 0x94b30349, 0x49981800, 0x0094b302, 0xa649bf3b, 0x0918f491, 0x643e30b2,
|
||||
0x19b200aa, 0xb20bb0b4, 0x7e6ab291, 0xb200b6a0, 0xf435a6a3, 0x030ab91b, 0x0bf503a6, 0x14b301a3,
|
||||
0x19b200aa, 0xb20bb0b4, 0x7e6ab291, 0xb200b6a3, 0xf435a6a3, 0x030ab91b, 0x0bf503a6, 0x14b301a3,
|
||||
0x03b20c00, 0x8e3e743d, 0x03b200aa, 0x38940107, 0xb254bd07, 0xab9a3e86, 0x0c2a9800, 0x53bce4bd,
|
||||
0x014cfe10, 0x9016e1b0, 0x1bb258cc, 0x00b65b7e, 0xf300adb3, 0x1690b400, 0x9fa6f00f, 0x00d80cf5,
|
||||
0x2ab294bd, 0x7e1591b0, 0xb200a5e9, 0x00a9b3a4, 0x2abf00d6, 0x804c6bb2, 0x7e4db200, 0xb200b775,
|
||||
0x014cfe10, 0x9016e1b0, 0x1bb258cc, 0x00b65e7e, 0xf300adb3, 0x1690b400, 0x9fa6f00f, 0x00d80cf5,
|
||||
0x2ab294bd, 0x7e1591b0, 0xb200a5e9, 0x00a9b3a4, 0x2abf00d6, 0x804c6bb2, 0x7e4db200, 0xb200b778,
|
||||
0x00adb3a0, 0x2ab200a7, 0x4cb21bb2, 0x90014dfe, 0xbd7e50dd, 0xa0b200a4, 0x9000adb3, 0x902ab200,
|
||||
0x010c014b, 0x90014dfe, 0x3f7e54dd, 0xa0b200a6, 0x7800a4b3, 0x9815b0b4, 0x4afe0c2c, 0x30aa9001,
|
||||
0x00a6277e, 0xa60c90b4, 0x1e1bf491, 0xfe14b0b4, 0xaa90014a, 0xa95c7e30, 0x1590b400, 0xb3059f98,
|
||||
@@ -1407,8 +1407,8 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0xf99800ab, 0x14e0b402, 0x1bf491a6, 0x02feb506, 0x91a6f9bf, 0xa0091bf4, 0xab883efe, 0x01f99800,
|
||||
0x1bf491a6, 0x01feb506, 0x2ab24bb2, 0x00a60b7e, 0x130004b3, 0x90015590, 0x29988066, 0xf559a605,
|
||||
0x33fefa08, 0x98460070, 0x8db2042f, 0x2ab2e4bd, 0x0b00f1b0, 0x0070dc02, 0x41fe0000, 0x5c119001,
|
||||
0x7e0111b0, 0x9800a5e3, 0x2abf042c, 0xfb048bb2, 0x00b7477e, 0x2c981ebf, 0xbda0b204, 0xb22ab2b4,
|
||||
0xa5e57e0d, 0x0004b300, 0xbdff0406, 0xac003e04, 0x0c2a9800, 0xb2b003bc, 0x0100904c, 0x00b6727e,
|
||||
0x7e0111b0, 0x9800a5e3, 0x2abf042c, 0xfb048bb2, 0x00b74a7e, 0x2c981ebf, 0xbda0b204, 0xb22ab2b4,
|
||||
0xa5e57e0d, 0x0004b300, 0xbdff0406, 0xac003e04, 0x0c2a9800, 0xb2b003bc, 0x0100904c, 0x00b6757e,
|
||||
0xa60b90b4, 0xec08f409, 0xbc032f98, 0x29b59039, 0xf49fa609, 0x94bd0808, 0xbd0929b5, 0x0149fea4,
|
||||
0xbf609990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07, 0x0830f400, 0xf43885fb, 0xdcd9cc30,
|
||||
0xf9000005, 0xf499bf82, 0x4ffef830, 0x5cff9001, 0xe1b0f9a0, 0xb2c8b20b, 0xb3a3b2d6, 0x028400b9,
|
||||
@@ -1416,18 +1416,18 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0xb3a0b200, 0x025e00ad, 0x68bc17bf, 0x017998f0, 0x08f59fa6, 0x7998024d, 0x0194b304, 0x3e05000a,
|
||||
0xb300aee1, 0x023e0069, 0x09027f98, 0xf5f9a6f0, 0xb2022a0b, 0xa5e97e3a, 0xb3a2b200, 0x021e00a9,
|
||||
0xb20c3c98, 0x0140fe7b, 0xb2340090, 0xa6277e0a, 0xb50ab200, 0x8bcc0570, 0xa6c07e70, 0xb3a0b200,
|
||||
0x01e900ad, 0x010d00b4, 0xf501a6f0, 0xf501ce0b, 0x3d01d00c, 0x00804cb4, 0x8c7e2ab2, 0x3abf00b7,
|
||||
0x4c070b94, 0x2db20080, 0x00b7757e, 0xb30ca1b0, 0x01b600ad, 0x18052918, 0x9476042f, 0xfff4f008,
|
||||
0x01e900ad, 0x010d00b4, 0xf501a6f0, 0xf501ce0b, 0x3d01d00c, 0x00804cb4, 0x8f7e2ab2, 0x3abf00b7,
|
||||
0x4c070b94, 0x2db20080, 0x00b7787e, 0xb30ca1b0, 0x01b600ad, 0x18052918, 0x9476042f, 0xfff4f008,
|
||||
0x09e59fff, 0xf5e966ff, 0xe401980b, 0xa6ffffe9, 0x8e08f589, 0xbcf4bd01, 0x9918902f, 0x009d3309,
|
||||
0xff900182, 0x07f4b301, 0xaefb3ef2, 0xf28e3c00, 0x08f59f26, 0xfdc4016d, 0xff94f0ff, 0xa6529dbc,
|
||||
0x050df456, 0xd99065b2, 0xbca43d10, 0xc43db029, 0xa63ee4bd, 0xd6b100ad, 0x0cf5006f, 0x10b40145,
|
||||
0x050df456, 0xd99065b2, 0xbce4bd10, 0xa43db029, 0xa63ec43d, 0xd6b100ad, 0x0cf5006f, 0x10b40145,
|
||||
0x98be3c0b, 0x26f81e3c, 0x170bf4f9, 0x39ff94f0, 0x9ffd0099, 0x00903304, 0x3c010a06, 0x010ce9bf,
|
||||
0x9001ee90, 0xe5a601dd, 0x33ce08f4, 0x00ed00c9, 0x94f0293f, 0x080bf408, 0xd000a933, 0xb294bd00,
|
||||
0x1491b03a, 0xb01391b0, 0x91301291, 0x014bfe5b, 0x7e5bbb90, 0xb200a6f8, 0x00adb3a0, 0x903400ef,
|
||||
0x0090335b, 0x7e3ab211, 0xb200a9d8, 0x00adb3a0, 0x00b400db, 0x1140b40d, 0x90014ffe, 0x2eb250ff,
|
||||
0xb0070d94, 0x804101f1, 0x0b3ab200, 0xb04cb201, 0xe37e0011, 0x0bb200a5, 0x3ab22cb2, 0x90014dfe,
|
||||
0xbd7e4cdd, 0xe0b400a4, 0xb2a0b214, 0xbd3ab21c, 0x7e0db2b4, 0xb300a5e5, 0x0091000d, 0xfe13b0b4,
|
||||
0xaa90014a, 0xa95c7e34, 0x0c3a9800, 0xfe0db0b4, 0xcc90014c, 0xb65b7e48, 0xb3a0b200, 0xb46d00a4,
|
||||
0xaa90014a, 0xa95c7e34, 0x0c3a9800, 0xfe0db0b4, 0xcc90014c, 0xb65e7e48, 0xb3a0b200, 0xb46d00a4,
|
||||
0xf0011290, 0x1bf491a6, 0x014e9832, 0xb370efcd, 0x0f0600f4, 0x06291870, 0xbcff94f0, 0x9fbb909e,
|
||||
0x0149b502, 0x00ae983e, 0x3ab20bb2, 0x3e7e2cb2, 0xa0b200a4, 0x3400a4b3, 0xfe0265bb, 0xaa90014a,
|
||||
0xa6a97e34, 0x0060b300, 0x0b90b420, 0xbc8085bc, 0x91b09095, 0xace43e0b, 0x3e020000, 0x0000aec8,
|
||||
@@ -1440,88 +1440,88 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0x00a6277e, 0x2bcc0ab2, 0xa6c07e70, 0xb3a8b200, 0x00ad00ad, 0xfe7021cd, 0x80420147, 0x44779000,
|
||||
0x00b0373e, 0xbd0c00b4, 0x0979a094, 0xf409a6f0, 0x0200091b, 0x00b03e3e, 0x09a6f009, 0x00090df4,
|
||||
0xb03e3e03, 0x0bc0b400, 0xbd0704b6, 0xb20db2e4, 0xb0b4bd5a, 0x71b00021, 0xa5e37e01, 0xb25abf00,
|
||||
0xb22cb20b, 0xb7757e3d, 0xb27ebf00, 0xb23bb2a0, 0xb22cb25a, 0xa5e57e0d, 0x0004b300, 0xbd3ab245,
|
||||
0xb22cb20b, 0xb7787e3d, 0xb27ebf00, 0xb23bb2a0, 0xb22cb25a, 0xa5e57e0d, 0x0004b300, 0xbd3ab245,
|
||||
0xa4107eb4, 0xb3a0b200, 0x003700a4, 0x0201bb70, 0x0df404a6, 0x9040b205, 0x6ab2101b, 0xb2b03bbc,
|
||||
0xb7957e0c, 0x014afe00, 0x900240bb, 0x60bc30aa, 0xa6a97e60, 0xb314bd00, 0xff6d004d, 0x5ab280b2,
|
||||
0xb7987e0c, 0x014afe00, 0x900240bb, 0x60bc30aa, 0xa6a97e60, 0xb314bd00, 0xff6d004d, 0x5ab280b2,
|
||||
0x0b7e3bb2, 0x4c3e00a6, 0x020000b0, 0x900149fe, 0x9fbf4c99, 0x0005dcd9, 0xb299bf00, 0xf4f9a60a,
|
||||
0x317e070b, 0x30f4003a, 0x2485fb08, 0xd9f830f4, 0x000005dc, 0x99bf32f9, 0x90014ffe, 0xa1b214ff,
|
||||
0x94bdf9a0, 0xc3b2b2b2, 0x4b0140fe, 0x00900320, 0xb209a010, 0xb79b7e0a, 0xb309bf00, 0xb34c0090,
|
||||
0x94bdf9a0, 0xc3b2b2b2, 0x4b0140fe, 0x00900320, 0xb209a010, 0xb79e7e0a, 0xb309bf00, 0xb34c0090,
|
||||
0xa04800a4, 0xb509bf91, 0x0fbf0192, 0xb5100049, 0x0fbf04f9, 0xf9b52009, 0xb509bf05, 0x0fbf0693,
|
||||
0xf9350109, 0x3509bf1c, 0x0fbf2c9a, 0xf9b5f009, 0x900fbf0a, 0xf9b540f9, 0x900fbf0e, 0xf9b5c0f9,
|
||||
0x3e0abf0f, 0xbd00b0e9, 0x0149fea4, 0xbf149990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07,
|
||||
0x0835fb00, 0xdfd030f4, 0x000005dc, 0xffbf82f9, 0x900149fe, 0xa3b25099, 0x02059fa0, 0xf800a9b3,
|
||||
0x00b63004, 0x350b9cf0, 0x94bd2ca9, 0x7e0ca9b5, 0xb200a5e9, 0xbd3abfa0, 0x00804cb4, 0x757e0db2,
|
||||
0xa5b200b7, 0xae00adb3, 0x33093f04, 0x049f4a9d, 0x33010918, 0x0497469d, 0x33020918, 0x048f469d,
|
||||
0x33030918, 0x0487539d, 0x18040e18, 0x0f180509, 0x070d1806, 0xf0ffe4f0, 0xf4f0ff94, 0x0894b6ff,
|
||||
0xfd10f4b6, 0xd4b6059e, 0x05f9fd18, 0xf505dffd, 0x05045b0b, 0x03d6b005, 0x045a0cf5, 0xb3013db5,
|
||||
0x0835fb00, 0xdfd030f4, 0x000005dc, 0xffbf82f9, 0x900149fe, 0xa3b25099, 0x02059fa0, 0xfb00a9b3,
|
||||
0x00b63004, 0x350b9cf0, 0x94bd2ca9, 0x7e0ca9b5, 0xb200a5e9, 0xbd3abfa0, 0x00804cb4, 0x787e0db2,
|
||||
0xa5b200b7, 0xb100adb3, 0x33093f04, 0x04a24a9d, 0x33010918, 0x049a469d, 0x33020918, 0x0492469d,
|
||||
0x33030918, 0x048a539d, 0x18040e18, 0x0f180509, 0x070d1806, 0xf0ffe4f0, 0xf4f0ff94, 0x0894b6ff,
|
||||
0xfd10f4b6, 0xd4b6059e, 0x05f9fd18, 0xf505dffd, 0x05045e0b, 0x03d6b005, 0x045d0cf5, 0xb3013db5,
|
||||
0x490e01d4, 0x39b55000, 0xb1d73e02, 0x080d1800, 0x18090918, 0x0e180a0f, 0xffd4f00b, 0xf0ff94f0,
|
||||
0x94b6fff4, 0x10f4b608, 0xb6059dfd, 0xf9fd18e4, 0x05effd05, 0xb2023eb5, 0x7e0bb23a, 0x9800a60b,
|
||||
0xff09023a, 0xa9a60305, 0x04080bf5, 0x9007a5b6, 0x3ab5303b, 0xb6ce7e03, 0xb3a5b200, 0x03f500ad,
|
||||
0x09033b98, 0x343a90c0, 0xfd3fbb90, 0xb5b604b9, 0xb79b7e03, 0xb3a5b200, 0x03d900ad, 0xfe0147fe,
|
||||
0x77900148, 0x9044bd40, 0x88900179, 0x0991b03c, 0x00b3443e, 0x8ea0e4bd, 0x0f0044b3, 0xbd0c3a98,
|
||||
0x3efe0cb4, 0xb200b267, 0xb24bb23a, 0xa5787e7c, 0xb3a5b200, 0x039d00ad, 0x94f0793f, 0x120bf401,
|
||||
0xb20c3a98, 0x7eff0c4b, 0x3e00b672, 0xb200b341, 0xa32f7e7a, 0x00a0b300, 0x0c3a980f, 0xfd0c4bb2,
|
||||
0x00b2673e, 0x94f0793f, 0x0e1bf402, 0xb20c3a98, 0x3efd0c4b, 0xb400b336, 0x3ab209b0, 0x8db2010c,
|
||||
0x00a63f7e, 0x5d00a0b3, 0x3fb2793f, 0x99c724bd, 0x01999002, 0x980a91b0, 0x54b354f5, 0xb0b43900,
|
||||
0x0022bc09, 0x02bc030c, 0x0304b600, 0x014001b8, 0x1031bc00, 0x957e1ab2, 0x30bc00b7, 0x4309b800,
|
||||
0x95200001, 0xb45302b5, 0x0fb50af0, 0x3e81a054, 0x9000b301, 0xff900122, 0x1424b318, 0xb62e3ebe,
|
||||
0x3f8ebf00, 0x027f5879, 0x98077d18, 0x3a9803ee, 0x0299c70d, 0xcc00f3f0, 0x96cb70ff, 0xcb4bb21f,
|
||||
0x010cd8e6, 0xebf0d6cb, 0x7e01e0f6, 0x9800a2e5, 0x4bb20c3a, 0x727e6cb2, 0xa5b200b6, 0xb400adb3,
|
||||
0x01449002, 0xa6033b98, 0xeb08f54b, 0xbc94bdfe, 0x89a0b0bb, 0xb17e8ab2, 0xa5b200b7, 0x9400adb3,
|
||||
0xbd37b202, 0x547f9884, 0xbc9088bc, 0x94b69098, 0x4099b803, 0x39bc0001, 0x0b91b090, 0x5300f9b3,
|
||||
0x033c9802, 0x3d0fa0b4, 0xbc24bdb4, 0x44bdc0cc, 0x00b78c7e, 0x3e0f60b4, 0x9800b45f, 0x2bb20d3a,
|
||||
0x7e0c41b0, 0x3300a2f5, 0x00b500a9, 0xfe0c3a98, 0x2bb2014c, 0x7e38cc90, 0xb300b65b, 0x020c00ad,
|
||||
0xb40be0b4, 0xef980e90, 0xd899c703, 0x1bf59fa6, 0x3a98008e, 0x0c2bb20d, 0xa2ed7e01, 0x014cfe00,
|
||||
0x2bb23ab2, 0x7e30cc90, 0xb300a593, 0x981306a4, 0x2bb20c3a, 0x727efd0c, 0x5c3e00b6, 0xadb300b4,
|
||||
0x7401cb00, 0x93f01c90, 0x9099bc00, 0x7f0069bc, 0xff19e401, 0x091bf4ff, 0x5c3e0260, 0x3a9800b4,
|
||||
0x014cfe0c, 0xffff1be4, 0x7e34cc90, 0xb300b65b, 0x019800ad, 0x343af034, 0xf9263690, 0x60100df4,
|
||||
0xff1be402, 0x0c3a98ff, 0x00b4513e, 0xb20c3a98, 0x7efd0c2b, 0xb300b672, 0x017000ad, 0x98012290,
|
||||
0x2aa6033a, 0xff3708f5, 0x6eb264b2, 0xd43db43d, 0xc4bdf4bd, 0x00b4933e, 0x9473e97f, 0x010d0a00,
|
||||
0x00b48d3e, 0x0600d033, 0xcc90010b, 0x01ff9001, 0xa602ee90, 0xe308f4fa, 0x0b00c4b3, 0x3e547cb5,
|
||||
0x3300b5cf, 0x00a600b9, 0xb0013998, 0x0cf40296, 0xb2030930, 0x5479b56d, 0xf4bde4bd, 0x00b4d23e,
|
||||
0x9073d97f, 0x697c0a00, 0x01ee90e9, 0x9001ff90, 0x399802dd, 0xf4f9a603, 0x493ee908, 0x94bd00b5,
|
||||
0x79b5f101, 0xb224bd54, 0xb5233e1b, 0xe4407f00, 0xf4ffff09, 0xf10f260b, 0x1bf4bfa6, 0xff0be40b,
|
||||
0xb51b3eff, 0x0c3a9800, 0xffff0ce4, 0x00b6727e, 0xb900adb3, 0xff0be400, 0x9019b2ff, 0x44900122,
|
||||
0x9891b202, 0x29a60339, 0x09c508f4, 0xf5b9a6f1, 0x9800a00b, 0x3c980c3a, 0xb6727e0a, 0x00adb300,
|
||||
0x31b5008c, 0xb5cf3e0a, 0xbd6f7f00, 0x01c19294, 0xf05179b5, 0x04bd00f3, 0x3e527fb5, 0x7f00b587,
|
||||
0x014c584b, 0x900c3a98, 0xb3f00100, 0x00c3f000, 0x7e024490, 0xb300b672, 0xb45200a4, 0xe9980be0,
|
||||
0x70999001, 0xa601e9b5, 0xd608f401, 0x9808607c, 0xf00c0c3a, 0xffff0be4, 0x00b6727e, 0x2d00a4b3,
|
||||
0xe4014cfe, 0xb2ffff0b, 0x40cc903a, 0x00a5787e, 0x1900a4b3, 0x98469034, 0x94f0517f, 0xf0f9bcff,
|
||||
0x3e517fb5, 0x0a00b5cf, 0x3ea5b203, 0x9000b5da, 0x77900188, 0x148db318, 0x49fefd90, 0x3c999001,
|
||||
0x457e9abf, 0xf03e00b7, 0x030500b5, 0x00b5f23e, 0x0bb204bd, 0x0b7e3ab2, 0x50b300a6, 0x3a981a00,
|
||||
0x7e04bd0c, 0x9800b6c4, 0x30b50d3a, 0xb7457e0c, 0x0d30b500, 0x900149fe, 0x9fbf5099, 0x0005dcd9,
|
||||
0xb299bf00, 0xf4f9a65a, 0x343e110b, 0x010500b6, 0x00b5f03e, 0x003a317e, 0xf93085fb, 0x7ea0b202,
|
||||
0x9800a5e7, 0xc47e0c0a, 0x0a9800b6, 0xb7457e0d, 0x7e0ab200, 0xbd00b745, 0xbf01fba4, 0x0aafb2a9,
|
||||
0xf4b9a602, 0xb9900d18, 0x98f9bc01, 0xc9a0a4bd, 0xa9bf00f8, 0x020aafb2, 0x18f4b9a6, 0x01b9900b,
|
||||
0xfcbca4bd, 0xbf00f899, 0xb2afb2b9, 0xf4c9a6ca, 0xf10a0708, 0xfbb500f8, 0xb5fca002, 0x00f801fc,
|
||||
0xaf98a9bf, 0x90b9bc02, 0xfbbfa9a0, 0x08f49ba6, 0x029bbb08, 0xa998a9a0, 0xa6aabf01, 0x051bf4a9,
|
||||
0x00f8f10a, 0x0800a0b3, 0x00b7457e, 0x30f400f8, 0x05dcdff8, 0x32f90000, 0x49feffbf, 0x14999001,
|
||||
0x9fa0a0b2, 0xa0b3b3b2, 0xfd024200, 0x0cf4a2a6, 0x01ab903a, 0xb60141fe, 0x119002b4, 0x7e1ab210,
|
||||
0xb300b7b1, 0xbf2700a4, 0xb21db219, 0xa0e4bd2c, 0x90dfbf90, 0x9eb201e9, 0xa699fcbc, 0xf408f490,
|
||||
0x3da0ddbf, 0x00b72a3e, 0x49fe020a, 0x14999001, 0xdcd99fbf, 0xbf000005, 0xf4f9a699, 0x317e070b,
|
||||
0x35fb003a, 0xda00f808, 0x00002944, 0x0041c77e, 0xf000a630, 0xa6f00bac, 0x01aab901, 0x44da00f8,
|
||||
0x7e000029, 0x30004142, 0xacf000a6, 0x01a6f00b, 0xf801aab9, 0x2944da00, 0xd77e0000, 0xa6300042,
|
||||
0x0bacf000, 0xb901a6f0, 0x00f801aa, 0x7effb4f0, 0xf8000b94, 0x0b7e7e00, 0xf900f800, 0x3da0b202,
|
||||
0x384c7ea4, 0x00a6b000, 0xa00b9cf0, 0xfb9ab20a, 0xb202f901, 0x7ea43da0, 0xb000382a, 0x9cf000a6,
|
||||
0xb20aa00b, 0xf401fb9a, 0xdcdfe430, 0xf9000005, 0xfeffbf82, 0x45fe0149, 0x3c999001, 0xa00147fe,
|
||||
0x2455909f, 0xd9347790, 0x0000141c, 0x4bfe9abf, 0x90080c01, 0xff0d2cbb, 0x0000c17e, 0xeb00a433,
|
||||
0x3f0c30b4, 0x0c943339, 0x043118e2, 0x0f001033, 0xb0011933, 0x3e043d00, 0x9800b96d, 0x2cd9023f,
|
||||
0x98000014, 0x34580431, 0x3f5fa00a, 0x0339989f, 0xb5183690, 0xff090159, 0xf43379a0, 0xf77e1800,
|
||||
0xa0320032, 0x2900ad33, 0xdf010901, 0x0000142c, 0x1272f920, 0xbd0043f0, 0xb8ad3e14, 0x0241bc00,
|
||||
0x010006b1, 0x40060df4, 0x947e0100, 0x24d9000b, 0xbf000014, 0xff2ce49a, 0xb26bb2ff, 0x1300de0d,
|
||||
0x117e0000, 0x7aa000af, 0xd400adb3, 0x985bbf00, 0x1d90015c, 0x7c0eb204, 0x10bc2020, 0x1300da10,
|
||||
0x367e0000, 0xa0320021, 0xc500ad33, 0x4cb4bd00, 0x00da0100, 0xa6000013, 0xa408f414, 0x00b95c3e,
|
||||
0xd9023f98, 0x0000142c, 0x58043498, 0x5fa00a32, 0x39989f3f, 0x18389003, 0x090159b5, 0x3379a0ff,
|
||||
0x7e1600f4, 0x320032f7, 0x00ad33a0, 0x2cdf0084, 0x20000014, 0xff26e4f1, 0x3e24bdff, 0xbc00b94d,
|
||||
0x16b11262, 0x0df40100, 0x01004106, 0x000b947e, 0x5c985bbf, 0x042d9001, 0x00da1eb2, 0x7e000013,
|
||||
0xe40020d0, 0xbcffff4c, 0xa0322021, 0x1db28bb2, 0x001300de, 0x40417c00, 0x3500a433, 0x001424d9,
|
||||
0x7e9abf00, 0xa000ac3b, 0x00a4b37a, 0x4cb4bd13, 0x00da0100, 0xa6000013, 0xa608f426, 0x5c985bbf,
|
||||
0xbd7ab201, 0x7e040ed4, 0x32002136, 0x2db034a0, 0x817e3ab2, 0x0d33000f, 0x30fe7100, 0x020f3a01,
|
||||
0x1838f130, 0x04090333, 0x30014afe, 0x31303991, 0x90b4bd3b, 0x717e38aa, 0xe73e000f, 0x02f900b7,
|
||||
0x002930d9, 0xbfa0b200, 0x7e640b9a, 0x090000de, 0x00a43310, 0xa6008961, 0x009fcf02, 0x1000f5f1,
|
||||
0x8a009ff6, 0x4b02a600, 0xc4bd1000, 0xbd27104d, 0x198b7ee4, 0x00a43300, 0x2930d915, 0x9abf0000,
|
||||
0x00009b7e, 0x123e0409, 0x0ab200ba, 0x7e03e84b, 0x890016fc, 0xb802a400, 0x000200aa, 0x920aa5b6,
|
||||
0x9af601aa, 0x01114f00, 0x020099b8, 0x009ff600, 0x9a32943d, 0x000001fb, 0x00000000, 0x00000000,
|
||||
0xff09023a, 0x1bf4a9a6, 0x3e04bd09, 0xb600b5ed, 0x3b9007a5, 0x033ab530, 0x00b6d17e, 0xadb3a5b2,
|
||||
0x9803f500, 0xc009033b, 0x90343a90, 0xb9fd3fbb, 0x03b5b604, 0x00b79e7e, 0xadb3a5b2, 0xfe03d900,
|
||||
0x48fe0147, 0x40779001, 0x799044bd, 0x3c889001, 0x3e0991b0, 0xbd00b347, 0xb38ea0e4, 0x980f0044,
|
||||
0xb4bd0c3a, 0x6a3efe0c, 0x3ab200b2, 0x7cb24bb2, 0x00a5787e, 0xadb3a5b2, 0x3f039d00, 0x0194f079,
|
||||
0x98120bf4, 0x4bb20c3a, 0x757eff0c, 0x443e00b6, 0x7ab200b3, 0x00a32f7e, 0x0f00a0b3, 0xb20c3a98,
|
||||
0x3efd0c4b, 0x3f00b26a, 0x0294f079, 0x980e1bf4, 0x4bb20c3a, 0x393efd0c, 0xb0b400b3, 0x0c3ab209,
|
||||
0x7e8db201, 0xb300a63f, 0x3f5d00a0, 0xbd3fb279, 0x0299c724, 0xb0019990, 0xf5980a91, 0x0054b354,
|
||||
0x09b0b439, 0x0c0022bc, 0x0002bc03, 0xb80304b6, 0x00014001, 0xb21031bc, 0xb7987e1a, 0x0030bc00,
|
||||
0x014309b8, 0xb5952000, 0xf0b45302, 0x540fb50a, 0x043e81a0, 0x229000b3, 0x18ff9001, 0xbe1424b3,
|
||||
0x00b6313e, 0x793f8ebf, 0x18027f58, 0xee98077d, 0x0d3a9803, 0xf00299c7, 0xffcc00f3, 0x1f96cb70,
|
||||
0xe6cb4bb2, 0xcb010cd8, 0xf6ebf0d6, 0xe57e01e0, 0x3a9800a2, 0xb24bb20c, 0xb6757e6c, 0xb3a5b200,
|
||||
0x02b400ad, 0x98014490, 0x4ba6033b, 0xfeeb08f5, 0xbbbc94bd, 0xb289a0b0, 0xb7b47e8a, 0xb3a5b200,
|
||||
0x029400ad, 0x84bd37b2, 0xbc547f98, 0x98bc9088, 0x0394b690, 0x014099b8, 0x9039bc00, 0xb30b91b0,
|
||||
0x025300f9, 0xb4033c98, 0xb43d0fa0, 0xccbc24bd, 0x7e44bdc0, 0xb400b78f, 0x623e0f60, 0x3a9800b4,
|
||||
0xb02bb20d, 0xf57e0c41, 0xa93300a2, 0x9800b500, 0x4cfe0c3a, 0x902bb201, 0x5e7e38cc, 0xadb300b6,
|
||||
0xb4020c00, 0x90b40be0, 0x03ef980e, 0xa6d899c7, 0x8e1bf59f, 0x0d3a9800, 0x010c2bb2, 0x00a2ed7e,
|
||||
0xb2014cfe, 0x902bb23a, 0x937e30cc, 0xa4b300a5, 0x3a981306, 0x0c2bb20c, 0xb6757efd, 0xb45f3e00,
|
||||
0x00adb300, 0x907401cb, 0x0093f01c, 0xbc9099bc, 0x017f0069, 0xffff19e4, 0x60091bf4, 0xb45f3e02,
|
||||
0x0c3a9800, 0xe4014cfe, 0x90ffff1b, 0x5e7e34cc, 0xadb300b6, 0x34019800, 0x90343af0, 0xf4f92636,
|
||||
0x0260100d, 0xffff1be4, 0x3e0c3a98, 0x9800b454, 0x2bb20c3a, 0x757efd0c, 0xadb300b6, 0x90017000,
|
||||
0x3a980122, 0xf52aa603, 0xb2ff3708, 0x3d6eb264, 0xbdd43db4, 0x3ec4bdf4, 0x7f00b496, 0x009473e9,
|
||||
0x3e010d0a, 0x3300b490, 0x0b0600d0, 0x01cc9001, 0x9001ff90, 0xfaa602ee, 0xb3e308f4, 0xb50b00c4,
|
||||
0xd23e547c, 0xb93300b5, 0x9800a600, 0x96b00139, 0x300cf402, 0x6db20309, 0xbd5479b5, 0x3ef4bde4,
|
||||
0x7f00b4d5, 0x009073d9, 0xe9697c0a, 0x9001ee90, 0xdd9001ff, 0x03399802, 0x08f4f9a6, 0xb54c3ee9,
|
||||
0x0194bd00, 0x5479b5f1, 0x1bb224bd, 0x00b5263e, 0x09e4407f, 0x0bf4ffff, 0xa6f10f26, 0x0b1bf4bf,
|
||||
0xffff0be4, 0x00b51e3e, 0xe40c3a98, 0x7effff0c, 0xb300b675, 0x00b900ad, 0xffff0be4, 0x229019b2,
|
||||
0x02449001, 0x399891b2, 0xf429a603, 0xf109c508, 0x0bf5b9a6, 0x3a9800a0, 0x0a3c980c, 0x00b6757e,
|
||||
0x8c00adb3, 0x0a31b500, 0x00b5d23e, 0x94bd6f7f, 0xb501c192, 0xf3f05179, 0xb504bd00, 0x8a3e527f,
|
||||
0x4b7f00b5, 0x98014c58, 0x00900c3a, 0x00b3f001, 0x9000c3f0, 0x757e0244, 0xa4b300b6, 0xe0b45200,
|
||||
0x01e9980b, 0xb5709990, 0x01a601e9, 0x7cd608f4, 0x3a980860, 0xe4f00c0c, 0x7effff0b, 0xb300b675,
|
||||
0xfe2d00a4, 0x0be4014c, 0x3ab2ffff, 0x7e40cc90, 0xb300a578, 0x341900a4, 0x7f984690, 0xff94f051,
|
||||
0xb5f0f9bc, 0xd23e517f, 0x030a00b5, 0xdd3ea5b2, 0x889000b5, 0x18779001, 0x90148db3, 0x0149fefd,
|
||||
0xbf3c9990, 0xb7487e9a, 0xb5f33e00, 0x3e030500, 0xbd00b5f5, 0xb20bb204, 0xa60b7e3a, 0x0050b300,
|
||||
0x0c3a981a, 0xc77e04bd, 0x3a9800b6, 0x0c30b50d, 0x00b7487e, 0xfe0d30b5, 0x99900149, 0xd99fbf50,
|
||||
0x000005dc, 0x5ab299bf, 0x0bf4f9a6, 0xb6373e11, 0x3e010500, 0x7e00b5f3, 0xfb003a31, 0x02f93085,
|
||||
0xe77ea0b2, 0x0a9800a5, 0xb6c77e0c, 0x0d0a9800, 0x00b7487e, 0x487e0ab2, 0xa4bd00b7, 0xa9bf01fb,
|
||||
0x020aafb2, 0x18f4b9a6, 0x01b9900d, 0xbd98f9bc, 0xf8c9a0a4, 0xb2a9bf00, 0xa6020aaf, 0x0b18f4b9,
|
||||
0xbd01b990, 0x99fcbca4, 0xb9bf00f8, 0xcab2afb2, 0x08f4c9a6, 0xf8f10a07, 0x02fbb500, 0xfcb5fca0,
|
||||
0xbf00f801, 0x02af98a9, 0xa090b9bc, 0xa6fbbfa9, 0x0808f49b, 0xa0029bbb, 0x01a998a9, 0xa9a6aabf,
|
||||
0x0a051bf4, 0xb300f8f1, 0x7e0800a0, 0xf800b748, 0xf830f400, 0x0005dcdf, 0xbf32f900, 0x0149feff,
|
||||
0xb2149990, 0xb29fa0a0, 0x00a0b3b3, 0xa6fd0242, 0x3a0cf4a2, 0xfe01ab90, 0xb4b60141, 0x10119002,
|
||||
0xb47e1ab2, 0xa4b300b7, 0x19bf2700, 0x2cb21db2, 0x90a0e4bd, 0xe990dfbf, 0xbc9eb201, 0x90a699fc,
|
||||
0xbff408f4, 0x3e3da0dd, 0x0a00b72d, 0x0149fe02, 0xbf149990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6,
|
||||
0x3a317e07, 0x0835fb00, 0x44da00f8, 0x7e000029, 0x300041c7, 0xacf000a6, 0x01a6f00b, 0xf801aab9,
|
||||
0x2944da00, 0x427e0000, 0xa6300041, 0x0bacf000, 0xb901a6f0, 0x00f801aa, 0x002944da, 0x42d77e00,
|
||||
0x00a63000, 0xf00bacf0, 0xaab901a6, 0xf000f801, 0x947effb4, 0x00f8000b, 0x000b7e7e, 0x02f900f8,
|
||||
0xa43da0b2, 0x00384c7e, 0xf000a6b0, 0x0aa00b9c, 0x01fb9ab2, 0xa0b202f9, 0x2a7ea43d, 0xa6b00038,
|
||||
0x0b9cf000, 0x9ab20aa0, 0x30f401fb, 0x05dcdfe4, 0x82f90000, 0x49feffbf, 0x0145fe01, 0xfe3c9990,
|
||||
0x9fa00147, 0x90245590, 0x1cd93477, 0xbf000014, 0x014bfe9a, 0xbb90080c, 0x7eff0d2c, 0x330000c1,
|
||||
0xb4eb00a4, 0x393f0c30, 0xe20c9433, 0x33043118, 0x330f0010, 0x00b00119, 0x703e043d, 0x3f9800b9,
|
||||
0x142cd902, 0x31980000, 0x0a345804, 0x9f3f5fa0, 0x90033998, 0x59b51836, 0xa0ff0901, 0x00f43379,
|
||||
0x32f77e18, 0x33a03200, 0x012900ad, 0x2cdf0109, 0x20000014, 0xf01272f9, 0x14bd0043, 0x00b8b03e,
|
||||
0xb10241bc, 0xf4010006, 0x0040060d, 0x0b947e01, 0x1424d900, 0x9abf0000, 0xffff2ce4, 0x0db26bb2,
|
||||
0x001300de, 0xaf117e00, 0xb37aa000, 0x00d400ad, 0x5c985bbf, 0x041d9001, 0x207c0eb2, 0x1010bc20,
|
||||
0x001300da, 0x21367e00, 0x33a03200, 0x00c500ad, 0x004cb4bd, 0x1300da01, 0x14a60000, 0x3ea408f4,
|
||||
0x9800b95f, 0x2cd9023f, 0x98000014, 0x32580434, 0x3f5fa00a, 0x0339989f, 0xb5183890, 0xff090159,
|
||||
0xf43379a0, 0xf77e1600, 0xa0320032, 0x8400ad33, 0x142cdf00, 0xf1200000, 0xffff26e4, 0x503e24bd,
|
||||
0x62bc00b9, 0x0016b112, 0x060df401, 0x7e010041, 0xbf000b94, 0x015c985b, 0xb2042d90, 0x1300da1e,
|
||||
0xd07e0000, 0x4ce40020, 0x21bcffff, 0xb2a03220, 0xde1db28b, 0x00001300, 0x3340417c, 0xd93500a4,
|
||||
0x00001424, 0x3b7e9abf, 0x7aa000ac, 0x1300a4b3, 0x004cb4bd, 0x1300da01, 0x26a60000, 0xbfa608f4,
|
||||
0x015c985b, 0xd4bd7ab2, 0x367e040e, 0xa0320021, 0xb22db034, 0x0f817e3a, 0x000d3300, 0x0130fe71,
|
||||
0x30020f3a, 0x331838f1, 0xfe040903, 0x9130014a, 0x3b313039, 0xaa90b4bd, 0x0f717e38, 0xb7ea3e00,
|
||||
0xd902f900, 0x00002930, 0x9abfa0b2, 0xde7e640b, 0x10090000, 0x6100a433, 0x02a60089, 0xf1009fcf,
|
||||
0xf61000f5, 0x008a009f, 0x004b02a6, 0x4dc4bd10, 0xe4bd2710, 0x00198b7e, 0x1500a433, 0x002930d9,
|
||||
0x7e9abf00, 0x0900009b, 0xba153e04, 0x4b0ab200, 0xfc7e03e8, 0x00890016, 0xaab802a4, 0xb6000200,
|
||||
0xaa920aa5, 0x009af601, 0xb801114f, 0x00020099, 0x3d009ff6, 0xfb9a3294, 0x00000001, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
@@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_dbg[] = {
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0xb22438cf, 0xcfd90bc8, 0xf23ebc55, 0x2e5c0e40,
|
||||
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x0d4a5d7d, 0x9c31ffb3, 0x95bc604f, 0x40cc834d,
|
||||
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0x1289f13d, 0xdc6acca2, 0x50be285c, 0xd086f67e,
|
||||
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0xc901a2e3, 0xd0a96e16, 0x4a0da134, 0xc2405c59,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
|
||||
@@ -444,7 +444,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0xfeffbf22, 0x99900149, 0x0142fe14, 0x94bd9fa0, 0xa00c2290, 0x3da37e29, 0x00a03300, 0xda040b56,
|
||||
0x00002944, 0x2db2bcb2, 0x0042d77e, 0xa433a032, 0x41fe4300, 0x10119001, 0x8e7e1ab2, 0xa0320033,
|
||||
0x3100a433, 0x2bbf1cbf, 0x24d1a4bd, 0x7e000014, 0xa000b06c, 0x00a0b31a, 0x7eb43d1a, 0xb300b104,
|
||||
0xbf1200a0, 0x7eff001a, 0x3e00b63b, 0x00003371, 0x0149feff, 0xbf149990, 0x05dcd99f, 0x99bf0000,
|
||||
0xbf1200a0, 0x7eff001a, 0x3e00b63e, 0x00003371, 0x0149feff, 0xbf149990, 0x05dcd99f, 0x99bf0000,
|
||||
0xf9a60a32, 0x7e070bf4, 0xfb003a31, 0x0e090c25, 0xa43da9a0, 0x30f400f8, 0x05dcdfd8, 0x62f90000,
|
||||
0x30f4ffbf, 0x0149fef4, 0xa04c9990, 0xb2a93f9f, 0x01a398a6, 0x0d019033, 0x60489d33, 0x35a33e03,
|
||||
0x04301800, 0x1b010d33, 0x03329801, 0x3d043198, 0x10dc4ba4, 0xd501004c, 0x00000644, 0x0038327e,
|
||||
@@ -569,7 +569,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0x328908f4, 0xfbfa324f, 0xbf02f971, 0xbcb0b2b9, 0xb9a6b0c9, 0xe41708f4, 0xbcffffd9, 0xfba6f09b,
|
||||
0x980b08f4, 0xf9a60109, 0xf8050df4, 0xb2dc7202, 0x28d77eed, 0xb201fb00, 0x05ab98b9, 0xdeb2cfb2,
|
||||
0xfd729cb2, 0x0042a97e, 0xf0fc00f8, 0xf9fc30f4, 0xbf62f9f0, 0x08e1b0b9, 0xd4b2a5b2, 0xa630c9bc,
|
||||
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x010124bd, 0x763efc06, 0x02f80043,
|
||||
0x1d08f439, 0xa6f0d3bc, 0x1508f4f3, 0xa601b998, 0x0d0cf4f9, 0x24bd0101, 0x763efc06, 0x02f80043,
|
||||
0x853e0101, 0x42bc0043, 0x0096b192, 0x060df401, 0x90010049, 0x96ff0399, 0x0b947e04, 0xb23bb200,
|
||||
0xdd0c725a, 0x00001200, 0x7e3030bc, 0x320028d7, 0x00a433a1, 0x08b0b434, 0xb209c0b4, 0x1200da2d,
|
||||
0x20bc0000, 0x01004e20, 0x0021367e, 0x0a00a033, 0x853e02f8, 0x00da0043, 0xbd000012, 0x01004cb4,
|
||||
@@ -646,7 +646,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0x01b024a1, 0x08113001, 0x300c1130, 0x050d1c01, 0xda00c04e, 0x000005d0, 0x005d0a7e, 0x001404da,
|
||||
0x0c040b00, 0x59377e08, 0x00ad3300, 0x4d4c00f6, 0x00c3f171, 0x00d8db00, 0xa1300000, 0x00a13028,
|
||||
0x3010a130, 0xa13014a1, 0x20a13018, 0xb024a130, 0x11300101, 0x0c113008, 0x0d1c0130, 0x00804e09,
|
||||
0x0005d4da, 0x5d0a7e00, 0x1428da00, 0x040b0000, 0x377e080c, 0xad330059, 0x4c00a900, 0xc3f1b7c7,
|
||||
0x0005d4da, 0x5d0a7e00, 0x1428da00, 0x040b0000, 0x377e080c, 0xad330059, 0x4c00a900, 0xc3f1b7ca,
|
||||
0xb4db0000, 0x30000000, 0xa13028a1, 0x10a13000, 0x3014a130, 0xa13018a1, 0x24a13020, 0x300c1130,
|
||||
0x01b01c01, 0x08113001, 0xc04e0a0d, 0x05d8da00, 0x0a7e0000, 0x1cda005d, 0x0b000014, 0x7e080c04,
|
||||
0x33005937, 0x7e5c00a4, 0x7e005c97, 0x7e004db4, 0x7e005931, 0x7e000a74, 0x7e003cf7, 0x7e005249,
|
||||
@@ -662,7 +662,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0x3d071bf4, 0xc700f8a4, 0x96b024f9, 0x0b9cf002, 0x00f89a32, 0x0089050f, 0x9ff60180, 0xb8060f00,
|
||||
0x00010099, 0xf8009ff6, 0x02008900, 0x0099cf01, 0x1000008f, 0xf4049ffd, 0x34da181b, 0x7e008204,
|
||||
0xf0001a27, 0x1bf401a4, 0x0a02f809, 0x3d00f824, 0xd900f8a4, 0x00001430, 0x34da99bf, 0x98000014,
|
||||
0x95f90e99, 0x1e0a00f8, 0x00b99e7e, 0x0600a033, 0x00f802f8, 0x0100008f, 0xf6590049, 0x00f8009f,
|
||||
0x95f90e99, 0x1e0a00f8, 0x00b9a17e, 0x0600a033, 0x00f802f8, 0x0100008f, 0xf6590049, 0x00f8009f,
|
||||
0x00900089, 0xf00099ce, 0x0bf40194, 0xf1008e20, 0x00e9ce00, 0x9ffdef0f, 0x00e9f704, 0x5200eeb8,
|
||||
0x00e9ce02, 0xf7049ffd, 0x00f800e9, 0x7e0a004a, 0xe7001a27, 0xb30114aa, 0x4f1e06a4, 0xf9cf4f00,
|
||||
0xe899c700, 0x110f94b3, 0xf000f9cf, 0x9cf0ff94, 0xf89a320b, 0xf8a43d00, 0x8902f900, 0xce009000,
|
||||
@@ -859,7 +859,7 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0x4c99c700, 0x6a0090b3, 0xf60190b3, 0xde3e02f8, 0xf9cf0066, 0x4c99c700, 0x3a0090b3, 0xf60190b3,
|
||||
0xf23e02f8, 0x00d90066, 0xbf000014, 0x014bfe9a, 0xbb90080c, 0x006e7e14, 0x0149fe00, 0xbf1c9990,
|
||||
0x05dcd99f, 0x99bf0000, 0x0bf5f9a6, 0xe03e00ba, 0x00890067, 0x99cf01c2, 0x0608de00, 0x9fc70000,
|
||||
0x1899c710, 0x3516ef35, 0x063e15e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
|
||||
0x1899c710, 0x3515ef35, 0x063e14e9, 0xff900067, 0xc1008960, 0x009ff601, 0x0000f1df, 0x0099b880,
|
||||
0x9ff70201, 0x009fcf00, 0xf23e9fb2, 0x00890066, 0x99cf01c2, 0x009fe400, 0xff94f120, 0x00fdb33f,
|
||||
0xc13eff40, 0x448f0066, 0x0089066f, 0x9ff601c1, 0x00f1df00, 0x99b88000, 0xf7020100, 0x9fcf009f,
|
||||
0x3e9fb200, 0x890066a8, 0xcf01c200, 0x9fe40099, 0x94f12000, 0xfdb33fff, 0x3efec700, 0x8f006681,
|
||||
@@ -1347,17 +1347,17 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0xf4004096, 0x9631251d, 0x1cf4005a, 0x00d0331e, 0xffefc41b, 0xf404f9c4, 0xf9c4151b, 0x0294b30a,
|
||||
0x07a9180b, 0x08009033, 0x00f8060a, 0x00f8a4bd, 0x020f12f9, 0xa0b2b1b2, 0x2200a0b3, 0x94f0a93f,
|
||||
0x171bf408, 0x00a30f7e, 0x060010b3, 0x09181a20, 0x26060f08, 0x051bf4a9, 0xfab2f4bd, 0xa9b211fb,
|
||||
0xc0b3020a, 0x9abf1200, 0xb4b6cdb2, 0x00804c07, 0x00b75e7e, 0x30f400f8, 0x05dcdff8, 0x22f90000,
|
||||
0xc0b3020a, 0x9abf1200, 0xb4b6cdb2, 0x00804c07, 0x00b7617e, 0x30f400f8, 0x05dcdff8, 0x22f90000,
|
||||
0x49feffbf, 0x10999001, 0x9fa0a0b2, 0x00b3020a, 0x0abf3400, 0xb294943d, 0x0141fe07, 0x11902bb2,
|
||||
0x20010c0f, 0x7e1db219, 0xb300b775, 0x3f1700a4, 0xb20abf19, 0xf01db22b, 0x010cfd94, 0x5e7e1920,
|
||||
0x20010c0f, 0x7e1db219, 0xb300b778, 0x3f1700a4, 0xb20abf19, 0xf01db22b, 0x010cfd94, 0x617e1920,
|
||||
0x49fe00b7, 0x10999001, 0xdcd99fbf, 0xbf000005, 0xf4f9a699, 0x317e070b, 0x25fb003a, 0xf830f408,
|
||||
0x0005dcdf, 0xbf42f900, 0x0149feff, 0xb2189990, 0xb29fa0a1, 0xb2c0b2b4, 0x00a0b3d3, 0x00c0b356,
|
||||
0x07cf1852, 0x42fe94bd, 0x14229001, 0xa001ff10, 0x07cf3529, 0x0f7ecab2, 0x2bb200a3, 0xb2080a35,
|
||||
0xa7b17e1a, 0x00a4b300, 0xb22bbf2c, 0x7e1ab20c, 0xb300a43e, 0xb21e00a4, 0x7e4bb21a, 0xb300a456,
|
||||
0xb31200a4, 0xbf0e0030, 0x3e32a022, 0x0a00a531, 0x0149fe02, 0xbf189990, 0x05dcd99f, 0x99bf0000,
|
||||
0x0bf4f9a6, 0x3a317e07, 0x0845fb00, 0xc0b202f9, 0x2400a0b3, 0x2000c0b3, 0xb4b6aabf, 0x00804c07,
|
||||
0x757e0db2, 0xa4b300b7, 0x0ab21000, 0x00a32f7e, 0x00a5763e, 0x01fb020a, 0x1700a0b3, 0x1300c0b3,
|
||||
0xcdb2aabf, 0x0c07b4b6, 0xb7757e10, 0x0a00f800, 0xf900f802, 0xb2b3b242, 0x00a2b2c4, 0x00a0b302,
|
||||
0x787e0db2, 0xa4b300b7, 0x0ab21000, 0x00a32f7e, 0x00a5763e, 0x01fb020a, 0x1700a0b3, 0x1300c0b3,
|
||||
0xcdb2aabf, 0x0c07b4b6, 0xb7787e10, 0x0a00f800, 0xf900f802, 0xb2b3b242, 0x00a2b2c4, 0x00a0b302,
|
||||
0xa5e97e42, 0xb2030000, 0x00a0b3a1, 0xb23bb236, 0x7e1cb22a, 0xb200a54c, 0x00a4b3a0, 0xbd1ab21e,
|
||||
0xa4107eb4, 0xb3a0b200, 0xb31000a4, 0x180c0040, 0x94f00619, 0xb249a0ff, 0x7e1bb22a, 0xb200a60b,
|
||||
0xf841fb0a, 0xf800f800, 0x98aeb200, 0xa0b30eaa, 0xf4bd0a00, 0x00a6013e, 0xb30fea98, 0x0f0e00a0,
|
||||
@@ -1366,40 +1366,40 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0x32a0b222, 0x0ad2b2c1, 0x00b0b302, 0x400cb85e, 0xd4bd0001, 0xb304c998, 0x33440090, 0xb3080014,
|
||||
0x3f3c0390, 0x26b93fcf, 0x321bf4f9, 0x1801cf18, 0xf92601b9, 0x18271bf4, 0xbf1802ce, 0x90ddbc02,
|
||||
0xb6909dbc, 0x99b80394, 0xbc000140, 0xef269009, 0xa00b1bf4, 0x3ea4bd29, 0x9000a6a7, 0xcc9001dd,
|
||||
0x14d4b318, 0xfb040ab3, 0xb2abbf21, 0xa6f009ac, 0x0d0bf4b9, 0xb503aa98, 0x5b7e01cb, 0x00f800b6,
|
||||
0x14d4b318, 0xfb040ab3, 0xb2abbf21, 0xa6f009ac, 0x0d0bf4b9, 0xb503aa98, 0x5e7e01cb, 0x00f800b6,
|
||||
0xa1b232f9, 0x04bdb2b2, 0xef3ef003, 0x19bf00a6, 0xb2010090, 0xf493a61a, 0x030a090d, 0x00a6f63e,
|
||||
0x1bf493a6, 0x3e020a09, 0x7e00a6f6, 0xa600a6a9, 0xdd08f402, 0x31fba4bd, 0xdff830f4, 0x000005dc,
|
||||
0xffbf82f9, 0x900149fe, 0xa3b22899, 0xb8b29fa0, 0x8400a9b3, 0x00b0b300, 0x0147fe7f, 0xbd05a498,
|
||||
0xbd54bd24, 0x24779014, 0x00a7603e, 0xbd0c3a98, 0xb002bc94, 0x7cb279a0, 0x00b65b7e, 0xff0f79bf,
|
||||
0xbd54bd24, 0x24779014, 0x00a7603e, 0xbd0c3a98, 0xb002bc94, 0x7cb279a0, 0x00b65e7e, 0xff0f79bf,
|
||||
0x0bf49fa6, 0x3e643d09, 0x9000a74e, 0x00900155, 0xf404a601, 0x6033d908, 0x11900700, 0x2024bc01,
|
||||
0xa6033998, 0x0b18f429, 0x04bd0106, 0x00a7513e, 0x1ab24bb2, 0x0016fc7e, 0x0df45aa6, 0x01119006,
|
||||
0x3d063998, 0xf419a6f4, 0x010f050c, 0xa4bd8f20, 0x00a7963e, 0x49fe020a, 0x28999001, 0xdcd99fbf,
|
||||
0xbf000005, 0xf4f9a699, 0x317e070b, 0x85fb003a, 0xf030f408, 0x0005dcdf, 0xbf82f900, 0x0149feff,
|
||||
0xfe309990, 0x9fa00147, 0xb208a998, 0x09b1b0a6, 0x91b0f105, 0xb2843d0a, 0x2c779090, 0xbd036998,
|
||||
0xa67fa0f4, 0x0708f409, 0x010804bd, 0xa60a90b4, 0x351bf409, 0x32008033, 0x00a8593e, 0xbc0c6a98,
|
||||
0x7cb24010, 0x5b7e4bb2, 0x79bf00b6, 0x9fa6ff0f, 0x900f1bf4, 0xf1090122, 0x1bf439a6, 0x9043b205,
|
||||
0x2c3e0111, 0x24bd00a8, 0xf10314bd, 0xa6056998, 0xcb08f419, 0x1e0020b3, 0x18f429a6, 0x0860b50f,
|
||||
0x7cb24010, 0x5e7e4bb2, 0x79bf00b6, 0x9fa6ff0f, 0x900f1bf4, 0xf1090122, 0x1bf439a6, 0x9043b205,
|
||||
0x2c3e0111, 0x14bd00a8, 0x24bdf103, 0xa6056998, 0xcb08f419, 0x1e0020b3, 0x18f429a6, 0x0860b50f,
|
||||
0xa009f0b4, 0xa86a3ef3, 0xa6f10f00, 0x051bf45f, 0x09bc05b2, 0xa7dc3e00, 0x091a0a00, 0xf459a6f1,
|
||||
0x65b50d0b, 0x0990b408, 0xa4bd95a0, 0x900149fe, 0x9fbf3099, 0x0005dcd9, 0xa699bf00, 0x070bf4f9,
|
||||
0x003a317e, 0xf41085fb, 0xdcd9f830, 0xf9000005, 0xfe99bf82, 0xff90014f, 0xa0a3b228, 0xb2b4b2f9,
|
||||
0x00c033d0, 0x3ddab20e, 0x7e140cb4, 0xfe00b78c, 0x14bd0142, 0x08242290, 0x06ff07fe, 0x3efb05fc,
|
||||
0x9800a939, 0x94bd0c3a, 0xa0b014bc, 0x7e2cb229, 0xbf00b65b, 0xa6f00f29, 0x560df49f, 0x9fa6fd0f,
|
||||
0x00c033d0, 0x3ddab20e, 0x7e140cb4, 0xfe00b78f, 0x14bd0142, 0x08242290, 0x06ff07fe, 0x3efb05fc,
|
||||
0x9800a939, 0x94bd0c3a, 0xa0b014bc, 0x7e2cb229, 0xbf00b65e, 0xa6f00f29, 0x560df49f, 0x9fa6fd0f,
|
||||
0xa6110cf4, 0x3018f496, 0x1bf495a6, 0xa9083e45, 0xf498a600, 0x97a62f0b, 0x98371bf4, 0x99900109,
|
||||
0x0109b501, 0x00a9363e, 0x90040998, 0x09b50199, 0xa9363e04, 0x02099800, 0xb5019990, 0x363e0209,
|
||||
0x099800a9, 0x01999003, 0x3e0309b5, 0xbf00a936, 0x01999009, 0x119009a0, 0x05399801, 0x08f419a6,
|
||||
0x0149fe85, 0xbf289990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07, 0x0885fb00, 0xdff830f4,
|
||||
0x000005dc, 0xa1b222f9, 0xb2b2ffbf, 0xbf03aa98, 0x0149fe1b, 0xfe109990, 0x9fa00140, 0xb20c0090,
|
||||
0xb65b7e0c, 0x980cbf00, 0x2bb2031a, 0x00b6727e, 0x09011b98, 0xf4b9a6ff, 0x1998101b, 0x0212b504,
|
||||
0x3e0292b5, 0x9800a9b0, 0x2cb2031a, 0x00b6727e, 0xbf031a98, 0x7efd0c1b, 0xfe00b672, 0x99900149,
|
||||
0xb65e7e0c, 0x980cbf00, 0x2bb2031a, 0x00b6757e, 0x09011b98, 0xf4b9a6ff, 0x1998101b, 0x0212b504,
|
||||
0x3e0292b5, 0x9800a9b0, 0x2cb2031a, 0x00b6757e, 0xbf031a98, 0x7efd0c1b, 0xfe00b675, 0x99900149,
|
||||
0xbf12a010, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07, 0x0825fb00, 0xdfc830f4, 0x000005dc,
|
||||
0xffbf82f9, 0xfef830f4, 0x99900149, 0x929fa060, 0xae180499, 0xa0f4bd1c, 0x05a9989f, 0x050aa2b2,
|
||||
0x330b91b0, 0x021a00e9, 0x980c2b98, 0x4afe092c, 0x90f10001, 0x44fe44aa, 0x01a6b201, 0xb6877e20,
|
||||
0x330b91b0, 0x021a00e9, 0x980c2b98, 0x4afe092c, 0x90f10001, 0x44fe44aa, 0x01a6b201, 0xb68a7e20,
|
||||
0xb205b200, 0x304490a3, 0x00aa713e, 0xa6082998, 0x310bf439, 0x3bb22ab2, 0x4db2010c, 0x00a8877e,
|
||||
0xb3044998, 0x981f0094, 0x94b30349, 0x49981800, 0x0094b302, 0xa649bf3b, 0x0918f491, 0x643e30b2,
|
||||
0x19b200aa, 0xb20bb0b4, 0x7e6ab291, 0xb200b6a0, 0xf435a6a3, 0x030ab91b, 0x0bf503a6, 0x14b301a3,
|
||||
0x19b200aa, 0xb20bb0b4, 0x7e6ab291, 0xb200b6a3, 0xf435a6a3, 0x030ab91b, 0x0bf503a6, 0x14b301a3,
|
||||
0x03b20c00, 0x8e3e743d, 0x03b200aa, 0x38940107, 0xb254bd07, 0xab9a3e86, 0x0c2a9800, 0x53bce4bd,
|
||||
0x014cfe10, 0x9016e1b0, 0x1bb258cc, 0x00b65b7e, 0xf300adb3, 0x1690b400, 0x9fa6f00f, 0x00d80cf5,
|
||||
0x2ab294bd, 0x7e1591b0, 0xb200a5e9, 0x00a9b3a4, 0x2abf00d6, 0x804c6bb2, 0x7e4db200, 0xb200b775,
|
||||
0x014cfe10, 0x9016e1b0, 0x1bb258cc, 0x00b65e7e, 0xf300adb3, 0x1690b400, 0x9fa6f00f, 0x00d80cf5,
|
||||
0x2ab294bd, 0x7e1591b0, 0xb200a5e9, 0x00a9b3a4, 0x2abf00d6, 0x804c6bb2, 0x7e4db200, 0xb200b778,
|
||||
0x00adb3a0, 0x2ab200a7, 0x4cb21bb2, 0x90014dfe, 0xbd7e50dd, 0xa0b200a4, 0x9000adb3, 0x902ab200,
|
||||
0x010c014b, 0x90014dfe, 0x3f7e54dd, 0xa0b200a6, 0x7800a4b3, 0x9815b0b4, 0x4afe0c2c, 0x30aa9001,
|
||||
0x00a6277e, 0xa60c90b4, 0x1e1bf491, 0xfe14b0b4, 0xaa90014a, 0xa95c7e30, 0x1590b400, 0xb3059f98,
|
||||
@@ -1407,8 +1407,8 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0xf99800ab, 0x14e0b402, 0x1bf491a6, 0x02feb506, 0x91a6f9bf, 0xa0091bf4, 0xab883efe, 0x01f99800,
|
||||
0x1bf491a6, 0x01feb506, 0x2ab24bb2, 0x00a60b7e, 0x130004b3, 0x90015590, 0x29988066, 0xf559a605,
|
||||
0x33fefa08, 0x98460070, 0x8db2042f, 0x2ab2e4bd, 0x0b00f1b0, 0x0070dc02, 0x41fe0000, 0x5c119001,
|
||||
0x7e0111b0, 0x9800a5e3, 0x2abf042c, 0xfb048bb2, 0x00b7477e, 0x2c981ebf, 0xbda0b204, 0xb22ab2b4,
|
||||
0xa5e57e0d, 0x0004b300, 0xbdff0406, 0xac003e04, 0x0c2a9800, 0xb2b003bc, 0x0100904c, 0x00b6727e,
|
||||
0x7e0111b0, 0x9800a5e3, 0x2abf042c, 0xfb048bb2, 0x00b74a7e, 0x2c981ebf, 0xbda0b204, 0xb22ab2b4,
|
||||
0xa5e57e0d, 0x0004b300, 0xbdff0406, 0xac003e04, 0x0c2a9800, 0xb2b003bc, 0x0100904c, 0x00b6757e,
|
||||
0xa60b90b4, 0xec08f409, 0xbc032f98, 0x29b59039, 0xf49fa609, 0x94bd0808, 0xbd0929b5, 0x0149fea4,
|
||||
0xbf609990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07, 0x0830f400, 0xf43885fb, 0xdcd9cc30,
|
||||
0xf9000005, 0xf499bf82, 0x4ffef830, 0x5cff9001, 0xe1b0f9a0, 0xb2c8b20b, 0xb3a3b2d6, 0x028400b9,
|
||||
@@ -1416,18 +1416,18 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0xb3a0b200, 0x025e00ad, 0x68bc17bf, 0x017998f0, 0x08f59fa6, 0x7998024d, 0x0194b304, 0x3e05000a,
|
||||
0xb300aee1, 0x023e0069, 0x09027f98, 0xf5f9a6f0, 0xb2022a0b, 0xa5e97e3a, 0xb3a2b200, 0x021e00a9,
|
||||
0xb20c3c98, 0x0140fe7b, 0xb2340090, 0xa6277e0a, 0xb50ab200, 0x8bcc0570, 0xa6c07e70, 0xb3a0b200,
|
||||
0x01e900ad, 0x010d00b4, 0xf501a6f0, 0xf501ce0b, 0x3d01d00c, 0x00804cb4, 0x8c7e2ab2, 0x3abf00b7,
|
||||
0x4c070b94, 0x2db20080, 0x00b7757e, 0xb30ca1b0, 0x01b600ad, 0x18052918, 0x9476042f, 0xfff4f008,
|
||||
0x01e900ad, 0x010d00b4, 0xf501a6f0, 0xf501ce0b, 0x3d01d00c, 0x00804cb4, 0x8f7e2ab2, 0x3abf00b7,
|
||||
0x4c070b94, 0x2db20080, 0x00b7787e, 0xb30ca1b0, 0x01b600ad, 0x18052918, 0x9476042f, 0xfff4f008,
|
||||
0x09e59fff, 0xf5e966ff, 0xe401980b, 0xa6ffffe9, 0x8e08f589, 0xbcf4bd01, 0x9918902f, 0x009d3309,
|
||||
0xff900182, 0x07f4b301, 0xaefb3ef2, 0xf28e3c00, 0x08f59f26, 0xfdc4016d, 0xff94f0ff, 0xa6529dbc,
|
||||
0x050df456, 0xd99065b2, 0xbca43d10, 0xc43db029, 0xa63ee4bd, 0xd6b100ad, 0x0cf5006f, 0x10b40145,
|
||||
0x050df456, 0xd99065b2, 0xbce4bd10, 0xa43db029, 0xa63ec43d, 0xd6b100ad, 0x0cf5006f, 0x10b40145,
|
||||
0x98be3c0b, 0x26f81e3c, 0x170bf4f9, 0x39ff94f0, 0x9ffd0099, 0x00903304, 0x3c010a06, 0x010ce9bf,
|
||||
0x9001ee90, 0xe5a601dd, 0x33ce08f4, 0x00ed00c9, 0x94f0293f, 0x080bf408, 0xd000a933, 0xb294bd00,
|
||||
0x1491b03a, 0xb01391b0, 0x91301291, 0x014bfe5b, 0x7e5bbb90, 0xb200a6f8, 0x00adb3a0, 0x903400ef,
|
||||
0x0090335b, 0x7e3ab211, 0xb200a9d8, 0x00adb3a0, 0x00b400db, 0x1140b40d, 0x90014ffe, 0x2eb250ff,
|
||||
0xb0070d94, 0x804101f1, 0x0b3ab200, 0xb04cb201, 0xe37e0011, 0x0bb200a5, 0x3ab22cb2, 0x90014dfe,
|
||||
0xbd7e4cdd, 0xe0b400a4, 0xb2a0b214, 0xbd3ab21c, 0x7e0db2b4, 0xb300a5e5, 0x0091000d, 0xfe13b0b4,
|
||||
0xaa90014a, 0xa95c7e34, 0x0c3a9800, 0xfe0db0b4, 0xcc90014c, 0xb65b7e48, 0xb3a0b200, 0xb46d00a4,
|
||||
0xaa90014a, 0xa95c7e34, 0x0c3a9800, 0xfe0db0b4, 0xcc90014c, 0xb65e7e48, 0xb3a0b200, 0xb46d00a4,
|
||||
0xf0011290, 0x1bf491a6, 0x014e9832, 0xb370efcd, 0x0f0600f4, 0x06291870, 0xbcff94f0, 0x9fbb909e,
|
||||
0x0149b502, 0x00ae983e, 0x3ab20bb2, 0x3e7e2cb2, 0xa0b200a4, 0x3400a4b3, 0xfe0265bb, 0xaa90014a,
|
||||
0xa6a97e34, 0x0060b300, 0x0b90b420, 0xbc8085bc, 0x91b09095, 0xace43e0b, 0x3e020000, 0x0000aec8,
|
||||
@@ -1440,88 +1440,88 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0x00a6277e, 0x2bcc0ab2, 0xa6c07e70, 0xb3a8b200, 0x00ad00ad, 0xfe7021cd, 0x80420147, 0x44779000,
|
||||
0x00b0373e, 0xbd0c00b4, 0x0979a094, 0xf409a6f0, 0x0200091b, 0x00b03e3e, 0x09a6f009, 0x00090df4,
|
||||
0xb03e3e03, 0x0bc0b400, 0xbd0704b6, 0xb20db2e4, 0xb0b4bd5a, 0x71b00021, 0xa5e37e01, 0xb25abf00,
|
||||
0xb22cb20b, 0xb7757e3d, 0xb27ebf00, 0xb23bb2a0, 0xb22cb25a, 0xa5e57e0d, 0x0004b300, 0xbd3ab245,
|
||||
0xb22cb20b, 0xb7787e3d, 0xb27ebf00, 0xb23bb2a0, 0xb22cb25a, 0xa5e57e0d, 0x0004b300, 0xbd3ab245,
|
||||
0xa4107eb4, 0xb3a0b200, 0x003700a4, 0x0201bb70, 0x0df404a6, 0x9040b205, 0x6ab2101b, 0xb2b03bbc,
|
||||
0xb7957e0c, 0x014afe00, 0x900240bb, 0x60bc30aa, 0xa6a97e60, 0xb314bd00, 0xff6d004d, 0x5ab280b2,
|
||||
0xb7987e0c, 0x014afe00, 0x900240bb, 0x60bc30aa, 0xa6a97e60, 0xb314bd00, 0xff6d004d, 0x5ab280b2,
|
||||
0x0b7e3bb2, 0x4c3e00a6, 0x020000b0, 0x900149fe, 0x9fbf4c99, 0x0005dcd9, 0xb299bf00, 0xf4f9a60a,
|
||||
0x317e070b, 0x30f4003a, 0x2485fb08, 0xd9f830f4, 0x000005dc, 0x99bf32f9, 0x90014ffe, 0xa1b214ff,
|
||||
0x94bdf9a0, 0xc3b2b2b2, 0x4b0140fe, 0x00900320, 0xb209a010, 0xb79b7e0a, 0xb309bf00, 0xb34c0090,
|
||||
0x94bdf9a0, 0xc3b2b2b2, 0x4b0140fe, 0x00900320, 0xb209a010, 0xb79e7e0a, 0xb309bf00, 0xb34c0090,
|
||||
0xa04800a4, 0xb509bf91, 0x0fbf0192, 0xb5100049, 0x0fbf04f9, 0xf9b52009, 0xb509bf05, 0x0fbf0693,
|
||||
0xf9350109, 0x3509bf1c, 0x0fbf2c9a, 0xf9b5f009, 0x900fbf0a, 0xf9b540f9, 0x900fbf0e, 0xf9b5c0f9,
|
||||
0x3e0abf0f, 0xbd00b0e9, 0x0149fea4, 0xbf149990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6, 0x3a317e07,
|
||||
0x0835fb00, 0xdfd030f4, 0x000005dc, 0xffbf82f9, 0x900149fe, 0xa3b25099, 0x02059fa0, 0xf800a9b3,
|
||||
0x00b63004, 0x350b9cf0, 0x94bd2ca9, 0x7e0ca9b5, 0xb200a5e9, 0xbd3abfa0, 0x00804cb4, 0x757e0db2,
|
||||
0xa5b200b7, 0xae00adb3, 0x33093f04, 0x049f4a9d, 0x33010918, 0x0497469d, 0x33020918, 0x048f469d,
|
||||
0x33030918, 0x0487539d, 0x18040e18, 0x0f180509, 0x070d1806, 0xf0ffe4f0, 0xf4f0ff94, 0x0894b6ff,
|
||||
0xfd10f4b6, 0xd4b6059e, 0x05f9fd18, 0xf505dffd, 0x05045b0b, 0x03d6b005, 0x045a0cf5, 0xb3013db5,
|
||||
0x0835fb00, 0xdfd030f4, 0x000005dc, 0xffbf82f9, 0x900149fe, 0xa3b25099, 0x02059fa0, 0xfb00a9b3,
|
||||
0x00b63004, 0x350b9cf0, 0x94bd2ca9, 0x7e0ca9b5, 0xb200a5e9, 0xbd3abfa0, 0x00804cb4, 0x787e0db2,
|
||||
0xa5b200b7, 0xb100adb3, 0x33093f04, 0x04a24a9d, 0x33010918, 0x049a469d, 0x33020918, 0x0492469d,
|
||||
0x33030918, 0x048a539d, 0x18040e18, 0x0f180509, 0x070d1806, 0xf0ffe4f0, 0xf4f0ff94, 0x0894b6ff,
|
||||
0xfd10f4b6, 0xd4b6059e, 0x05f9fd18, 0xf505dffd, 0x05045e0b, 0x03d6b005, 0x045d0cf5, 0xb3013db5,
|
||||
0x490e01d4, 0x39b55000, 0xb1d73e02, 0x080d1800, 0x18090918, 0x0e180a0f, 0xffd4f00b, 0xf0ff94f0,
|
||||
0x94b6fff4, 0x10f4b608, 0xb6059dfd, 0xf9fd18e4, 0x05effd05, 0xb2023eb5, 0x7e0bb23a, 0x9800a60b,
|
||||
0xff09023a, 0xa9a60305, 0x04080bf5, 0x9007a5b6, 0x3ab5303b, 0xb6ce7e03, 0xb3a5b200, 0x03f500ad,
|
||||
0x09033b98, 0x343a90c0, 0xfd3fbb90, 0xb5b604b9, 0xb79b7e03, 0xb3a5b200, 0x03d900ad, 0xfe0147fe,
|
||||
0x77900148, 0x9044bd40, 0x88900179, 0x0991b03c, 0x00b3443e, 0x8ea0e4bd, 0x0f0044b3, 0xbd0c3a98,
|
||||
0x3efe0cb4, 0xb200b267, 0xb24bb23a, 0xa5787e7c, 0xb3a5b200, 0x039d00ad, 0x94f0793f, 0x120bf401,
|
||||
0xb20c3a98, 0x7eff0c4b, 0x3e00b672, 0xb200b341, 0xa32f7e7a, 0x00a0b300, 0x0c3a980f, 0xfd0c4bb2,
|
||||
0x00b2673e, 0x94f0793f, 0x0e1bf402, 0xb20c3a98, 0x3efd0c4b, 0xb400b336, 0x3ab209b0, 0x8db2010c,
|
||||
0x00a63f7e, 0x5d00a0b3, 0x3fb2793f, 0x99c724bd, 0x01999002, 0x980a91b0, 0x54b354f5, 0xb0b43900,
|
||||
0x0022bc09, 0x02bc030c, 0x0304b600, 0x014001b8, 0x1031bc00, 0x957e1ab2, 0x30bc00b7, 0x4309b800,
|
||||
0x95200001, 0xb45302b5, 0x0fb50af0, 0x3e81a054, 0x9000b301, 0xff900122, 0x1424b318, 0xb62e3ebe,
|
||||
0x3f8ebf00, 0x027f5879, 0x98077d18, 0x3a9803ee, 0x0299c70d, 0xcc00f3f0, 0x96cb70ff, 0xcb4bb21f,
|
||||
0x010cd8e6, 0xebf0d6cb, 0x7e01e0f6, 0x9800a2e5, 0x4bb20c3a, 0x727e6cb2, 0xa5b200b6, 0xb400adb3,
|
||||
0x01449002, 0xa6033b98, 0xeb08f54b, 0xbc94bdfe, 0x89a0b0bb, 0xb17e8ab2, 0xa5b200b7, 0x9400adb3,
|
||||
0xbd37b202, 0x547f9884, 0xbc9088bc, 0x94b69098, 0x4099b803, 0x39bc0001, 0x0b91b090, 0x5300f9b3,
|
||||
0x033c9802, 0x3d0fa0b4, 0xbc24bdb4, 0x44bdc0cc, 0x00b78c7e, 0x3e0f60b4, 0x9800b45f, 0x2bb20d3a,
|
||||
0x7e0c41b0, 0x3300a2f5, 0x00b500a9, 0xfe0c3a98, 0x2bb2014c, 0x7e38cc90, 0xb300b65b, 0x020c00ad,
|
||||
0xb40be0b4, 0xef980e90, 0xd899c703, 0x1bf59fa6, 0x3a98008e, 0x0c2bb20d, 0xa2ed7e01, 0x014cfe00,
|
||||
0x2bb23ab2, 0x7e30cc90, 0xb300a593, 0x981306a4, 0x2bb20c3a, 0x727efd0c, 0x5c3e00b6, 0xadb300b4,
|
||||
0x7401cb00, 0x93f01c90, 0x9099bc00, 0x7f0069bc, 0xff19e401, 0x091bf4ff, 0x5c3e0260, 0x3a9800b4,
|
||||
0x014cfe0c, 0xffff1be4, 0x7e34cc90, 0xb300b65b, 0x019800ad, 0x343af034, 0xf9263690, 0x60100df4,
|
||||
0xff1be402, 0x0c3a98ff, 0x00b4513e, 0xb20c3a98, 0x7efd0c2b, 0xb300b672, 0x017000ad, 0x98012290,
|
||||
0x2aa6033a, 0xff3708f5, 0x6eb264b2, 0xd43db43d, 0xc4bdf4bd, 0x00b4933e, 0x9473e97f, 0x010d0a00,
|
||||
0x00b48d3e, 0x0600d033, 0xcc90010b, 0x01ff9001, 0xa602ee90, 0xe308f4fa, 0x0b00c4b3, 0x3e547cb5,
|
||||
0x3300b5cf, 0x00a600b9, 0xb0013998, 0x0cf40296, 0xb2030930, 0x5479b56d, 0xf4bde4bd, 0x00b4d23e,
|
||||
0x9073d97f, 0x697c0a00, 0x01ee90e9, 0x9001ff90, 0x399802dd, 0xf4f9a603, 0x493ee908, 0x94bd00b5,
|
||||
0x79b5f101, 0xb224bd54, 0xb5233e1b, 0xe4407f00, 0xf4ffff09, 0xf10f260b, 0x1bf4bfa6, 0xff0be40b,
|
||||
0xb51b3eff, 0x0c3a9800, 0xffff0ce4, 0x00b6727e, 0xb900adb3, 0xff0be400, 0x9019b2ff, 0x44900122,
|
||||
0x9891b202, 0x29a60339, 0x09c508f4, 0xf5b9a6f1, 0x9800a00b, 0x3c980c3a, 0xb6727e0a, 0x00adb300,
|
||||
0x31b5008c, 0xb5cf3e0a, 0xbd6f7f00, 0x01c19294, 0xf05179b5, 0x04bd00f3, 0x3e527fb5, 0x7f00b587,
|
||||
0x014c584b, 0x900c3a98, 0xb3f00100, 0x00c3f000, 0x7e024490, 0xb300b672, 0xb45200a4, 0xe9980be0,
|
||||
0x70999001, 0xa601e9b5, 0xd608f401, 0x9808607c, 0xf00c0c3a, 0xffff0be4, 0x00b6727e, 0x2d00a4b3,
|
||||
0xe4014cfe, 0xb2ffff0b, 0x40cc903a, 0x00a5787e, 0x1900a4b3, 0x98469034, 0x94f0517f, 0xf0f9bcff,
|
||||
0x3e517fb5, 0x0a00b5cf, 0x3ea5b203, 0x9000b5da, 0x77900188, 0x148db318, 0x49fefd90, 0x3c999001,
|
||||
0x457e9abf, 0xf03e00b7, 0x030500b5, 0x00b5f23e, 0x0bb204bd, 0x0b7e3ab2, 0x50b300a6, 0x3a981a00,
|
||||
0x7e04bd0c, 0x9800b6c4, 0x30b50d3a, 0xb7457e0c, 0x0d30b500, 0x900149fe, 0x9fbf5099, 0x0005dcd9,
|
||||
0xb299bf00, 0xf4f9a65a, 0x343e110b, 0x010500b6, 0x00b5f03e, 0x003a317e, 0xf93085fb, 0x7ea0b202,
|
||||
0x9800a5e7, 0xc47e0c0a, 0x0a9800b6, 0xb7457e0d, 0x7e0ab200, 0xbd00b745, 0xbf01fba4, 0x0aafb2a9,
|
||||
0xf4b9a602, 0xb9900d18, 0x98f9bc01, 0xc9a0a4bd, 0xa9bf00f8, 0x020aafb2, 0x18f4b9a6, 0x01b9900b,
|
||||
0xfcbca4bd, 0xbf00f899, 0xb2afb2b9, 0xf4c9a6ca, 0xf10a0708, 0xfbb500f8, 0xb5fca002, 0x00f801fc,
|
||||
0xaf98a9bf, 0x90b9bc02, 0xfbbfa9a0, 0x08f49ba6, 0x029bbb08, 0xa998a9a0, 0xa6aabf01, 0x051bf4a9,
|
||||
0x00f8f10a, 0x0800a0b3, 0x00b7457e, 0x30f400f8, 0x05dcdff8, 0x32f90000, 0x49feffbf, 0x14999001,
|
||||
0x9fa0a0b2, 0xa0b3b3b2, 0xfd024200, 0x0cf4a2a6, 0x01ab903a, 0xb60141fe, 0x119002b4, 0x7e1ab210,
|
||||
0xb300b7b1, 0xbf2700a4, 0xb21db219, 0xa0e4bd2c, 0x90dfbf90, 0x9eb201e9, 0xa699fcbc, 0xf408f490,
|
||||
0x3da0ddbf, 0x00b72a3e, 0x49fe020a, 0x14999001, 0xdcd99fbf, 0xbf000005, 0xf4f9a699, 0x317e070b,
|
||||
0x35fb003a, 0xda00f808, 0x00002944, 0x0041c77e, 0xf000a630, 0xa6f00bac, 0x01aab901, 0x44da00f8,
|
||||
0x7e000029, 0x30004142, 0xacf000a6, 0x01a6f00b, 0xf801aab9, 0x2944da00, 0xd77e0000, 0xa6300042,
|
||||
0x0bacf000, 0xb901a6f0, 0x00f801aa, 0x7effb4f0, 0xf8000b94, 0x0b7e7e00, 0xf900f800, 0x3da0b202,
|
||||
0x384c7ea4, 0x00a6b000, 0xa00b9cf0, 0xfb9ab20a, 0xb202f901, 0x7ea43da0, 0xb000382a, 0x9cf000a6,
|
||||
0xb20aa00b, 0xf401fb9a, 0xdcdfe430, 0xf9000005, 0xfeffbf82, 0x45fe0149, 0x3c999001, 0xa00147fe,
|
||||
0x2455909f, 0xd9347790, 0x0000141c, 0x4bfe9abf, 0x90080c01, 0xff0d2cbb, 0x0000c17e, 0xeb00a433,
|
||||
0x3f0c30b4, 0x0c943339, 0x043118e2, 0x0f001033, 0xb0011933, 0x3e043d00, 0x9800b96d, 0x2cd9023f,
|
||||
0x98000014, 0x34580431, 0x3f5fa00a, 0x0339989f, 0xb5183690, 0xff090159, 0xf43379a0, 0xf77e1800,
|
||||
0xa0320032, 0x2900ad33, 0xdf010901, 0x0000142c, 0x1272f920, 0xbd0043f0, 0xb8ad3e14, 0x0241bc00,
|
||||
0x010006b1, 0x40060df4, 0x947e0100, 0x24d9000b, 0xbf000014, 0xff2ce49a, 0xb26bb2ff, 0x1300de0d,
|
||||
0x117e0000, 0x7aa000af, 0xd400adb3, 0x985bbf00, 0x1d90015c, 0x7c0eb204, 0x10bc2020, 0x1300da10,
|
||||
0x367e0000, 0xa0320021, 0xc500ad33, 0x4cb4bd00, 0x00da0100, 0xa6000013, 0xa408f414, 0x00b95c3e,
|
||||
0xd9023f98, 0x0000142c, 0x58043498, 0x5fa00a32, 0x39989f3f, 0x18389003, 0x090159b5, 0x3379a0ff,
|
||||
0x7e1600f4, 0x320032f7, 0x00ad33a0, 0x2cdf0084, 0x20000014, 0xff26e4f1, 0x3e24bdff, 0xbc00b94d,
|
||||
0x16b11262, 0x0df40100, 0x01004106, 0x000b947e, 0x5c985bbf, 0x042d9001, 0x00da1eb2, 0x7e000013,
|
||||
0xe40020d0, 0xbcffff4c, 0xa0322021, 0x1db28bb2, 0x001300de, 0x40417c00, 0x3500a433, 0x001424d9,
|
||||
0x7e9abf00, 0xa000ac3b, 0x00a4b37a, 0x4cb4bd13, 0x00da0100, 0xa6000013, 0xa608f426, 0x5c985bbf,
|
||||
0xbd7ab201, 0x7e040ed4, 0x32002136, 0x2db034a0, 0x817e3ab2, 0x0d33000f, 0x30fe7100, 0x020f3a01,
|
||||
0x1838f130, 0x04090333, 0x30014afe, 0x31303991, 0x90b4bd3b, 0x717e38aa, 0xe73e000f, 0x02f900b7,
|
||||
0x002930d9, 0xbfa0b200, 0x7e640b9a, 0x090000de, 0x00a43310, 0xa6008961, 0x009fcf02, 0x1000f5f1,
|
||||
0x8a009ff6, 0x4b02a600, 0xc4bd1000, 0xbd27104d, 0x198b7ee4, 0x00a43300, 0x2930d915, 0x9abf0000,
|
||||
0x00009b7e, 0x123e0409, 0x0ab200ba, 0x7e03e84b, 0x890016fc, 0xb802a400, 0x000200aa, 0x920aa5b6,
|
||||
0x9af601aa, 0x01114f00, 0x020099b8, 0x009ff600, 0x9a32943d, 0x000001fb, 0x00000000, 0x00000000,
|
||||
0xff09023a, 0x1bf4a9a6, 0x3e04bd09, 0xb600b5ed, 0x3b9007a5, 0x033ab530, 0x00b6d17e, 0xadb3a5b2,
|
||||
0x9803f500, 0xc009033b, 0x90343a90, 0xb9fd3fbb, 0x03b5b604, 0x00b79e7e, 0xadb3a5b2, 0xfe03d900,
|
||||
0x48fe0147, 0x40779001, 0x799044bd, 0x3c889001, 0x3e0991b0, 0xbd00b347, 0xb38ea0e4, 0x980f0044,
|
||||
0xb4bd0c3a, 0x6a3efe0c, 0x3ab200b2, 0x7cb24bb2, 0x00a5787e, 0xadb3a5b2, 0x3f039d00, 0x0194f079,
|
||||
0x98120bf4, 0x4bb20c3a, 0x757eff0c, 0x443e00b6, 0x7ab200b3, 0x00a32f7e, 0x0f00a0b3, 0xb20c3a98,
|
||||
0x3efd0c4b, 0x3f00b26a, 0x0294f079, 0x980e1bf4, 0x4bb20c3a, 0x393efd0c, 0xb0b400b3, 0x0c3ab209,
|
||||
0x7e8db201, 0xb300a63f, 0x3f5d00a0, 0xbd3fb279, 0x0299c724, 0xb0019990, 0xf5980a91, 0x0054b354,
|
||||
0x09b0b439, 0x0c0022bc, 0x0002bc03, 0xb80304b6, 0x00014001, 0xb21031bc, 0xb7987e1a, 0x0030bc00,
|
||||
0x014309b8, 0xb5952000, 0xf0b45302, 0x540fb50a, 0x043e81a0, 0x229000b3, 0x18ff9001, 0xbe1424b3,
|
||||
0x00b6313e, 0x793f8ebf, 0x18027f58, 0xee98077d, 0x0d3a9803, 0xf00299c7, 0xffcc00f3, 0x1f96cb70,
|
||||
0xe6cb4bb2, 0xcb010cd8, 0xf6ebf0d6, 0xe57e01e0, 0x3a9800a2, 0xb24bb20c, 0xb6757e6c, 0xb3a5b200,
|
||||
0x02b400ad, 0x98014490, 0x4ba6033b, 0xfeeb08f5, 0xbbbc94bd, 0xb289a0b0, 0xb7b47e8a, 0xb3a5b200,
|
||||
0x029400ad, 0x84bd37b2, 0xbc547f98, 0x98bc9088, 0x0394b690, 0x014099b8, 0x9039bc00, 0xb30b91b0,
|
||||
0x025300f9, 0xb4033c98, 0xb43d0fa0, 0xccbc24bd, 0x7e44bdc0, 0xb400b78f, 0x623e0f60, 0x3a9800b4,
|
||||
0xb02bb20d, 0xf57e0c41, 0xa93300a2, 0x9800b500, 0x4cfe0c3a, 0x902bb201, 0x5e7e38cc, 0xadb300b6,
|
||||
0xb4020c00, 0x90b40be0, 0x03ef980e, 0xa6d899c7, 0x8e1bf59f, 0x0d3a9800, 0x010c2bb2, 0x00a2ed7e,
|
||||
0xb2014cfe, 0x902bb23a, 0x937e30cc, 0xa4b300a5, 0x3a981306, 0x0c2bb20c, 0xb6757efd, 0xb45f3e00,
|
||||
0x00adb300, 0x907401cb, 0x0093f01c, 0xbc9099bc, 0x017f0069, 0xffff19e4, 0x60091bf4, 0xb45f3e02,
|
||||
0x0c3a9800, 0xe4014cfe, 0x90ffff1b, 0x5e7e34cc, 0xadb300b6, 0x34019800, 0x90343af0, 0xf4f92636,
|
||||
0x0260100d, 0xffff1be4, 0x3e0c3a98, 0x9800b454, 0x2bb20c3a, 0x757efd0c, 0xadb300b6, 0x90017000,
|
||||
0x3a980122, 0xf52aa603, 0xb2ff3708, 0x3d6eb264, 0xbdd43db4, 0x3ec4bdf4, 0x7f00b496, 0x009473e9,
|
||||
0x3e010d0a, 0x3300b490, 0x0b0600d0, 0x01cc9001, 0x9001ff90, 0xfaa602ee, 0xb3e308f4, 0xb50b00c4,
|
||||
0xd23e547c, 0xb93300b5, 0x9800a600, 0x96b00139, 0x300cf402, 0x6db20309, 0xbd5479b5, 0x3ef4bde4,
|
||||
0x7f00b4d5, 0x009073d9, 0xe9697c0a, 0x9001ee90, 0xdd9001ff, 0x03399802, 0x08f4f9a6, 0xb54c3ee9,
|
||||
0x0194bd00, 0x5479b5f1, 0x1bb224bd, 0x00b5263e, 0x09e4407f, 0x0bf4ffff, 0xa6f10f26, 0x0b1bf4bf,
|
||||
0xffff0be4, 0x00b51e3e, 0xe40c3a98, 0x7effff0c, 0xb300b675, 0x00b900ad, 0xffff0be4, 0x229019b2,
|
||||
0x02449001, 0x399891b2, 0xf429a603, 0xf109c508, 0x0bf5b9a6, 0x3a9800a0, 0x0a3c980c, 0x00b6757e,
|
||||
0x8c00adb3, 0x0a31b500, 0x00b5d23e, 0x94bd6f7f, 0xb501c192, 0xf3f05179, 0xb504bd00, 0x8a3e527f,
|
||||
0x4b7f00b5, 0x98014c58, 0x00900c3a, 0x00b3f001, 0x9000c3f0, 0x757e0244, 0xa4b300b6, 0xe0b45200,
|
||||
0x01e9980b, 0xb5709990, 0x01a601e9, 0x7cd608f4, 0x3a980860, 0xe4f00c0c, 0x7effff0b, 0xb300b675,
|
||||
0xfe2d00a4, 0x0be4014c, 0x3ab2ffff, 0x7e40cc90, 0xb300a578, 0x341900a4, 0x7f984690, 0xff94f051,
|
||||
0xb5f0f9bc, 0xd23e517f, 0x030a00b5, 0xdd3ea5b2, 0x889000b5, 0x18779001, 0x90148db3, 0x0149fefd,
|
||||
0xbf3c9990, 0xb7487e9a, 0xb5f33e00, 0x3e030500, 0xbd00b5f5, 0xb20bb204, 0xa60b7e3a, 0x0050b300,
|
||||
0x0c3a981a, 0xc77e04bd, 0x3a9800b6, 0x0c30b50d, 0x00b7487e, 0xfe0d30b5, 0x99900149, 0xd99fbf50,
|
||||
0x000005dc, 0x5ab299bf, 0x0bf4f9a6, 0xb6373e11, 0x3e010500, 0x7e00b5f3, 0xfb003a31, 0x02f93085,
|
||||
0xe77ea0b2, 0x0a9800a5, 0xb6c77e0c, 0x0d0a9800, 0x00b7487e, 0x487e0ab2, 0xa4bd00b7, 0xa9bf01fb,
|
||||
0x020aafb2, 0x18f4b9a6, 0x01b9900d, 0xbd98f9bc, 0xf8c9a0a4, 0xb2a9bf00, 0xa6020aaf, 0x0b18f4b9,
|
||||
0xbd01b990, 0x99fcbca4, 0xb9bf00f8, 0xcab2afb2, 0x08f4c9a6, 0xf8f10a07, 0x02fbb500, 0xfcb5fca0,
|
||||
0xbf00f801, 0x02af98a9, 0xa090b9bc, 0xa6fbbfa9, 0x0808f49b, 0xa0029bbb, 0x01a998a9, 0xa9a6aabf,
|
||||
0x0a051bf4, 0xb300f8f1, 0x7e0800a0, 0xf800b748, 0xf830f400, 0x0005dcdf, 0xbf32f900, 0x0149feff,
|
||||
0xb2149990, 0xb29fa0a0, 0x00a0b3b3, 0xa6fd0242, 0x3a0cf4a2, 0xfe01ab90, 0xb4b60141, 0x10119002,
|
||||
0xb47e1ab2, 0xa4b300b7, 0x19bf2700, 0x2cb21db2, 0x90a0e4bd, 0xe990dfbf, 0xbc9eb201, 0x90a699fc,
|
||||
0xbff408f4, 0x3e3da0dd, 0x0a00b72d, 0x0149fe02, 0xbf149990, 0x05dcd99f, 0x99bf0000, 0x0bf4f9a6,
|
||||
0x3a317e07, 0x0835fb00, 0x44da00f8, 0x7e000029, 0x300041c7, 0xacf000a6, 0x01a6f00b, 0xf801aab9,
|
||||
0x2944da00, 0x427e0000, 0xa6300041, 0x0bacf000, 0xb901a6f0, 0x00f801aa, 0x002944da, 0x42d77e00,
|
||||
0x00a63000, 0xf00bacf0, 0xaab901a6, 0xf000f801, 0x947effb4, 0x00f8000b, 0x000b7e7e, 0x02f900f8,
|
||||
0xa43da0b2, 0x00384c7e, 0xf000a6b0, 0x0aa00b9c, 0x01fb9ab2, 0xa0b202f9, 0x2a7ea43d, 0xa6b00038,
|
||||
0x0b9cf000, 0x9ab20aa0, 0x30f401fb, 0x05dcdfe4, 0x82f90000, 0x49feffbf, 0x0145fe01, 0xfe3c9990,
|
||||
0x9fa00147, 0x90245590, 0x1cd93477, 0xbf000014, 0x014bfe9a, 0xbb90080c, 0x7eff0d2c, 0x330000c1,
|
||||
0xb4eb00a4, 0x393f0c30, 0xe20c9433, 0x33043118, 0x330f0010, 0x00b00119, 0x703e043d, 0x3f9800b9,
|
||||
0x142cd902, 0x31980000, 0x0a345804, 0x9f3f5fa0, 0x90033998, 0x59b51836, 0xa0ff0901, 0x00f43379,
|
||||
0x32f77e18, 0x33a03200, 0x012900ad, 0x2cdf0109, 0x20000014, 0xf01272f9, 0x14bd0043, 0x00b8b03e,
|
||||
0xb10241bc, 0xf4010006, 0x0040060d, 0x0b947e01, 0x1424d900, 0x9abf0000, 0xffff2ce4, 0x0db26bb2,
|
||||
0x001300de, 0xaf117e00, 0xb37aa000, 0x00d400ad, 0x5c985bbf, 0x041d9001, 0x207c0eb2, 0x1010bc20,
|
||||
0x001300da, 0x21367e00, 0x33a03200, 0x00c500ad, 0x004cb4bd, 0x1300da01, 0x14a60000, 0x3ea408f4,
|
||||
0x9800b95f, 0x2cd9023f, 0x98000014, 0x32580434, 0x3f5fa00a, 0x0339989f, 0xb5183890, 0xff090159,
|
||||
0xf43379a0, 0xf77e1600, 0xa0320032, 0x8400ad33, 0x142cdf00, 0xf1200000, 0xffff26e4, 0x503e24bd,
|
||||
0x62bc00b9, 0x0016b112, 0x060df401, 0x7e010041, 0xbf000b94, 0x015c985b, 0xb2042d90, 0x1300da1e,
|
||||
0xd07e0000, 0x4ce40020, 0x21bcffff, 0xb2a03220, 0xde1db28b, 0x00001300, 0x3340417c, 0xd93500a4,
|
||||
0x00001424, 0x3b7e9abf, 0x7aa000ac, 0x1300a4b3, 0x004cb4bd, 0x1300da01, 0x26a60000, 0xbfa608f4,
|
||||
0x015c985b, 0xd4bd7ab2, 0x367e040e, 0xa0320021, 0xb22db034, 0x0f817e3a, 0x000d3300, 0x0130fe71,
|
||||
0x30020f3a, 0x331838f1, 0xfe040903, 0x9130014a, 0x3b313039, 0xaa90b4bd, 0x0f717e38, 0xb7ea3e00,
|
||||
0xd902f900, 0x00002930, 0x9abfa0b2, 0xde7e640b, 0x10090000, 0x6100a433, 0x02a60089, 0xf1009fcf,
|
||||
0xf61000f5, 0x008a009f, 0x004b02a6, 0x4dc4bd10, 0xe4bd2710, 0x00198b7e, 0x1500a433, 0x002930d9,
|
||||
0x7e9abf00, 0x0900009b, 0xba153e04, 0x4b0ab200, 0xfc7e03e8, 0x00890016, 0xaab802a4, 0xb6000200,
|
||||
0xaa920aa5, 0x009af601, 0xb801114f, 0x00020099, 0x3d009ff6, 0xfb9a3294, 0x00000001, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
@@ -2269,8 +2269,8 @@ const NvU32 soe_ucode_data_lr10_prd[] = {
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0xb22438cf, 0xcfd90bc8, 0xf23ebc55, 0x2e5c0e40,
|
||||
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0x0d4a5d7d, 0x9c31ffb3, 0x95bc604f, 0x40cc834d,
|
||||
0xb32dc4cc, 0x58018cca, 0x7c52cad0, 0x4a5277fe, 0x1289f13d, 0xdc6acca2, 0x50be285c, 0xd086f67e,
|
||||
0x705ea2e7, 0x0577e70f, 0xcf75f41f, 0xfe6e071a, 0xc901a2e3, 0xd0a96e16, 0x4a0da134, 0xc2405c59,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
|
||||
@@ -32,7 +32,188 @@ nvswitch_inforom_nvlink_flush
|
||||
struct nvswitch_device *device
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
NvlStatus status = NVL_SUCCESS;
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
PINFOROM_NVLINK_STATE pNvlinkState;
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
|
||||
if (pNvlinkState != NULL && pNvlinkState->bDirty)
|
||||
{
|
||||
status = nvswitch_inforom_write_object(device, "NVL",
|
||||
pNvlinkState->pFmt, pNvlinkState->pNvl,
|
||||
pNvlinkState->pPackedObject);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"Failed to flush NVL object to InfoROM, rc: %d\n", status);
|
||||
}
|
||||
else
|
||||
{
|
||||
pNvlinkState->bDirty = NV_FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static void
|
||||
_inforom_nvlink_get_correctable_error_counts
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NvU32 linkId,
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *pErrorCounts
|
||||
)
|
||||
{
|
||||
NvlStatus status;
|
||||
NvU32 lane, idx;
|
||||
NVSWITCH_NVLINK_GET_COUNTERS_PARAMS p = { 0 };
|
||||
|
||||
ct_assert(NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE__SIZE <=
|
||||
INFOROM_NVL_OBJECT_MAX_SUBLINK_WIDTH);
|
||||
|
||||
nvswitch_os_memset(pErrorCounts, 0, sizeof(*pErrorCounts));
|
||||
|
||||
p.linkId = linkId;
|
||||
p.counterMask = NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_FLIT
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_TX_ERR_REPLAY
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_TX_ERR_RECOVERY
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_REPLAY
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L0
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L1
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L2
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L3
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L4
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L5
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L6
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L7
|
||||
| NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L7;
|
||||
|
||||
status = device->hal.nvswitch_ctrl_get_counters(device, &p);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
pErrorCounts->flitCrc =
|
||||
p.nvlinkCounters[BIT_IDX_32(NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_FLIT)];
|
||||
|
||||
pErrorCounts->txLinkReplay =
|
||||
p.nvlinkCounters[BIT_IDX_32(NVSWITCH_NVLINK_COUNTER_DL_TX_ERR_REPLAY)];
|
||||
|
||||
pErrorCounts->rxLinkReplay =
|
||||
p.nvlinkCounters[BIT_IDX_32(NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_REPLAY)];
|
||||
|
||||
pErrorCounts->linkRecovery =
|
||||
p.nvlinkCounters[BIT_IDX_32(NVSWITCH_NVLINK_COUNTER_DL_TX_ERR_RECOVERY)];
|
||||
|
||||
for (lane = 0; lane < NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE__SIZE; lane++)
|
||||
{
|
||||
idx = BIT_IDX_32(NVSWITCH_NVLINK_COUNTER_DL_RX_ERR_CRC_LANE_L(lane));
|
||||
pErrorCounts->laneCrc[lane] = p.nvlinkCounters[idx];
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
_inforom_nvlink_update_correctable_error_rates
|
||||
(
|
||||
nvswitch_device *device,
|
||||
struct inforom *pInforom
|
||||
|
||||
)
|
||||
{
|
||||
PINFOROM_NVLINK_STATE pNvlinkState = pInforom->pNvlinkState;
|
||||
NvU64 enabledLinkMask;
|
||||
NvU32 linkId, publicId, localLinkIdx;
|
||||
NvBool bDirty = NV_FALSE;
|
||||
NvBool bDirtyTemp;
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS errorCounts = { 0 };
|
||||
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
enabledLinkMask = nvswitch_get_enabled_link_mask(device);
|
||||
|
||||
FOR_EACH_INDEX_IN_MASK(64, linkId, enabledLinkMask)
|
||||
{
|
||||
if (device->hal.nvswitch_get_link_public_id(device, linkId, &publicId) != NVL_SUCCESS)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
if (device->hal.nvswitch_get_link_local_idx(device, linkId, &localLinkIdx) != NVL_SUCCESS)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
_inforom_nvlink_get_correctable_error_counts(device, linkId, &errorCounts);
|
||||
|
||||
if (device->hal.nvswitch_inforom_nvl_update_link_correctable_error_info(device,
|
||||
pNvlinkState->pNvl, &pNvlinkState->correctableErrorRateState, linkId,
|
||||
publicId, localLinkIdx, &errorCounts, &bDirtyTemp) != NVL_SUCCESS)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
bDirty |= bDirtyTemp;
|
||||
}
|
||||
FOR_EACH_INDEX_IN_MASK_END;
|
||||
|
||||
pNvlinkState->bDirty |= bDirty;
|
||||
}
|
||||
|
||||
static void _nvswitch_nvlink_1hz_callback
|
||||
(
|
||||
nvswitch_device *device
|
||||
)
|
||||
{
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
|
||||
if ((pInforom == NULL) || (pInforom->pNvlinkState == NULL) ||
|
||||
pInforom->pNvlinkState->bCallbackPending)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
pInforom->pNvlinkState->bCallbackPending = NV_TRUE;
|
||||
_inforom_nvlink_update_correctable_error_rates(device, pInforom);
|
||||
pInforom->pNvlinkState->bCallbackPending = NV_FALSE;
|
||||
}
|
||||
|
||||
static void
|
||||
_inforom_nvlink_start_correctable_error_recording
|
||||
(
|
||||
nvswitch_device *device,
|
||||
struct inforom *pInforom
|
||||
)
|
||||
{
|
||||
PINFOROM_NVLINK_STATE pNvlinkState = pInforom->pNvlinkState;
|
||||
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (pNvlinkState->bDisableCorrectableErrorLogging)
|
||||
{
|
||||
|
||||
NVSWITCH_PRINT(device, INFO,
|
||||
"%s: Correctable error recording disabled by regkey or unsupported\n",
|
||||
__FUNCTION__);
|
||||
return;
|
||||
}
|
||||
|
||||
pNvlinkState->bCallbackPending = NV_FALSE;
|
||||
|
||||
nvswitch_task_create(device, &_nvswitch_nvlink_1hz_callback,
|
||||
NVSWITCH_INTERVAL_1SEC_IN_NS, 0);
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
@@ -41,7 +222,82 @@ nvswitch_inforom_nvlink_load
|
||||
nvswitch_device *device
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
NvlStatus status;
|
||||
NvU8 version = 0;
|
||||
NvU8 subversion = 0;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState = NULL;
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
status = nvswitch_inforom_get_object_version_info(device, "NVL", &version,
|
||||
&subversion);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, WARN, "no NVL object found, rc:%d\n", status);
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
if (!INFOROM_OBJECT_SUBVERSION_SUPPORTS_NVSWITCH(subversion))
|
||||
{
|
||||
NVSWITCH_PRINT(device, WARN, "NVL v%u.%u not supported\n",
|
||||
version, subversion);
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
NVSWITCH_PRINT(device, INFO, "NVL v%u.%u found\n", version, subversion);
|
||||
|
||||
pNvlinkState = nvswitch_os_malloc(sizeof(INFOROM_NVLINK_STATE));
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_NO_MEM;
|
||||
}
|
||||
nvswitch_os_memset(pNvlinkState, 0, sizeof(INFOROM_NVLINK_STATE));
|
||||
|
||||
pNvlinkState->bDirty = NV_FALSE;
|
||||
pNvlinkState->bDisableFatalErrorLogging = NV_FALSE;
|
||||
pNvlinkState->bDisableCorrectableErrorLogging = NV_TRUE;
|
||||
|
||||
status = device->hal.nvswitch_inforom_nvl_setup_nvlink_state(device, pNvlinkState, version);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "Failed to set up NVL object, rc:%d\n", status);
|
||||
goto nvswitch_inforom_nvlink_version_fail;
|
||||
}
|
||||
|
||||
status = nvswitch_inforom_read_object(device, "NVL", pNvlinkState->pFmt,
|
||||
pNvlinkState->pPackedObject,
|
||||
pNvlinkState->pNvl);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "Failed to read NVL object, rc:%d\n", status);
|
||||
goto nvswitch_inforom_read_fail;
|
||||
}
|
||||
|
||||
status = nvswitch_inforom_add_object(pInforom, &pNvlinkState->pNvl->header);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "Failed to cache NVL object header, rc:%d\n",
|
||||
status);
|
||||
goto nvswitch_inforom_read_fail;
|
||||
}
|
||||
|
||||
pInforom->pNvlinkState = pNvlinkState;
|
||||
|
||||
_inforom_nvlink_start_correctable_error_recording(device, pInforom);
|
||||
|
||||
return NVL_SUCCESS;
|
||||
|
||||
nvswitch_inforom_read_fail:
|
||||
nvswitch_os_free(pNvlinkState->pPackedObject);
|
||||
nvswitch_os_free(pNvlinkState->pNvl);
|
||||
nvswitch_inforom_nvlink_version_fail:
|
||||
nvswitch_os_free(pNvlinkState);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
void
|
||||
@@ -50,30 +306,29 @@ nvswitch_inforom_nvlink_unload
|
||||
nvswitch_device *device
|
||||
)
|
||||
{
|
||||
return;
|
||||
}
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvlink_get_minion_data
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NvU8 linkId,
|
||||
NvU32 *seedData
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvlink_set_minion_data
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NvU8 linkId,
|
||||
NvU32 *seedData,
|
||||
NvU32 size
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
if (nvswitch_inforom_nvlink_flush(device) != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "Failed to flush NVL object on object unload\n");
|
||||
}
|
||||
|
||||
nvswitch_os_free(pNvlinkState->pPackedObject);
|
||||
nvswitch_os_free(pNvlinkState->pNvl);
|
||||
nvswitch_os_free(pNvlinkState);
|
||||
pInforom->pNvlinkState = NULL;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
@@ -83,7 +338,35 @@ nvswitch_inforom_nvlink_log_error_event
|
||||
void *error_event
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
NvlStatus status;
|
||||
NvBool bDirty = NV_FALSE;
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
status = device->hal.nvswitch_inforom_nvl_log_error_event(device,
|
||||
pNvlinkState->pNvl,
|
||||
(INFOROM_NVLINK_ERROR_EVENT *)error_event,
|
||||
&bDirty);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "Failed to log error to inforom, rc:%d\n",
|
||||
status);
|
||||
}
|
||||
|
||||
pNvlinkState->bDirty |= bDirty;
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
@@ -93,7 +376,14 @@ nvswitch_inforom_nvlink_get_max_correctable_error_rate
|
||||
NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS *params
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
|
||||
if ((pInforom == NULL) || (pInforom->pNvlinkState == NULL))
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
return device->hal.nvswitch_inforom_nvl_get_max_correctable_error_rate(device, params);
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
@@ -103,5 +393,67 @@ nvswitch_inforom_nvlink_get_errors
|
||||
NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *params
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
|
||||
if ((pInforom == NULL) || (pInforom->pNvlinkState == NULL))
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
return device->hal.nvswitch_inforom_nvl_get_errors(device, params);
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvlink_setL1Threshold
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NvU32 word1,
|
||||
NvU32 word2
|
||||
)
|
||||
{
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
return device->hal.nvswitch_inforom_nvl_setL1Threshold(device,
|
||||
pNvlinkState->pNvl,
|
||||
word1,
|
||||
word2);
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvlink_getL1Threshold
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NvU32 *word1,
|
||||
NvU32 *word2
|
||||
)
|
||||
{
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
return device->hal.nvswitch_inforom_nvl_getL1Threshold(device,
|
||||
pNvlinkState->pNvl,
|
||||
word1,
|
||||
word2);
|
||||
}
|
||||
|
||||
|
||||
619
src/common/nvswitch/kernel/inforom/inforom_nvl_v3_nvswitch.c
Normal file
619
src/common/nvswitch/kernel/inforom/inforom_nvl_v3_nvswitch.c
Normal file
@@ -0,0 +1,619 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "common_nvswitch.h"
|
||||
#include "inforom/inforom_nvswitch.h"
|
||||
#include "inforom/inforom_nvl_v3_nvswitch.h"
|
||||
#include "lr10/lr10.h"
|
||||
|
||||
NvlStatus inforom_nvl_v3_map_error
|
||||
(
|
||||
INFOROM_NVLINK_ERROR_TYPES error,
|
||||
NvU8 *pHeader,
|
||||
NvU16 *pMetadata,
|
||||
NvU8 *pErrorSubtype,
|
||||
INFOROM_NVL_ERROR_BLOCK_TYPE *pBlockType
|
||||
)
|
||||
{
|
||||
static const struct
|
||||
{ NvU8 header;
|
||||
NvU16 metadata;
|
||||
NvU8 errorSubtype;
|
||||
INFOROM_NVL_ERROR_BLOCK_TYPE blockType;
|
||||
} lut[] =
|
||||
{
|
||||
LUT_ELEMENT(DL, _RX, _FAULT_DL_PROTOCOL_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _RX, _FAULT_SUBLINK_CHANGE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _RX, _FLIT_CRC_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(DL, _RX, _LANE0_CRC_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(DL, _RX, _LANE1_CRC_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(DL, _RX, _LANE2_CRC_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(DL, _RX, _LANE3_CRC_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(DL, _RX, _LINK_REPLAY_EVENTS_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(DL, _TX, _FAULT_RAM_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _TX, _FAULT_INTERFACE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _TX, _FAULT_SUBLINK_CHANGE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _TX, _LINK_REPLAY_EVENTS_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(DL, _NA, _LTSSM_FAULT_UP_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _NA, _LTSSM_FAULT_DOWN_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _NA, _LINK_RECOVERY_EVENTS_CORR, _ACCUM, _CORRECTABLE),
|
||||
LUT_ELEMENT(TLC, _RX, _DL_HDR_PARITY_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _DL_DATA_PARITY_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _DL_CTRL_PARITY_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _INVALID_AE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _INVALID_BE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _INVALID_ADDR_ALIGN_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _PKTLEN_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSVD_PACKET_STATUS_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSVD_CACHE_ATTR_PROBE_REQ_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSVD_CACHE_ATTR_PROBE_RSP_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _DATLEN_GT_RMW_REQ_MAX_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _DATLEN_LT_ATR_RSP_MIN_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _INVALID_CR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _INVALID_COLLAPSED_RESPONSE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _HDR_OVERFLOW_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _DATA_OVERFLOW_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _STOMP_DETECTED_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSVD_CMD_ENC_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSVD_DAT_LEN_ENC_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _INVALID_PO_FOR_CACHE_ATTR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSP_STATUS_HW_ERR_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSP_STATUS_UR_ERR_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _RSP_STATUS_PRIV_ERR_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _POISON_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _AN1_HEARTBEAT_TIMEOUT_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _ILLEGAL_PRI_WRITE_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _DL_CREDIT_PARITY_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _NCISOC_HDR_ECC_DBE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _NCISOC_PARITY_ERR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _ILLEGAL_PRI_WRITE_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC0_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC1_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC2_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC3_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC4_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC5_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC6_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _AN1_TIMEOUT_VC7_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _POISON_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _RSP_STATUS_HW_ERR_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _RSP_STATUS_UR_ERR_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _RSP_STATUS_PRIV_ERR_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _SLEEP_WHILE_ACTIVE_LINK_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _RSTSEQ_PHYCTL_TIMEOUT_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _RSTSEQ_CLKCTL_TIMEOUT_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _CLKCTL_ILLEGAL_REQUEST_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _RSTSEQ_PLL_TIMEOUT_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _RSTSEQ_PHYARB_TIMEOUT_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _ILLEGAL_LINK_STATE_REQUEST_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _FAILED_MINION_REQUEST_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _RESERVED_REQUEST_VALUE_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _LINK_STATE_WRITE_WHILE_BUSY_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _WRITE_TO_LOCKED_SYSTEM_REG_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(NVLIPT, _NA, _LINK_STATE_REQUEST_TIMEOUT_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
LUT_ELEMENT(TLC, _RX, _HDR_RAM_ECC_DBE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _DAT0_RAM_ECC_DBE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _RX, _DAT1_RAM_ECC_DBE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _CREQ_DAT_RAM_ECC_DBE_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _RSP_DAT_RAM_ECC_DBE_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _COM_DAT_RAM_ECC_DBE_NONFATAL, _COUNT, _UNCORRECTABLE_NONFATAL),
|
||||
LUT_ELEMENT(TLC, _TX, _RSP1_DAT_RAM_ECC_DBE_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _NA, _PHY_A_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _RX, _CRC_COUNTER_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _TX, _PL_ERROR_FATAL, _COUNT, _UNCORRECTABLE_FATAL),
|
||||
LUT_ELEMENT(DL, _RX, _PL_ERROR_FATAL, _COUNT, _UNCORRECTABLE_FATAL)
|
||||
};
|
||||
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_FAULT_DL_PROTOCOL_FATAL == 0);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_FAULT_SUBLINK_CHANGE_FATAL == 1);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_FLIT_CRC_CORR == 2);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_LANE0_CRC_CORR == 3);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_LANE1_CRC_CORR == 4);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_LANE2_CRC_CORR == 5);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_LANE3_CRC_CORR == 6);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_LINK_REPLAY_EVENTS_CORR == 7);
|
||||
ct_assert(INFOROM_NVLINK_DL_TX_FAULT_RAM_FATAL == 8);
|
||||
ct_assert(INFOROM_NVLINK_DL_TX_FAULT_INTERFACE_FATAL == 9);
|
||||
ct_assert(INFOROM_NVLINK_DL_TX_FAULT_SUBLINK_CHANGE_FATAL == 10);
|
||||
ct_assert(INFOROM_NVLINK_DL_TX_LINK_REPLAY_EVENTS_CORR == 11);
|
||||
ct_assert(INFOROM_NVLINK_DL_LTSSM_FAULT_UP_FATAL == 12);
|
||||
ct_assert(INFOROM_NVLINK_DL_LTSSM_FAULT_DOWN_FATAL == 13);
|
||||
ct_assert(INFOROM_NVLINK_DL_LINK_RECOVERY_EVENTS_CORR == 14);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DL_HDR_PARITY_ERR_FATAL == 15);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DL_DATA_PARITY_ERR_FATAL == 16);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DL_CTRL_PARITY_ERR_FATAL == 17);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_INVALID_AE_FATAL == 18);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_INVALID_BE_FATAL == 19);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_INVALID_ADDR_ALIGN_FATAL == 20);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_PKTLEN_ERR_FATAL == 21);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSVD_PACKET_STATUS_ERR_FATAL == 22);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSVD_CACHE_ATTR_PROBE_REQ_ERR_FATAL == 23);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSVD_CACHE_ATTR_PROBE_RSP_ERR_FATAL == 24);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DATLEN_GT_RMW_REQ_MAX_ERR_FATAL == 25);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DATLEN_LT_ATR_RSP_MIN_ERR_FATAL == 26);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_INVALID_CR_FATAL == 27);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_INVALID_COLLAPSED_RESPONSE_FATAL == 28);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_HDR_OVERFLOW_FATAL == 29);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DATA_OVERFLOW_FATAL == 30);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_STOMP_DETECTED_FATAL == 31);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSVD_CMD_ENC_FATAL == 32);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSVD_DAT_LEN_ENC_FATAL == 33);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_INVALID_PO_FOR_CACHE_ATTR_FATAL == 34);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSP_STATUS_HW_ERR_NONFATAL == 35);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSP_STATUS_UR_ERR_NONFATAL == 36);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_RSP_STATUS_PRIV_ERR_NONFATAL == 37);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_POISON_NONFATAL == 38);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_AN1_HEARTBEAT_TIMEOUT_NONFATAL == 39);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_ILLEGAL_PRI_WRITE_NONFATAL == 40);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_DL_CREDIT_PARITY_ERR_FATAL == 41);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_NCISOC_HDR_ECC_DBE_FATAL == 42);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_NCISOC_PARITY_ERR_FATAL == 43);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_ILLEGAL_PRI_WRITE_NONFATAL == 44);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC0_NONFATAL == 45);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC1_NONFATAL == 46);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC2_NONFATAL == 47);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC3_NONFATAL == 48);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC4_NONFATAL == 49);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC5_NONFATAL == 50);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC6_NONFATAL == 51);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC7_NONFATAL == 52);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_POISON_NONFATAL == 53);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_RSP_STATUS_HW_ERR_NONFATAL == 54);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_RSP_STATUS_UR_ERR_NONFATAL == 55);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_RSP_STATUS_PRIV_ERR_NONFATAL == 56);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_SLEEP_WHILE_ACTIVE_LINK_FATAL == 57);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_RSTSEQ_PHYCTL_TIMEOUT_FATAL == 58);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_RSTSEQ_CLKCTL_TIMEOUT_FATAL == 59);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_CLKCTL_ILLEGAL_REQUEST_FATAL == 60);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_RSTSEQ_PLL_TIMEOUT_FATAL == 61);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_RSTSEQ_PHYARB_TIMEOUT_FATAL == 62);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_ILLEGAL_LINK_STATE_REQUEST_NONFATAL == 63);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_FAILED_MINION_REQUEST_NONFATAL == 64);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_RESERVED_REQUEST_VALUE_NONFATAL == 65);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_LINK_STATE_WRITE_WHILE_BUSY_NONFATAL == 66);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_WRITE_TO_LOCKED_SYSTEM_REG_NONFATAL == 67);
|
||||
ct_assert(INFOROM_NVLINK_NVLIPT_LINK_STATE_REQUEST_TIMEOUT_NONFATAL == 68);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_HDR_RAM_ECC_DBE_FATAL == 69);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DAT0_RAM_ECC_DBE_FATAL == 70);
|
||||
ct_assert(INFOROM_NVLINK_TLC_RX_DAT1_RAM_ECC_DBE_FATAL == 71);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_CREQ_DAT_RAM_ECC_DBE_NONFATAL == 72);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_RSP_DAT_RAM_ECC_DBE_NONFATAL == 73);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_COM_DAT_RAM_ECC_DBE_NONFATAL == 74);
|
||||
ct_assert(INFOROM_NVLINK_TLC_TX_RSP1_DAT_RAM_ECC_DBE_FATAL == 75);
|
||||
ct_assert(INFOROM_NVLINK_DL_PHY_A_FATAL == 76);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_CRC_COUNTER_FATAL == 77);
|
||||
ct_assert(INFOROM_NVLINK_DL_TX_PL_ERROR_FATAL == 78);
|
||||
ct_assert(INFOROM_NVLINK_DL_RX_PL_ERROR_FATAL == 79);
|
||||
|
||||
ct_assert(NV_ARRAY_ELEMENTS(lut) == INFOROM_NVLINK_MAX_ERROR_TYPE);
|
||||
|
||||
if (error >= NV_ARRAY_ELEMENTS(lut))
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
*pHeader = lut[error].header;
|
||||
*pMetadata = lut[error].metadata;
|
||||
*pErrorSubtype = lut[error].errorSubtype;
|
||||
*pBlockType = lut[error].blockType;
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
inforom_nvl_v3_encode_nvlipt_error_subtype
|
||||
(
|
||||
NvU8 localLinkIdx,
|
||||
NvU8 *pSubtype
|
||||
)
|
||||
{
|
||||
static const NvBool linkIdxValidLut[] =
|
||||
{
|
||||
NV_TRUE,
|
||||
NV_TRUE,
|
||||
NV_TRUE,
|
||||
NV_FALSE,
|
||||
NV_FALSE,
|
||||
NV_FALSE,
|
||||
NV_TRUE,
|
||||
NV_TRUE,
|
||||
NV_TRUE,
|
||||
NV_TRUE,
|
||||
NV_TRUE,
|
||||
NV_TRUE
|
||||
};
|
||||
|
||||
ct_assert(NVLIPT_NA_SLEEP_WHILE_ACTIVE_LINK_FATAL_COUNT == 0);
|
||||
ct_assert(NVLIPT_NA_RSTSEQ_PHYCTL_TIMEOUT_FATAL_COUNT == 1);
|
||||
ct_assert(NVLIPT_NA_RSTSEQ_CLKCTL_TIMEOUT_FATAL_COUNT == 2);
|
||||
ct_assert(NVLIPT_NA_CLKCTL_ILLEGAL_REQUEST_FATAL_COUNT == 3);
|
||||
ct_assert(NVLIPT_NA_RSTSEQ_PLL_TIMEOUT_FATAL_COUNT == 4);
|
||||
ct_assert(NVLIPT_NA_RSTSEQ_PHYARB_TIMEOUT_FATAL_COUNT == 5);
|
||||
ct_assert(NVLIPT_NA_ILLEGAL_LINK_STATE_REQUEST_NONFATAL_COUNT == 6);
|
||||
ct_assert(NVLIPT_NA_FAILED_MINION_REQUEST_NONFATAL_COUNT == 7);
|
||||
ct_assert(NVLIPT_NA_RESERVED_REQUEST_VALUE_NONFATAL_COUNT == 8);
|
||||
ct_assert(NVLIPT_NA_LINK_STATE_WRITE_WHILE_BUSY_NONFATAL_COUNT == 9);
|
||||
ct_assert(NVLIPT_NA_WRITE_TO_LOCKED_SYSTEM_REG_NONFATAL_COUNT == 10);
|
||||
ct_assert(NVLIPT_NA_LINK_STATE_REQUEST_TIMEOUT_NONFATAL_COUNT == 11);
|
||||
|
||||
if ((localLinkIdx >= NV_INFOROM_NVL_OBJECT_V3_NVLIPT_ERROR_LINK_ID_COMMON) ||
|
||||
(*pSubtype >= NV_ARRAY_ELEMENTS(linkIdxValidLut)))
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (linkIdxValidLut[*pSubtype])
|
||||
{
|
||||
*pSubtype = FLD_SET_DRF_NUM(_INFOROM_NVL_OBJECT_V3, _NVLIPT_ERROR,
|
||||
_LINK_ID, localLinkIdx, *pSubtype);
|
||||
}
|
||||
else
|
||||
{
|
||||
*pSubtype = FLD_SET_DRF(_INFOROM_NVL_OBJECT_V3, _NVLIPT_ERROR, _LINK_ID,
|
||||
_COMMON, *pSubtype);
|
||||
}
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvBool
|
||||
inforom_nvl_v3_should_replace_error_rate_entry
|
||||
(
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pErrorRate,
|
||||
NvU32 flitCrcRate,
|
||||
NvU32 *pLaneCrcRates
|
||||
)
|
||||
{
|
||||
NvU32 i;
|
||||
NvU64 currentLaneCrcRateSum = 0;
|
||||
NvU64 maxLaneCrcRateSum = 0;
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pErrorRate->laneCrcErrorsPerMinute); i++)
|
||||
{
|
||||
currentLaneCrcRateSum += pLaneCrcRates[i];
|
||||
maxLaneCrcRateSum += pErrorRate->laneCrcErrorsPerMinute[i];
|
||||
}
|
||||
|
||||
return (flitCrcRate > pErrorRate->flitCrcErrorsPerMinute) ||
|
||||
(currentLaneCrcRateSum > maxLaneCrcRateSum);
|
||||
}
|
||||
|
||||
void
|
||||
inforom_nvl_v3_seconds_to_day_and_month
|
||||
(
|
||||
NvU32 sec,
|
||||
NvU32 *pDay,
|
||||
NvU32 *pMonth
|
||||
)
|
||||
{
|
||||
*pDay = sec / (60 * 60 * 24);
|
||||
*pMonth = *pDay / 30;
|
||||
}
|
||||
|
||||
void
|
||||
inforom_nvl_v3_update_error_rate_entry
|
||||
(
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pErrorRate,
|
||||
NvU32 newSec,
|
||||
NvU32 newFlitCrcRate,
|
||||
NvU32 *pNewLaneCrcRates
|
||||
)
|
||||
{
|
||||
pErrorRate->lastUpdated = newSec;
|
||||
pErrorRate->flitCrcErrorsPerMinute = newFlitCrcRate;
|
||||
nvswitch_os_memcpy(pErrorRate->laneCrcErrorsPerMinute, pNewLaneCrcRates,
|
||||
sizeof(pErrorRate->laneCrcErrorsPerMinute));
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
inforom_nvl_v3_map_error_to_userspace_error
|
||||
(
|
||||
nvswitch_device *device,
|
||||
INFOROM_NVL_OBJECT_V3_ERROR_ENTRY *pErrorLog,
|
||||
NVSWITCH_NVLINK_ERROR_ENTRY *pNvlError
|
||||
)
|
||||
{
|
||||
static const NvU32 DL_RX_ERRORS[] =
|
||||
{
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_FAULT_DL_PROTOCOL_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_FAULT_SUBLINK_CHANGE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_FLIT_CRC_CORR,
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_LANE0_CRC_CORR,
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_LANE1_CRC_CORR,
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_LANE2_CRC_CORR,
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_LANE3_CRC_CORR,
|
||||
NVSWITCH_NVLINK_ERR_DL_RX_LINK_REPLAY_EVENTS_CORR
|
||||
};
|
||||
|
||||
static const NvU32 DL_TX_ERRORS[] =
|
||||
{
|
||||
NVSWITCH_NVLINK_ERR_DL_TX_FAULT_RAM_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_DL_TX_FAULT_INTERFACE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_DL_TX_FAULT_SUBLINK_CHANGE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_DL_TX_LINK_REPLAY_EVENTS_CORR
|
||||
};
|
||||
|
||||
static const NvU32 DL_NA_ERRORS[] =
|
||||
{
|
||||
NVSWITCH_NVLINK_ERR_DL_LTSSM_FAULT_UP_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_DL_LTSSM_FAULT_DOWN_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_DL_LINK_RECOVERY_EVENTS_CORR
|
||||
};
|
||||
|
||||
static const NvU32 TLC_RX_ERRORS[] =
|
||||
{
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DL_HDR_PARITY_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DL_DATA_PARITY_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DL_CTRL_PARITY_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_INVALID_AE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_INVALID_BE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_INVALID_ADDR_ALIGN_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_PKTLEN_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSVD_PACKET_STATUS_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSVD_CACHE_ATTR_PROBE_REQ_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSVD_CACHE_ATTR_PROBE_RSP_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DATLEN_GT_RMW_REQ_MAX_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DATLEN_LT_ATR_RSP_MIN_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_INVALID_CR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_INVALID_COLLAPSED_RESPONSE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_HDR_OVERFLOW_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DATA_OVERFLOW_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_STOMP_DETECTED_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSVD_CMD_ENC_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSVD_DAT_LEN_ENC_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_INVALID_PO_FOR_CACHE_ATTR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSP_STATUS_HW_ERR_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSP_STATUS_UR_ERR_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_RSP_STATUS_PRIV_ERR_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_POISON_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_AN1_HEARTBEAT_TIMEOUT_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_ILLEGAL_PRI_WRITE_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_HDR_RAM_ECC_DBE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DAT0_RAM_ECC_DBE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_RX_DAT1_RAM_ECC_DBE_FATAL
|
||||
};
|
||||
|
||||
static const NvU32 TLC_TX_ERRORS[] =
|
||||
{
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_DL_CREDIT_PARITY_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_NCISOC_HDR_ECC_DBE_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_NCISOC_PARITY_ERR_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_ILLEGAL_PRI_WRITE_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC0_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC1_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC2_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC3_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC4_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC5_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC6_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_AN1_TIMEOUT_VC7_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_POISON_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_RSP_STATUS_HW_ERR_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_RSP_STATUS_UR_ERR_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_RSP_STATUS_PRIV_ERR_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_CREQ_DAT_RAM_ECC_DBE_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_RSP_DAT_RAM_ECC_DBE_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_COM_DAT_RAM_ECC_DBE_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_TLC_TX_RSP1_DAT_RAM_ECC_DBE_FATAL
|
||||
};
|
||||
|
||||
static const NvU32 LIPT_ERRORS[] =
|
||||
{
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_SLEEP_WHILE_ACTIVE_LINK_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_RSTSEQ_PHYCTL_TIMEOUT_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_RSTSEQ_CLKCTL_TIMEOUT_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_CLKCTL_ILLEGAL_REQUEST_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_RSTSEQ_PLL_TIMEOUT_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_RSTSEQ_PHYARB_TIMEOUT_FATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_ILLEGAL_LINK_STATE_REQUEST_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_FAILED_MINION_REQUEST_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_RESERVED_REQUEST_VALUE_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_LINK_STATE_WRITE_WHILE_BUSY_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_WRITE_TO_LOCKED_SYSTEM_REG_NONFATAL,
|
||||
NVSWITCH_NVLINK_ERR_NVLIPT_LINK_STATE_REQUEST_TIMEOUT_NONFATAL
|
||||
};
|
||||
|
||||
NvU32 subType = 0;
|
||||
NvU8 nvliptInstance = 0, localLinkIdx = 0;
|
||||
NvU8 numLinksPerNvlipt = device->hal.nvswitch_get_num_links_per_nvlipt(device);;
|
||||
|
||||
if ((pErrorLog == NULL) || (pNvlError == NULL))
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
subType = DRF_VAL(_INFOROM_NVL_OBJECT_V3, _NVLIPT_ERROR, _SUBTYPE, pErrorLog->errorSubtype);
|
||||
nvliptInstance = DRF_VAL(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _NVLIPT_INSTANCE_ID, pErrorLog->metadata);
|
||||
pNvlError->timeStamp = pErrorLog->data.event.lastError;
|
||||
|
||||
if (pErrorLog->header == INFOROM_NVL_ERROR_TYPE_COUNT)
|
||||
{
|
||||
pNvlError->count = (NvU64)pErrorLog->data.event.totalCount;
|
||||
}
|
||||
else if (pErrorLog->header == INFOROM_NVL_ERROR_TYPE_ACCUM)
|
||||
{
|
||||
pNvlError->count = pErrorLog->data.accum.totalCount.hi;
|
||||
pNvlError->count = (pNvlError->count << 32) | pErrorLog->data.accum.totalCount.lo;
|
||||
}
|
||||
else
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _DL0, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _DL1, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _DL2, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _DL3, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _DL4, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _DL5, pErrorLog->metadata))
|
||||
{
|
||||
localLinkIdx = DRF_VAL(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, pErrorLog->metadata);
|
||||
pNvlError->instance = nvliptInstance * numLinksPerNvlipt + localLinkIdx;
|
||||
|
||||
if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _DIRECTION, _NA, pErrorLog->metadata) &&
|
||||
(subType < (sizeof(DL_NA_ERRORS) / sizeof(DL_NA_ERRORS[0]))))
|
||||
{
|
||||
pNvlError->error = DL_NA_ERRORS[subType];
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
else if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _DIRECTION, _RX, pErrorLog->metadata) &&
|
||||
(subType < (sizeof(DL_RX_ERRORS) / sizeof(DL_RX_ERRORS[0]))))
|
||||
{
|
||||
pNvlError->error = DL_RX_ERRORS[subType];
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
else if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _DIRECTION, _TX, pErrorLog->metadata) &&
|
||||
(subType < (sizeof(DL_TX_ERRORS) / sizeof(DL_TX_ERRORS[0]))))
|
||||
{
|
||||
pNvlError->error = DL_TX_ERRORS[subType];
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
else if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _TLC0, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _TLC1, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _TLC2, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _TLC3, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _TLC4, pErrorLog->metadata) ||
|
||||
FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _TLC5, pErrorLog->metadata))
|
||||
{
|
||||
localLinkIdx = DRF_VAL(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, pErrorLog->metadata)
|
||||
- NV_INFOROM_NVL_OBJECT_V3_ERROR_METADATA_BLOCK_ID_TLC0;
|
||||
pNvlError->instance = nvliptInstance * numLinksPerNvlipt + localLinkIdx;
|
||||
|
||||
if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _DIRECTION, _RX, pErrorLog->metadata) &&
|
||||
(subType < (sizeof(TLC_RX_ERRORS) / sizeof(TLC_RX_ERRORS[0]))))
|
||||
{
|
||||
pNvlError->error = TLC_RX_ERRORS[subType];
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
else if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _DIRECTION, _TX, pErrorLog->metadata) &&
|
||||
(subType < (sizeof(TLC_TX_ERRORS) / sizeof(TLC_TX_ERRORS[0]))))
|
||||
{
|
||||
pNvlError->error = TLC_TX_ERRORS[subType];
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
}
|
||||
else if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID, _NVLIPT, pErrorLog->metadata))
|
||||
{
|
||||
if (subType < (sizeof(LIPT_ERRORS) / sizeof(LIPT_ERRORS[0])))
|
||||
{
|
||||
if (FLD_TEST_DRF(_INFOROM_NVL_OBJECT_V3, _NVLIPT_ERROR, _LINK_ID, _COMMON, pErrorLog->errorSubtype))
|
||||
{
|
||||
localLinkIdx = 0; //common nvlipt error
|
||||
}
|
||||
else
|
||||
{
|
||||
localLinkIdx = DRF_VAL(_INFOROM_NVL_OBJECT_V3, _NVLIPT_ERROR, _LINK_ID, pErrorLog->errorSubtype);
|
||||
}
|
||||
|
||||
pNvlError->instance = nvliptInstance * numLinksPerNvlipt + localLinkIdx;
|
||||
pNvlError->error = LIPT_ERRORS[subType];
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
void
|
||||
inforom_nvl_v3_update_correctable_error_rates
|
||||
(
|
||||
INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE_V3S *pState,
|
||||
NvU8 link,
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *pCounts
|
||||
)
|
||||
{
|
||||
NvU32 i;
|
||||
NvU32 tempFlitCrc, tempRxLinkReplay, tempTxLinkReplay, tempLinkRecovery;
|
||||
NvU32 tempLaneCrc[4];
|
||||
|
||||
//
|
||||
// If the registers have decreased from last reported, then
|
||||
// they must have been reset or have overflowed. Set the last
|
||||
// register value to 0.
|
||||
//
|
||||
if (pCounts->flitCrc < pState->lastRead[link].flitCrc)
|
||||
{
|
||||
pState->lastRead[link].flitCrc = 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pState->lastRead[link].laneCrc); i++)
|
||||
{
|
||||
if (pCounts->laneCrc[i] < pState->lastRead[link].laneCrc[i])
|
||||
{
|
||||
pState->lastRead[link].laneCrc[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
// Get number of new errors since the last register read
|
||||
tempFlitCrc = pCounts->flitCrc;
|
||||
pCounts->flitCrc -= pState->lastRead[link].flitCrc;
|
||||
|
||||
// Update errors per minute with error delta
|
||||
m_inforom_nvl_get_new_errors_per_minute(pCounts->flitCrc,
|
||||
&pState->errorsPerMinute[link].flitCrc);
|
||||
|
||||
// Save the current register value for the next callback
|
||||
pState->lastRead[link].flitCrc = tempFlitCrc;
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pState->lastRead[link].laneCrc); i++)
|
||||
{
|
||||
tempLaneCrc[i] = pCounts->laneCrc[i];
|
||||
pCounts->laneCrc[i] -= pState->lastRead[link].laneCrc[i];
|
||||
m_inforom_nvl_get_new_errors_per_minute(pCounts->laneCrc[i],
|
||||
&pState->errorsPerMinute[link].laneCrc[i]);
|
||||
|
||||
pState->lastRead[link].laneCrc[i] = tempLaneCrc[i];
|
||||
}
|
||||
|
||||
//
|
||||
// We don't track rates for the following errors. We just need to stash
|
||||
// the current register value and update pCounts with the delta since
|
||||
// the last register read.
|
||||
//
|
||||
if (pCounts->rxLinkReplay < pState->lastRead[link].rxLinkReplay)
|
||||
{
|
||||
pState->lastRead[link].rxLinkReplay = 0;
|
||||
}
|
||||
tempRxLinkReplay = pCounts->rxLinkReplay;
|
||||
pCounts->rxLinkReplay -= pState->lastRead[link].rxLinkReplay;
|
||||
pState->lastRead[link].rxLinkReplay = tempRxLinkReplay;
|
||||
|
||||
if (pCounts->txLinkReplay < pState->lastRead[link].txLinkReplay)
|
||||
{
|
||||
pState->lastRead[link].txLinkReplay = 0;
|
||||
}
|
||||
tempTxLinkReplay = pCounts->txLinkReplay;
|
||||
pCounts->txLinkReplay -= pState->lastRead[link].txLinkReplay;
|
||||
pState->lastRead[link].txLinkReplay = tempTxLinkReplay;
|
||||
|
||||
if (pCounts->linkRecovery < pState->lastRead[link].linkRecovery)
|
||||
{
|
||||
pState->lastRead[link].linkRecovery = 0;
|
||||
}
|
||||
tempLinkRecovery = pCounts->linkRecovery;
|
||||
pCounts->linkRecovery -= pState->lastRead[link].linkRecovery;
|
||||
pState->lastRead[link].linkRecovery = tempLinkRecovery;
|
||||
}
|
||||
|
||||
108
src/common/nvswitch/kernel/inforom/inforom_nvl_v4_nvswitch.c
Normal file
108
src/common/nvswitch/kernel/inforom/inforom_nvl_v4_nvswitch.c
Normal file
@@ -0,0 +1,108 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2019-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "common_nvswitch.h"
|
||||
#include "inforom/inforom_nvswitch.h"
|
||||
#include "inforom/inforom_nvl_v4_nvswitch.h"
|
||||
#include "ls10/ls10.h"
|
||||
|
||||
void
|
||||
inforom_nvl_v4_update_correctable_error_rates
|
||||
(
|
||||
INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE_V4S *pState,
|
||||
NvU8 link,
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *pCounts
|
||||
)
|
||||
{
|
||||
NvU32 i;
|
||||
NvU32 tempFlitCrc, tempRxLinkReplay, tempTxLinkReplay, tempLinkRecovery;
|
||||
NvU32 tempLaneCrc[4];
|
||||
|
||||
//
|
||||
// If the registers have decreased from last reported, then
|
||||
// they must have been reset or have overflowed. Set the last
|
||||
// register value to 0.
|
||||
//
|
||||
if (pCounts->flitCrc < pState->lastRead[link].flitCrc)
|
||||
{
|
||||
pState->lastRead[link].flitCrc = 0;
|
||||
}
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pState->lastRead[link].laneCrc); i++)
|
||||
{
|
||||
if (pCounts->laneCrc[i] < pState->lastRead[link].laneCrc[i])
|
||||
{
|
||||
pState->lastRead[link].laneCrc[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
// Get number of new errors since the last register read
|
||||
tempFlitCrc = pCounts->flitCrc;
|
||||
pCounts->flitCrc -= pState->lastRead[link].flitCrc;
|
||||
|
||||
// Update errors per minute with error delta
|
||||
m_inforom_nvl_get_new_errors_per_minute(pCounts->flitCrc,
|
||||
&pState->errorsPerMinute[link].flitCrc);
|
||||
|
||||
// Save the current register value for the next callback
|
||||
pState->lastRead[link].flitCrc = tempFlitCrc;
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pState->lastRead[link].laneCrc); i++)
|
||||
{
|
||||
tempLaneCrc[i] = pCounts->laneCrc[i];
|
||||
pCounts->laneCrc[i] -= pState->lastRead[link].laneCrc[i];
|
||||
m_inforom_nvl_get_new_errors_per_minute(pCounts->laneCrc[i],
|
||||
&pState->errorsPerMinute[link].laneCrc[i]);
|
||||
|
||||
pState->lastRead[link].laneCrc[i] = tempLaneCrc[i];
|
||||
}
|
||||
|
||||
//
|
||||
// We don't track rates for the following errors. We just need to stash
|
||||
// the current register value and update pCounts with the delta since
|
||||
// the last register read.
|
||||
//
|
||||
if (pCounts->rxLinkReplay < pState->lastRead[link].rxLinkReplay)
|
||||
{
|
||||
pState->lastRead[link].rxLinkReplay = 0;
|
||||
}
|
||||
tempRxLinkReplay = pCounts->rxLinkReplay;
|
||||
pCounts->rxLinkReplay -= pState->lastRead[link].rxLinkReplay;
|
||||
pState->lastRead[link].rxLinkReplay = tempRxLinkReplay;
|
||||
|
||||
if (pCounts->txLinkReplay < pState->lastRead[link].txLinkReplay)
|
||||
{
|
||||
pState->lastRead[link].txLinkReplay = 0;
|
||||
}
|
||||
tempTxLinkReplay = pCounts->txLinkReplay;
|
||||
pCounts->txLinkReplay -= pState->lastRead[link].txLinkReplay;
|
||||
pState->lastRead[link].txLinkReplay = tempTxLinkReplay;
|
||||
|
||||
if (pCounts->linkRecovery < pState->lastRead[link].linkRecovery)
|
||||
{
|
||||
pState->lastRead[link].linkRecovery = 0;
|
||||
}
|
||||
tempLinkRecovery = pCounts->linkRecovery;
|
||||
pCounts->linkRecovery -= pState->lastRead[link].linkRecovery;
|
||||
pState->lastRead[link].linkRecovery = tempLinkRecovery;
|
||||
}
|
||||
@@ -516,6 +516,7 @@ _nvswitch_inforom_read_file
|
||||
fsRet = *(NvU32*)pDmaBuf;
|
||||
if (fsRet != NV_OK)
|
||||
{
|
||||
status = -NVL_IO_ERROR;
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: FS error %x. Filename: %3s\n", __FUNCTION__, fsRet,
|
||||
pParams->fileName);
|
||||
}
|
||||
@@ -613,6 +614,7 @@ _nvswitch_inforom_write_file
|
||||
fsRet = *(NvU32*)pDmaBuf;
|
||||
if (fsRet != NV_OK)
|
||||
{
|
||||
status = -NVL_IO_ERROR;
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: FS returned %x. Filename: %3s\n", __FUNCTION__, fsRet,
|
||||
pParams->fileName);
|
||||
}
|
||||
@@ -623,11 +625,6 @@ ifr_dma_unmap_and_exit:
|
||||
ifr_dma_free_and_exit:
|
||||
nvswitch_os_free_contig_memory(device->os_handle, pDmaBuf, transferSize);
|
||||
|
||||
if (status != NV_OK)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
@@ -31,12 +31,14 @@
|
||||
#include "nvswitch/lr10/dev_pmgr.h"
|
||||
#include "nvVer.h"
|
||||
#include "regkey_nvswitch.h"
|
||||
#include "inforom/inforom_nvl_v3_nvswitch.h"
|
||||
|
||||
//
|
||||
// TODO: Split individual object hals to their own respective files
|
||||
//
|
||||
static void _oms_parse(nvswitch_device *device, INFOROM_OMS_STATE *pOmsState);
|
||||
static void _oms_refresh(nvswitch_device *device, INFOROM_OMS_STATE *pOmsState);
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvl_log_error_event_lr10
|
||||
(
|
||||
@@ -46,7 +48,147 @@ nvswitch_inforom_nvl_log_error_event_lr10
|
||||
NvBool *bDirty
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
NvlStatus status;
|
||||
INFOROM_NVL_OBJECT_V3S *pNvlObject = &((PINFOROM_NVL_OBJECT)pNvlGeneric)->v3s;
|
||||
INFOROM_NVLINK_ERROR_EVENT *pErrorEvent = (INFOROM_NVLINK_ERROR_EVENT *)pNvlErrorEvent;
|
||||
INFOROM_NVL_OBJECT_V3_ERROR_ENTRY *pErrorEntry;
|
||||
NvU32 i;
|
||||
NvU32 sec;
|
||||
NvU8 header = 0;
|
||||
NvU16 metadata = 0;
|
||||
NvU8 errorSubtype;
|
||||
NvU64 accumTotalCount;
|
||||
INFOROM_NVL_ERROR_BLOCK_TYPE blockType;
|
||||
|
||||
if (pErrorEvent->nvliptInstance > INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u NVLIPTs (NVLIPT = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX, pErrorEvent->nvliptInstance);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (pErrorEvent->localLinkIdx > INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u internal links (internal link = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX, pErrorEvent->localLinkIdx);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
sec = (NvU32) (nvswitch_os_get_platform_time_epoch() / NVSWITCH_INTERVAL_1SEC_IN_NS);
|
||||
|
||||
status = inforom_nvl_v3_map_error(pErrorEvent->error, &header, &metadata,
|
||||
&errorSubtype, &blockType);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
metadata = FLD_SET_DRF_NUM(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA,
|
||||
_NVLIPT_INSTANCE_ID, pErrorEvent->nvliptInstance, metadata);
|
||||
if (blockType == INFOROM_NVL_ERROR_BLOCK_TYPE_DL)
|
||||
{
|
||||
metadata = FLD_SET_DRF_NUM(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID,
|
||||
NV_INFOROM_NVL_OBJECT_V3_ERROR_METADATA_BLOCK_ID_DL(pErrorEvent->localLinkIdx),
|
||||
metadata);
|
||||
}
|
||||
else if (blockType == INFOROM_NVL_ERROR_BLOCK_TYPE_TLC)
|
||||
{
|
||||
metadata = FLD_SET_DRF_NUM(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID,
|
||||
NV_INFOROM_NVL_OBJECT_V3_ERROR_METADATA_BLOCK_ID_TLC(pErrorEvent->localLinkIdx),
|
||||
metadata);
|
||||
}
|
||||
else if (blockType == INFOROM_NVL_ERROR_BLOCK_TYPE_NVLIPT)
|
||||
{
|
||||
metadata = FLD_SET_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA,
|
||||
_BLOCK_ID, _NVLIPT, metadata);
|
||||
status = inforom_nvl_v3_encode_nvlipt_error_subtype(pErrorEvent->localLinkIdx,
|
||||
&errorSubtype);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < INFOROM_NVL_OBJECT_V3S_NUM_ERROR_ENTRIES; i++)
|
||||
{
|
||||
pErrorEntry = &pNvlObject->errorLog[i];
|
||||
|
||||
if ((pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_INVALID) ||
|
||||
((pErrorEntry->metadata == metadata) &&
|
||||
(pErrorEntry->errorSubtype == errorSubtype)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (i >= INFOROM_NVL_OBJECT_V3S_NUM_ERROR_ENTRIES)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: NVL error log is full -- unable to log error\n",
|
||||
__FUNCTION__);
|
||||
return -NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
if (pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_INVALID)
|
||||
{
|
||||
pErrorEntry->header = header;
|
||||
pErrorEntry->metadata = metadata;
|
||||
pErrorEntry->errorSubtype = errorSubtype;
|
||||
}
|
||||
|
||||
if (pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_ACCUM)
|
||||
{
|
||||
accumTotalCount = NvU64_ALIGN32_VAL(&pErrorEntry->data.accum.totalCount);
|
||||
if (accumTotalCount != NV_U64_MAX)
|
||||
{
|
||||
if (pErrorEvent->count > NV_U64_MAX - accumTotalCount)
|
||||
{
|
||||
accumTotalCount = NV_U64_MAX;
|
||||
}
|
||||
else
|
||||
{
|
||||
accumTotalCount += pErrorEvent->count;
|
||||
}
|
||||
|
||||
NvU64_ALIGN32_PACK(&pErrorEntry->data.accum.totalCount, &accumTotalCount);
|
||||
if (sec < pErrorEntry->data.accum.lastUpdated)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: System clock reporting earlier time than error timestamp\n",
|
||||
__FUNCTION__);
|
||||
}
|
||||
pErrorEntry->data.accum.lastUpdated = sec;
|
||||
*bDirty = NV_TRUE;
|
||||
}
|
||||
}
|
||||
else if (pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_COUNT)
|
||||
{
|
||||
if (pErrorEntry->data.event.totalCount != NV_U32_MAX)
|
||||
{
|
||||
pErrorEntry->data.event.totalCount++;
|
||||
if (sec < pErrorEntry->data.event.lastError)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: System clock reporting earlier time than error timestamp\n",
|
||||
__FUNCTION__);
|
||||
}
|
||||
else
|
||||
{
|
||||
pErrorEntry->data.event.avgEventDelta =
|
||||
(pErrorEntry->data.event.avgEventDelta + sec -
|
||||
pErrorEntry->data.event.lastError) >> 1;
|
||||
}
|
||||
pErrorEntry->data.event.lastError = sec;
|
||||
*bDirty = NV_TRUE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
return -NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
@@ -56,7 +198,37 @@ nvswitch_inforom_nvl_get_max_correctable_error_rate_lr10
|
||||
NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS *params
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
NvU8 linkID = params->linkId;
|
||||
|
||||
if (linkID >= NVSWITCH_NUM_LINKS_LR10)
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
nvswitch_os_memset(params, 0, sizeof(NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS));
|
||||
params->linkId = linkID;
|
||||
|
||||
nvswitch_os_memcpy(¶ms->dailyMaxCorrectableErrorRates, &pNvlinkState->pNvl->v3s.maxCorrectableErrorRates.dailyMaxCorrectableErrorRates[0][linkID],
|
||||
sizeof(params->dailyMaxCorrectableErrorRates));
|
||||
|
||||
nvswitch_os_memcpy(¶ms->monthlyMaxCorrectableErrorRates, &pNvlinkState->pNvl->v3s.maxCorrectableErrorRates.monthlyMaxCorrectableErrorRates[0][linkID],
|
||||
sizeof(params->monthlyMaxCorrectableErrorRates));
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
@@ -66,8 +238,64 @@ nvswitch_inforom_nvl_get_errors_lr10
|
||||
NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *params
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
NvU32 maxReadSize = sizeof(params->errorLog)/sizeof(NVSWITCH_NVLINK_ERROR_ENTRY);
|
||||
NvU32 errorLeftCount = 0, errorReadCount = 0, errIndx = 0;
|
||||
NvU32 errorStart = params->errorIndex;
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
if (errorStart >= INFOROM_NVL_OBJECT_V3S_NUM_ERROR_ENTRIES)
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
nvswitch_os_memset(params->errorLog, 0, sizeof(params->errorLog));
|
||||
|
||||
while (((errorStart + errorLeftCount) < INFOROM_NVL_OBJECT_V3S_NUM_ERROR_ENTRIES) &&
|
||||
(pNvlinkState->pNvl->v3s.errorLog[errorStart + errorLeftCount].header != INFOROM_NVL_ERROR_TYPE_INVALID))
|
||||
{
|
||||
errorLeftCount++;
|
||||
}
|
||||
|
||||
if (errorLeftCount > maxReadSize)
|
||||
{
|
||||
errorReadCount = maxReadSize;
|
||||
}
|
||||
else
|
||||
{
|
||||
errorReadCount = errorLeftCount;
|
||||
}
|
||||
|
||||
params->errorIndex = errorStart + errorReadCount;
|
||||
params->errorCount = errorReadCount;
|
||||
|
||||
if (errorReadCount > 0)
|
||||
{
|
||||
for (errIndx = 0; errIndx < errorReadCount; errIndx++)
|
||||
{
|
||||
if (inforom_nvl_v3_map_error_to_userspace_error(device,
|
||||
&pNvlinkState->pNvl->v3s.errorLog[errorStart+errIndx],
|
||||
¶ms->errorLog[errIndx]) != NVL_SUCCESS)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_update_link_correctable_error_info_lr10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
@@ -79,9 +307,251 @@ NvlStatus nvswitch_inforom_nvl_update_link_correctable_error_info_lr10
|
||||
void *pNvlErrorCounts,
|
||||
NvBool *bDirty
|
||||
)
|
||||
{
|
||||
INFOROM_NVL_OBJECT_V3S *pNvlObject = &((PINFOROM_NVL_OBJECT)pNvlGeneric)->v3s;
|
||||
INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE_V3S *pState =
|
||||
&((INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE *)pData)->v3s;
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *pErrorCounts =
|
||||
(INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *)pNvlErrorCounts;
|
||||
|
||||
NvU32 i;
|
||||
NvU32 sec;
|
||||
NvU32 day, month, currentEntryDay, currentEntryMonth;
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pErrorRate;
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pOldestErrorRate = NULL;
|
||||
INFOROM_NVL_OBJECT_V3S_MAX_CORRECTABLE_ERROR_RATES *pCorrErrorRates;
|
||||
NvBool bUpdated = NV_FALSE;
|
||||
INFOROM_NVLINK_ERROR_EVENT errorEvent;
|
||||
NvU32 currentFlitCrcRate;
|
||||
NvU32 *pCurrentLaneCrcRates;
|
||||
|
||||
if (bDirty == NULL)
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
*bDirty = NV_FALSE;
|
||||
|
||||
if (linkId >= INFOROM_NVL_OBJECT_V3S_NUM_LINKS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object does not store data for more than %u links (linkId = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3S_NUM_LINKS, linkId);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (nvliptInstance > INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u NVLIPTs (NVLIPT = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX, nvliptInstance);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (localLinkIdx > INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u internal links (internal link = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX, localLinkIdx);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
sec = (NvU32) (nvswitch_os_get_platform_time_epoch() / NVSWITCH_INTERVAL_1SEC_IN_NS);
|
||||
inforom_nvl_v3_seconds_to_day_and_month(sec, &day, &month);
|
||||
|
||||
inforom_nvl_v3_update_correctable_error_rates(pState, linkId, pErrorCounts);
|
||||
currentFlitCrcRate = pState->errorsPerMinute[linkId].flitCrc;
|
||||
pCurrentLaneCrcRates = pState->errorsPerMinute[linkId].laneCrc;
|
||||
pCorrErrorRates = &pNvlObject->maxCorrectableErrorRates;
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pCorrErrorRates->dailyMaxCorrectableErrorRates); i++)
|
||||
{
|
||||
pErrorRate = &pCorrErrorRates->dailyMaxCorrectableErrorRates[i][linkId];
|
||||
inforom_nvl_v3_seconds_to_day_and_month(pErrorRate->lastUpdated, ¤tEntryDay,
|
||||
¤tEntryMonth);
|
||||
|
||||
if ((pErrorRate->lastUpdated == 0) || (currentEntryDay == day))
|
||||
{
|
||||
if (inforom_nvl_v3_should_replace_error_rate_entry(pErrorRate,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates))
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
pOldestErrorRate = NULL;
|
||||
break;
|
||||
}
|
||||
else if ((pOldestErrorRate == NULL) ||
|
||||
(pErrorRate->lastUpdated < pOldestErrorRate->lastUpdated))
|
||||
{
|
||||
pOldestErrorRate = pErrorRate;
|
||||
}
|
||||
}
|
||||
|
||||
if (pOldestErrorRate != NULL)
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pOldestErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pCorrErrorRates->monthlyMaxCorrectableErrorRates); i++)
|
||||
{
|
||||
pErrorRate = &pCorrErrorRates->monthlyMaxCorrectableErrorRates[i][linkId];
|
||||
inforom_nvl_v3_seconds_to_day_and_month(pErrorRate->lastUpdated, ¤tEntryDay,
|
||||
¤tEntryMonth);
|
||||
|
||||
if ((pErrorRate->lastUpdated == 0) || (currentEntryMonth == month))
|
||||
{
|
||||
if (inforom_nvl_v3_should_replace_error_rate_entry(pErrorRate,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates))
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
pOldestErrorRate = NULL;
|
||||
break;
|
||||
}
|
||||
else if ((pOldestErrorRate == NULL) ||
|
||||
(pErrorRate->lastUpdated < pOldestErrorRate->lastUpdated))
|
||||
{
|
||||
pOldestErrorRate = pErrorRate;
|
||||
}
|
||||
}
|
||||
|
||||
if (pOldestErrorRate != NULL)
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pOldestErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
|
||||
*bDirty = bUpdated;
|
||||
|
||||
// Update aggregate error counts for each correctable error
|
||||
|
||||
errorEvent.nvliptInstance = nvliptInstance;
|
||||
errorEvent.localLinkIdx = localLinkIdx;
|
||||
|
||||
if (pErrorCounts->flitCrc > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_RX_FLIT_CRC_CORR;
|
||||
errorEvent.count = pErrorCounts->flitCrc;
|
||||
nvswitch_inforom_nvl_log_error_event_lr10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
if (pErrorCounts->rxLinkReplay > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_RX_LINK_REPLAY_EVENTS_CORR;
|
||||
errorEvent.count = pErrorCounts->rxLinkReplay;
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_lr10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
if (pErrorCounts->txLinkReplay > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_TX_LINK_REPLAY_EVENTS_CORR;
|
||||
errorEvent.count = pErrorCounts->txLinkReplay;
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_lr10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
if (pErrorCounts->linkRecovery > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_LINK_RECOVERY_EVENTS_CORR;
|
||||
errorEvent.count = pErrorCounts->linkRecovery;
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_lr10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
{
|
||||
if (pErrorCounts->laneCrc[i] == 0)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
errorEvent.error = INFOROM_NVLINK_DL_RX_LANE0_CRC_CORR + i;
|
||||
errorEvent.count = pErrorCounts->laneCrc[i];
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_lr10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setL1Threshold_lr10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 word1,
|
||||
NvU32 word2
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_getL1Threshold_lr10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 *word1,
|
||||
NvU32 *word2
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setup_nvlink_state_lr10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
INFOROM_NVLINK_STATE *pNvlinkState,
|
||||
NvU8 version
|
||||
)
|
||||
{
|
||||
if (version != 3)
|
||||
{
|
||||
NVSWITCH_PRINT(device, WARN, "NVL v%u not supported\n", version);
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState->pFmt = INFOROM_NVL_OBJECT_V3S_FMT;
|
||||
pNvlinkState->pPackedObject = nvswitch_os_malloc(INFOROM_NVL_OBJECT_V3S_PACKED_SIZE);
|
||||
if (pNvlinkState->pPackedObject == NULL)
|
||||
{
|
||||
return -NVL_NO_MEM;
|
||||
}
|
||||
|
||||
pNvlinkState->pNvl = nvswitch_os_malloc(sizeof(INFOROM_NVL_OBJECT));
|
||||
if (pNvlinkState->pNvl == NULL)
|
||||
{
|
||||
nvswitch_os_free(pNvlinkState->pPackedObject);
|
||||
return -NVL_NO_MEM;
|
||||
}
|
||||
|
||||
pNvlinkState->bDisableCorrectableErrorLogging = NV_FALSE;
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
static
|
||||
NvlStatus
|
||||
_inforom_ecc_find_useable_entry_index
|
||||
|
||||
@@ -3492,11 +3492,16 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_0_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
pending = report.raw_pending & report.mask;
|
||||
if (pending == 0)
|
||||
{
|
||||
@@ -3505,6 +3510,7 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_0_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXRSPSTATUS_PRIV_ERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
@@ -3512,6 +3518,11 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_0_lr10
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_RX_LNK_RXRSPSTATUS_PRIV_ERR, "RX Rsp Status PRIV Error");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_RX_LNK, _ERR_REPORT_INJECT_0, _RXRSPSTATUS_PRIV_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSP_STATUS_PRIV_ERR_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -3544,12 +3555,17 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -3557,12 +3573,20 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _CREQ_RAM_DAT_ECC_DBE_ERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_CREQ_RAM_DAT_ECC_DBE_ERR, "CREQ RAM DAT ECC DBE Error");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_TX_LNK, _ERR_REPORT_INJECT_0, _CREQ_RAM_DAT_ECC_DBE_ERR, 0x0, injected))
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_CREQ_DAT_RAM_ECC_DBE_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _CREQ_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -3591,6 +3615,13 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_COM_RAM_DAT_ECC_DBE_ERR, "COM RAM DAT ECC DBE Error");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_TX_LNK, _ERR_REPORT_INJECT_0, _COM_RAM_DAT_ECC_DBE_ERR, 0x0, injected))
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_COM_DAT_RAM_ECC_DBE_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _COM_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -3642,14 +3673,19 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_1_lr10
|
||||
NvU32 link
|
||||
)
|
||||
{
|
||||
NvU32 pending, bit, unhandled, injected;
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_1);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_NON_FATAL_REPORT_EN_1);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -3667,6 +3703,8 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_1_lr10
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_1, _AN1_HEARTBEAT_TIMEOUT_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_AN1_HEARTBEAT_TIMEOUT_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
//
|
||||
// WAR Bug 200627368: Mask off HBTO to avoid a storm
|
||||
// During the start of reset_and_drain, all links on the GPU
|
||||
@@ -3719,12 +3757,17 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_STATUS_1);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_1);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -3732,12 +3775,19 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_FIRST_1);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_REPORT_INJECT_1);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC0, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC0, "AN1 Timeout VC0");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC0, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC0_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC1, 1);
|
||||
@@ -3745,6 +3795,12 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC1, "AN1 Timeout VC1");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC1, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC1_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC2, 1);
|
||||
@@ -3752,6 +3808,12 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC2, "AN1 Timeout VC2");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC2, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC2_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC3, 1);
|
||||
@@ -3760,6 +3822,11 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC3, "AN1 Timeout VC3");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC3, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC3_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC4, 1);
|
||||
@@ -3768,6 +3835,11 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC4, "AN1 Timeout VC4");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC4, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC4_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC5, 1);
|
||||
@@ -3775,6 +3847,12 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC5, "AN1 Timeout VC5");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC5, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC5_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC6, 1);
|
||||
@@ -3782,6 +3860,12 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC6, "AN1 Timeout VC6");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC6, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC6_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _AN1_TIMEOUT_VC7, 1);
|
||||
@@ -3789,6 +3873,12 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC7, "AN1 Timeout VC7");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_1, _AN1_TIMEOUT_VC7, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC7_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -3890,11 +3980,16 @@ _nvswitch_service_nvlipt_lnk_nonfatal_lr10
|
||||
{
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit, unhandled;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
pending = report.raw_pending & report.mask;
|
||||
if (pending == 0)
|
||||
{
|
||||
@@ -3903,12 +3998,19 @@ _nvswitch_service_nvlipt_lnk_nonfatal_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _ILLEGALLINKSTATEREQUEST, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_ILLEGALLINKSTATEREQUEST, "_HW_NVLIPT_LNK_ILLEGALLINKSTATEREQUEST");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _ILLEGALLINKSTATEREQUEST, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_ILLEGAL_LINK_STATE_REQUEST_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _FAILEDMINIONREQUEST, 1);
|
||||
@@ -3916,6 +4018,12 @@ _nvswitch_service_nvlipt_lnk_nonfatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_FAILEDMINIONREQUEST, "_FAILEDMINIONREQUEST");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _FAILEDMINIONREQUEST, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_FAILED_MINION_REQUEST_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _RESERVEDREQUESTVALUE, 1);
|
||||
@@ -3923,6 +4031,12 @@ _nvswitch_service_nvlipt_lnk_nonfatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_RESERVEDREQUESTVALUE, "_RESERVEDREQUESTVALUE");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _RESERVEDREQUESTVALUE, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RESERVED_REQUEST_VALUE_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _LINKSTATEWRITEWHILEBUSY, 1);
|
||||
@@ -3930,6 +4044,12 @@ _nvswitch_service_nvlipt_lnk_nonfatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_LINKSTATEWRITEWHILEBUSY, "_LINKSTATEWRITEWHILEBUSY");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _LINKSTATEWRITEWHILEBUSY, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_LINK_STATE_WRITE_WHILE_BUSY_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _LINK_STATE_REQUEST_TIMEOUT, 1);
|
||||
@@ -3937,6 +4057,12 @@ _nvswitch_service_nvlipt_lnk_nonfatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_LINK_STATE_REQUEST_TIMEOUT, "_LINK_STATE_REQUEST_TIMEOUT");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _LINK_STATE_REQUEST_TIMEOUT, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_LINK_STATE_REQUEST_TIMEOUT_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _WRITE_TO_LOCKED_SYSTEM_REG_ERR, 1);
|
||||
@@ -3944,6 +4070,12 @@ _nvswitch_service_nvlipt_lnk_nonfatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_WRITE_TO_LOCKED_SYSTEM_REG_ERR, "_WRITE_TO_LOCKED_SYSTEM_REG_ERR");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _WRITE_TO_LOCKED_SYSTEM_REG_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_WRITE_TO_LOCKED_SYSTEM_REG_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -4456,12 +4588,16 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLDL, _NVLDL_TOP, _INTR);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLDL, _NVLDL_TOP, _INTR_STALL_EN);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4474,6 +4610,8 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_TX_FAULT_RAM, "TX Fault Ram", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_TX_FAULT_RAM_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _TX_FAULT_INTERFACE, 1);
|
||||
@@ -4481,6 +4619,8 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_TX_FAULT_INTERFACE, "TX Fault Interface", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_TX_FAULT_INTERFACE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _TX_FAULT_SUBLINK_CHANGE, 1);
|
||||
@@ -4488,6 +4628,8 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_TX_FAULT_SUBLINK_CHANGE, "TX Fault Sublink Change", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_TX_FAULT_SUBLINK_CHANGE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _RX_FAULT_SUBLINK_CHANGE, 1);
|
||||
@@ -4495,6 +4637,8 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_RX_FAULT_SUBLINK_CHANGE, "RX Fault Sublink Change", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_RX_FAULT_SUBLINK_CHANGE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _RX_FAULT_DL_PROTOCOL, 1);
|
||||
@@ -4502,6 +4646,8 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_RX_FAULT_DL_PROTOCOL, "RX Fault DL Protocol", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_RX_FAULT_DL_PROTOCOL_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _LTSSM_FAULT_DOWN, 1);
|
||||
@@ -4509,6 +4655,8 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_LTSSM_FAULT_DOWN, "LTSSM Fault Down", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_LTSSM_FAULT_DOWN_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _LTSSM_FAULT_UP, 1);
|
||||
@@ -4516,6 +4664,8 @@ nvswitch_service_nvldl_fatal_link_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_LTSSM_FAULT_UP, "LTSSM Fault Up", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_LTSSM_FAULT_UP_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _LTSSM_PROTOCOL, 1);
|
||||
@@ -4621,12 +4771,17 @@ _nvswitch_service_nvltlc_tx_sys_fatal_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_SYS, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_SYS, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4634,12 +4789,19 @@ _nvswitch_service_nvltlc_tx_sys_fatal_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_SYS, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_SYS, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_SYS, _ERR_STATUS_0, _NCISOC_PARITY_ERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TX_SYS_NCISOC_PARITY_ERR, "NCISOC Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_SYS_ERR_REPORT_INJECT_0, _NCISOC_PARITY_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_NCISOC_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_SYS, _ERR_STATUS_0, _NCISOC_HDR_ECC_DBE_ERR, 1);
|
||||
@@ -4647,6 +4809,12 @@ _nvswitch_service_nvltlc_tx_sys_fatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TX_SYS_NCISOC_HDR_ECC_DBE_ERR, "NCISOC HDR ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_SYS_ERR_REPORT_INJECT_0, _NCISOC_HDR_ECC_DBE_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_NCISOC_HDR_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_SYS, _ERR_STATUS_0, _NCISOC_DAT_ECC_DBE_ERR, 1);
|
||||
@@ -4729,12 +4897,17 @@ _nvswitch_service_nvltlc_rx_sys_fatal_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4742,6 +4915,7 @@ _nvswitch_service_nvltlc_rx_sys_fatal_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _NCISOC_PARITY_ERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
@@ -4755,6 +4929,13 @@ _nvswitch_service_nvltlc_rx_sys_fatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_HDR_RAM_ECC_DBE_ERR, "HDR RAM ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_RX_SYS, _ERR_REPORT_INJECT_0, _HDR_RAM_ECC_DBE_ERR, 0x0, injected))
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_HDR_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _HDR_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -4769,6 +4950,13 @@ _nvswitch_service_nvltlc_rx_sys_fatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_DAT0_RAM_ECC_DBE_ERR, "DAT0 RAM ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_RX_SYS, _ERR_REPORT_INJECT_0, _DAT0_RAM_ECC_DBE_ERR, 0x0, injected))
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DAT0_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _DAT0_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -4783,6 +4971,13 @@ _nvswitch_service_nvltlc_rx_sys_fatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_DAT1_RAM_ECC_DBE_ERR, "DAT1 RAM ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_RX_SYS, _ERR_REPORT_INJECT_0, _DAT1_RAM_ECC_DBE_ERR, 0x0, injected))
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DAT1_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _DAT1_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -4830,12 +5025,17 @@ _nvswitch_service_nvltlc_tx_lnk_fatal_0_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4843,12 +5043,19 @@ _nvswitch_service_nvltlc_tx_lnk_fatal_0_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _TXDLCREDITPARITYERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TXDLCREDITPARITYERR, "TX DL Credit Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _TX_LNK_ERR_REPORT_INJECT_0, _TXDLCREDITPARITYERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_DL_CREDIT_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _CREQ_RAM_HDR_ECC_DBE_ERR, 1);
|
||||
@@ -4884,6 +5091,13 @@ _nvswitch_service_nvltlc_tx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TX_LNK_RSP1_RAM_DAT_ECC_DBE_ERR, "RSP1 RAM DAT ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_TX_LNK, _ERR_REPORT_INJECT_0, _RSP1_RAM_DAT_ECC_DBE_ERR, 0x0, injected))
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_RSP1_DAT_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -4923,11 +5137,17 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4935,12 +5155,19 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXDLHDRPARITYERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDLHDRPARITYERR, "RX DL HDR Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXDLHDRPARITYERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DL_HDR_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXDLDATAPARITYERR, 1);
|
||||
@@ -4948,6 +5175,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDLDATAPARITYERR, "RX DL Data Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXDLDATAPARITYERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DL_DATA_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXDLCTRLPARITYERR, 1);
|
||||
@@ -4955,6 +5188,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDLCTRLPARITYERR, "RX DL Ctrl Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXDLCTRLPARITYERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DL_CTRL_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXINVALIDAEERR, 1);
|
||||
@@ -4962,6 +5201,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXINVALIDAEERR, "RX Invalid DAE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXINVALIDAEERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_AE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXINVALIDBEERR, 1);
|
||||
@@ -4969,6 +5214,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXINVALIDBEERR, "RX Invalid BE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXINVALIDBEERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_BE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXINVALIDADDRALIGNERR, 1);
|
||||
@@ -4976,6 +5227,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXINVALIDADDRALIGNERR, "RX Invalid Addr Align Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXINVALIDADDRALIGNERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_ADDR_ALIGN_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXPKTLENERR, 1);
|
||||
@@ -4983,6 +5240,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXPKTLENERR, "RX Packet Length Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXPKTLENERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_PKTLEN_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RSVCMDENCERR, 1);
|
||||
@@ -4990,6 +5253,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RSVCMDENCERR, "RSV Cmd Encoding Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RSVCMDENCERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSVD_CMD_ENC_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RSVDATLENENCERR, 1);
|
||||
@@ -4997,6 +5266,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RSVDATLENENCERR, "RSV Data Length Encoding Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RSVDATLENENCERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSVD_DAT_LEN_ENC_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RSVPKTSTATUSERR, 1);
|
||||
@@ -5004,6 +5279,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RSVPKTSTATUSERR, "RSV Packet Status Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RSVPKTSTATUSERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSVD_PACKET_STATUS_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RSVCACHEATTRPROBEREQERR, 1);
|
||||
@@ -5011,6 +5292,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RSVCACHEATTRPROBEREQERR, "RSV Packet Status Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RSVCACHEATTRPROBEREQERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSVD_CACHE_ATTR_PROBE_REQ_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RSVCACHEATTRPROBERSPERR, 1);
|
||||
@@ -5018,6 +5305,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RSVCACHEATTRPROBERSPERR, "RSV CacheAttr Probe Rsp Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RSVCACHEATTRPROBERSPERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSVD_CACHE_ATTR_PROBE_RSP_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _DATLENGTRMWREQMAXERR, 1);
|
||||
@@ -5025,6 +5318,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_DATLENGTRMWREQMAXERR, "Data Length RMW Req Max Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _DATLENGTRMWREQMAXERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DATLEN_GT_RMW_REQ_MAX_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _DATLENLTATRRSPMINERR, 1);
|
||||
@@ -5032,6 +5331,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_DATLENLTATRRSPMINERR, "Data Len Lt ATR RSP Min Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _DATLENLTATRRSPMINERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DATLEN_LT_ATR_RSP_MIN_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _INVALIDCACHEATTRPOERR, 1);
|
||||
@@ -5039,6 +5344,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_INVALIDCACHEATTRPOERR, "Invalid Cache Attr PO Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _INVALIDCACHEATTRPOERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_PO_FOR_CACHE_ATTR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _INVALIDCRERR, 1);
|
||||
@@ -5046,6 +5357,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_INVALIDCRERR, "Invalid CR Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _INVALIDCRERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_CR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXRSPSTATUS_HW_ERR, 1);
|
||||
@@ -5053,6 +5370,13 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_LNK_RXRSPSTATUS_HW_ERR, "RX Rsp Status HW Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
// TODO 200564153 _RX_RSPSTATUS_HW_ERR should be reported as non-fatal
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXRSPSTATUS_HW_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSP_STATUS_HW_ERR_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXRSPSTATUS_UR_ERR, 1);
|
||||
@@ -5060,6 +5384,13 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_LNK_RXRSPSTATUS_UR_ERR, "RX Rsp Status UR Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
// TODO 200564153 _RX_RSPSTATUS_UR_ERR should be reported as non-fatal
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _RXRSPSTATUS_UR_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSP_STATUS_UR_ERR_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _INVALID_COLLAPSED_RESPONSE_ERR, 1);
|
||||
@@ -5067,6 +5398,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_LNK_INVALID_COLLAPSED_RESPONSE_ERR, "Invalid Collapsed Response Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_0, _INVALID_COLLAPSED_RESPONSE_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_COLLAPSED_RESPONSE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -5106,12 +5443,17 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_lr10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_1);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FATAL_REPORT_EN_1);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -5119,12 +5461,19 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_lr10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FIRST_1);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_REPORT_INJECT_1);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _RXHDROVFERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXHDROVFERR, "RX HDR OVF Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_1, _RXHDROVFERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_HDR_OVERFLOW_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _RXDATAOVFERR, 1);
|
||||
@@ -5132,6 +5481,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDATAOVFERR, "RX Data OVF Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_1, _RXDATAOVFERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DATA_OVERFLOW_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _STOMPDETERR, 1);
|
||||
@@ -5139,6 +5494,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_STOMPDETERR, "Stomp Det Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_1, _STOMPDETERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_STOMP_DETECTED_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _RXPOISONERR, 1);
|
||||
@@ -5253,6 +5614,8 @@ _nvswitch_service_nvlipt_common_fatal_lr10
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit, contain, unhandled;
|
||||
NvU32 link, local_link_idx;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_NVLIPT_RD32_LR10(device, instance, _NVLIPT_COMMON, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_NVLIPT_RD32_LR10(device, instance, _NVLIPT_COMMON, _ERR_FATAL_REPORT_EN_0);
|
||||
@@ -5267,9 +5630,12 @@ _nvswitch_service_nvlipt_common_fatal_lr10
|
||||
return -NVL_NOT_FOUND;
|
||||
}
|
||||
|
||||
error_event.nvliptInstance = (NvU8) instance;
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_NVLIPT_RD32_LR10(device, instance, _NVLIPT_COMMON, _ERR_FIRST_0);
|
||||
contain = NVSWITCH_NVLIPT_RD32_LR10(device, instance, _NVLIPT_COMMON, _ERR_CONTAIN_EN_0);
|
||||
injected = NVSWITCH_NVLIPT_RD32_LR10(device, instance, _NVLIPT_COMMON, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_COMMON, _ERR_STATUS_0, _CLKCTL_ILLEGAL_REQUEST, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
@@ -5284,6 +5650,12 @@ _nvswitch_service_nvlipt_common_fatal_lr10
|
||||
}
|
||||
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_COMMON, _ERR_REPORT_INJECT_0, _CLKCTL_ILLEGAL_REQUEST, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_CLKCTL_ILLEGAL_REQUEST_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_COMMON, _ERR_STATUS_0, _RSTSEQ_PLL_TIMEOUT, 1);
|
||||
@@ -5299,6 +5671,12 @@ _nvswitch_service_nvlipt_common_fatal_lr10
|
||||
}
|
||||
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_COMMON, _ERR_REPORT_INJECT_0, _RSTSEQ_PLL_TIMEOUT, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RSTSEQ_PLL_TIMEOUT_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_COMMON, _ERR_STATUS_0, _RSTSEQ_PHYARB_TIMEOUT, 1);
|
||||
@@ -5314,6 +5692,12 @@ _nvswitch_service_nvlipt_common_fatal_lr10
|
||||
}
|
||||
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_COMMON, _ERR_REPORT_INJECT_0, _RSTSEQ_PHYARB_TIMEOUT, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RSTSEQ_PHYARB_TIMEOUT_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -5360,6 +5744,8 @@ _nvswitch_service_nvlipt_lnk_fatal_lr10
|
||||
{
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit, unhandled;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_FATAL_REPORT_EN_0);
|
||||
@@ -5371,14 +5757,24 @@ _nvswitch_service_nvlipt_lnk_fatal_lr10
|
||||
return -NVL_NOT_FOUND;
|
||||
}
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LR10(link);
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_FIRST_0);
|
||||
injected = NVSWITCH_LINK_RD32_LR10(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_REPORT_INJECT_0);
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _SLEEPWHILEACTIVELINK, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLIPT_LNK_SLEEPWHILEACTIVELINK, "No non-empty link is detected", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _SLEEPWHILEACTIVELINK, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_SLEEP_WHILE_ACTIVE_LINK_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _RSTSEQ_PHYCTL_TIMEOUT, 1);
|
||||
@@ -5386,6 +5782,12 @@ _nvswitch_service_nvlipt_lnk_fatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLIPT_LNK_RSTSEQ_PHYCTL_TIMEOUT, "Reset sequencer timed out waiting for a handshake from PHYCTL", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _RSTSEQ_PHYCTL_TIMEOUT, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RSTSEQ_PHYCTL_TIMEOUT_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _RSTSEQ_CLKCTL_TIMEOUT, 1);
|
||||
@@ -5393,6 +5795,12 @@ _nvswitch_service_nvlipt_lnk_fatal_lr10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLIPT_LNK_RSTSEQ_CLKCTL_TIMEOUT, "Reset sequencer timed out waiting for a handshake from CLKCTL", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLIPT_LNK, _ERR_REPORT_INJECT_0, _RSTSEQ_CLKCTL_TIMEOUT, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RSTSEQ_CLKCTL_TIMEOUT_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
|
||||
@@ -872,7 +872,7 @@ nvswitch_corelib_set_dl_link_mode_lr10
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: link #%d is still in reset, cannot change link state\n",
|
||||
__FUNCTION__, link->linkNumber);
|
||||
return -NVL_ERR_INVALID_STATE;
|
||||
return NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
val = NVSWITCH_LINK_RD32_LR10(device, link->linkNumber, NVLDL, _NVLDL_TOP, _LINK_STATE);
|
||||
|
||||
@@ -6380,6 +6380,15 @@ nvswitch_get_num_links_lr10
|
||||
return num_links;
|
||||
}
|
||||
|
||||
static NvU8
|
||||
nvswitch_get_num_links_per_nvlipt_lr10
|
||||
(
|
||||
nvswitch_device *device
|
||||
)
|
||||
{
|
||||
return NVSWITCH_LINKS_PER_NVLIPT;
|
||||
}
|
||||
|
||||
NvBool
|
||||
nvswitch_is_link_valid_lr10
|
||||
(
|
||||
@@ -6403,22 +6412,8 @@ nvswitch_ctrl_get_fom_values_lr10
|
||||
{
|
||||
NvlStatus status;
|
||||
NvU32 statData;
|
||||
nvlink_link *link;
|
||||
|
||||
link = nvswitch_get_link(device, p->linkId);
|
||||
if (link == NULL)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: link #%d invalid\n",
|
||||
__FUNCTION__, p->linkId);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (nvswitch_is_link_in_reset(device, link))
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: link #%d is in reset\n",
|
||||
__FUNCTION__, p->linkId);
|
||||
return -NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
NVSWITCH_ASSERT(p->linkId < nvswitch_get_num_links(device));
|
||||
|
||||
status = nvswitch_minion_get_dl_status(device, p->linkId,
|
||||
NV_NVLSTAT_TR16, 0, &statData);
|
||||
|
||||
@@ -30,6 +30,8 @@
|
||||
#include "rmsoecmdif.h"
|
||||
#include "flcn/flcn_nvswitch.h"
|
||||
#include "rmflcncmdif_nvswitch.h"
|
||||
#include "inforom/inforom_nvl_v3_nvswitch.h"
|
||||
#include "inforom/inforom_nvl_v4_nvswitch.h"
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvl_log_error_event_ls10
|
||||
@@ -40,7 +42,252 @@ nvswitch_inforom_nvl_log_error_event_ls10
|
||||
NvBool *bDirty
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_IMPLEMENTED;
|
||||
NvlStatus status;
|
||||
INFOROM_NVL_OBJECT_V4S *pNvlObject = &((PINFOROM_NVL_OBJECT)pNvlGeneric)->v4s;
|
||||
INFOROM_NVLINK_ERROR_EVENT *pErrorEvent = (INFOROM_NVLINK_ERROR_EVENT *)pNvlErrorEvent;
|
||||
INFOROM_NVL_OBJECT_V3_ERROR_ENTRY *pErrorEntry;
|
||||
NvU32 i;
|
||||
NvU32 sec;
|
||||
NvU8 header = 0;
|
||||
NvU16 metadata = 0;
|
||||
NvU8 errorSubtype;
|
||||
NvU64 accumTotalCount;
|
||||
INFOROM_NVL_ERROR_BLOCK_TYPE blockType;
|
||||
|
||||
if (pErrorEvent->nvliptInstance > INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u NVLIPTs (NVLIPT = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX, pErrorEvent->nvliptInstance);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (pErrorEvent->localLinkIdx > INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u internal links (internal link = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX, pErrorEvent->localLinkIdx);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
sec = (NvU32) (nvswitch_os_get_platform_time_epoch() / NVSWITCH_INTERVAL_1SEC_IN_NS);
|
||||
|
||||
status = inforom_nvl_v3_map_error(pErrorEvent->error, &header, &metadata,
|
||||
&errorSubtype, &blockType);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
|
||||
metadata = FLD_SET_DRF_NUM(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA,
|
||||
_NVLIPT_INSTANCE_ID, pErrorEvent->nvliptInstance, metadata);
|
||||
if (blockType == INFOROM_NVL_ERROR_BLOCK_TYPE_DL)
|
||||
{
|
||||
metadata = FLD_SET_DRF_NUM(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID,
|
||||
NV_INFOROM_NVL_OBJECT_V3_ERROR_METADATA_BLOCK_ID_DL(pErrorEvent->localLinkIdx),
|
||||
metadata);
|
||||
}
|
||||
else if (blockType == INFOROM_NVL_ERROR_BLOCK_TYPE_TLC)
|
||||
{
|
||||
metadata = FLD_SET_DRF_NUM(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA, _BLOCK_ID,
|
||||
NV_INFOROM_NVL_OBJECT_V3_ERROR_METADATA_BLOCK_ID_TLC(pErrorEvent->localLinkIdx),
|
||||
metadata);
|
||||
}
|
||||
else if (blockType == INFOROM_NVL_ERROR_BLOCK_TYPE_NVLIPT)
|
||||
{
|
||||
metadata = FLD_SET_DRF(_INFOROM_NVL_OBJECT_V3, _ERROR_METADATA,
|
||||
_BLOCK_ID, _NVLIPT, metadata);
|
||||
status = inforom_nvl_v3_encode_nvlipt_error_subtype(pErrorEvent->localLinkIdx,
|
||||
&errorSubtype);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
return status;
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < INFOROM_NVL_OBJECT_V4S_NUM_ERROR_ENTRIES; i++)
|
||||
{
|
||||
pErrorEntry = &pNvlObject->errorLog[i];
|
||||
|
||||
if ((pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_INVALID) ||
|
||||
((pErrorEntry->metadata == metadata) &&
|
||||
(pErrorEntry->errorSubtype == errorSubtype)))
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (i >= INFOROM_NVL_OBJECT_V4S_NUM_ERROR_ENTRIES)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: NVL error log is full -- unable to log error\n",
|
||||
__FUNCTION__);
|
||||
return -NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
if (pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_INVALID)
|
||||
{
|
||||
pErrorEntry->header = header;
|
||||
pErrorEntry->metadata = metadata;
|
||||
pErrorEntry->errorSubtype = errorSubtype;
|
||||
}
|
||||
|
||||
if (pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_ACCUM)
|
||||
{
|
||||
accumTotalCount = NvU64_ALIGN32_VAL(&pErrorEntry->data.accum.totalCount);
|
||||
if (accumTotalCount != NV_U64_MAX)
|
||||
{
|
||||
if (pErrorEvent->count > NV_U64_MAX - accumTotalCount)
|
||||
{
|
||||
accumTotalCount = NV_U64_MAX;
|
||||
}
|
||||
else
|
||||
{
|
||||
accumTotalCount += pErrorEvent->count;
|
||||
}
|
||||
|
||||
NvU64_ALIGN32_PACK(&pErrorEntry->data.accum.totalCount, &accumTotalCount);
|
||||
if (sec < pErrorEntry->data.accum.lastUpdated)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: System clock reporting earlier time than error timestamp\n",
|
||||
__FUNCTION__);
|
||||
}
|
||||
pErrorEntry->data.accum.lastUpdated = sec;
|
||||
*bDirty = NV_TRUE;
|
||||
}
|
||||
}
|
||||
else if (pErrorEntry->header == INFOROM_NVL_ERROR_TYPE_COUNT)
|
||||
{
|
||||
if (pErrorEntry->data.event.totalCount != NV_U32_MAX)
|
||||
{
|
||||
pErrorEntry->data.event.totalCount++;
|
||||
if (sec < pErrorEntry->data.event.lastError)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: System clock reporting earlier time than error timestamp\n",
|
||||
__FUNCTION__);
|
||||
}
|
||||
else
|
||||
{
|
||||
pErrorEntry->data.event.avgEventDelta =
|
||||
(pErrorEntry->data.event.avgEventDelta + sec -
|
||||
pErrorEntry->data.event.lastError) >> 1;
|
||||
}
|
||||
pErrorEntry->data.event.lastError = sec;
|
||||
*bDirty = NV_TRUE;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
return -NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvl_get_max_correctable_error_rate_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS *params
|
||||
)
|
||||
{
|
||||
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
NvU8 linkID = params->linkId;
|
||||
|
||||
if (linkID >= NVSWITCH_NUM_LINKS_LS10)
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
nvswitch_os_memset(params, 0, sizeof(NVSWITCH_GET_NVLINK_MAX_CORRECTABLE_ERROR_RATES_PARAMS));
|
||||
params->linkId = linkID;
|
||||
|
||||
nvswitch_os_memcpy(¶ms->dailyMaxCorrectableErrorRates, &pNvlinkState->pNvl->v4s.maxCorrectableErrorRates.dailyMaxCorrectableErrorRates[0][linkID],
|
||||
sizeof(params->dailyMaxCorrectableErrorRates));
|
||||
|
||||
nvswitch_os_memcpy(¶ms->monthlyMaxCorrectableErrorRates, &pNvlinkState->pNvl->v4s.maxCorrectableErrorRates.monthlyMaxCorrectableErrorRates[0][linkID],
|
||||
sizeof(params->monthlyMaxCorrectableErrorRates));
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
nvswitch_inforom_nvl_get_errors_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
NVSWITCH_GET_NVLINK_ERROR_COUNTS_PARAMS *params
|
||||
)
|
||||
{
|
||||
struct inforom *pInforom = device->pInforom;
|
||||
INFOROM_NVLINK_STATE *pNvlinkState;
|
||||
NvU32 maxReadSize = sizeof(params->errorLog)/sizeof(NVSWITCH_NVLINK_ERROR_ENTRY);
|
||||
NvU32 errorLeftCount = 0, errorReadCount = 0, errIndx = 0;
|
||||
NvU32 errorStart = params->errorIndex;
|
||||
|
||||
if (pInforom == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState = pInforom->pNvlinkState;
|
||||
if (pNvlinkState == NULL)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
if (errorStart >= INFOROM_NVL_OBJECT_V4S_NUM_ERROR_ENTRIES)
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
nvswitch_os_memset(params->errorLog, 0, sizeof(params->errorLog));
|
||||
|
||||
while (((errorStart + errorLeftCount) < INFOROM_NVL_OBJECT_V4S_NUM_ERROR_ENTRIES) &&
|
||||
(pNvlinkState->pNvl->v4s.errorLog[errorStart + errorLeftCount].header != INFOROM_NVL_ERROR_TYPE_INVALID))
|
||||
{
|
||||
errorLeftCount++;
|
||||
}
|
||||
|
||||
if (errorLeftCount > maxReadSize)
|
||||
{
|
||||
errorReadCount = maxReadSize;
|
||||
}
|
||||
else
|
||||
{
|
||||
errorReadCount = errorLeftCount;
|
||||
}
|
||||
|
||||
params->errorIndex = errorStart + errorReadCount;
|
||||
params->errorCount = errorReadCount;
|
||||
|
||||
if (errorReadCount > 0)
|
||||
{
|
||||
for (errIndx = 0; errIndx < errorReadCount; errIndx++)
|
||||
{
|
||||
if (inforom_nvl_v3_map_error_to_userspace_error(device,
|
||||
&pNvlinkState->pNvl->v4s.errorLog[errorStart+errIndx],
|
||||
¶ms->errorLog[errIndx]) != NVL_SUCCESS)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_update_link_correctable_error_info_ls10
|
||||
@@ -55,7 +302,258 @@ NvlStatus nvswitch_inforom_nvl_update_link_correctable_error_info_ls10
|
||||
NvBool *bDirty
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_IMPLEMENTED;
|
||||
INFOROM_NVL_OBJECT_V4S *pNvlObject = &((PINFOROM_NVL_OBJECT)pNvlGeneric)->v4s;
|
||||
INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE_V4S *pState =
|
||||
&((INFOROM_NVL_CORRECTABLE_ERROR_RATE_STATE *)pData)->v4s;
|
||||
INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *pErrorCounts =
|
||||
(INFOROM_NVLINK_CORRECTABLE_ERROR_COUNTS *)pNvlErrorCounts;
|
||||
|
||||
NvU32 i;
|
||||
NvU32 sec;
|
||||
NvU32 day, month, currentEntryDay, currentEntryMonth;
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pErrorRate;
|
||||
INFOROM_NVL_OBJECT_V3_CORRECTABLE_ERROR_RATE *pOldestErrorRate = NULL;
|
||||
INFOROM_NVL_OBJECT_V4S_MAX_CORRECTABLE_ERROR_RATES *pCorrErrorRates;
|
||||
NvBool bUpdated = NV_FALSE;
|
||||
INFOROM_NVLINK_ERROR_EVENT errorEvent;
|
||||
NvU32 currentFlitCrcRate;
|
||||
NvU32 *pCurrentLaneCrcRates;
|
||||
|
||||
if (bDirty == NULL)
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
*bDirty = NV_FALSE;
|
||||
|
||||
if (linkId >= INFOROM_NVL_OBJECT_V4S_NUM_LINKS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object does not store data for more than %u links (linkId = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V4S_NUM_LINKS, linkId);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (nvliptInstance > INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u NVLIPTs (NVLIPT = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_NVLIPT_INSTANCE_MAX, nvliptInstance);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
if (localLinkIdx > INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"object cannot log data for more than %u internal links (internal link = %u requested)\n",
|
||||
INFOROM_NVL_OBJECT_V3_BLOCK_ID_MAX, localLinkIdx);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
sec = (NvU32) (nvswitch_os_get_platform_time_epoch() / NVSWITCH_INTERVAL_1SEC_IN_NS);
|
||||
inforom_nvl_v3_seconds_to_day_and_month(sec, &day, &month);
|
||||
|
||||
inforom_nvl_v4_update_correctable_error_rates(pState, linkId, pErrorCounts);
|
||||
currentFlitCrcRate = pState->errorsPerMinute[linkId].flitCrc;
|
||||
pCurrentLaneCrcRates = pState->errorsPerMinute[linkId].laneCrc;
|
||||
pCorrErrorRates = &pNvlObject->maxCorrectableErrorRates;
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pCorrErrorRates->dailyMaxCorrectableErrorRates); i++)
|
||||
{
|
||||
pErrorRate = &pCorrErrorRates->dailyMaxCorrectableErrorRates[i][linkId];
|
||||
inforom_nvl_v3_seconds_to_day_and_month(pErrorRate->lastUpdated, ¤tEntryDay,
|
||||
¤tEntryMonth);
|
||||
|
||||
if ((pErrorRate->lastUpdated == 0) || (currentEntryDay == day))
|
||||
{
|
||||
if (inforom_nvl_v3_should_replace_error_rate_entry(pErrorRate,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates))
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
pOldestErrorRate = NULL;
|
||||
break;
|
||||
}
|
||||
else if ((pOldestErrorRate == NULL) ||
|
||||
(pErrorRate->lastUpdated < pOldestErrorRate->lastUpdated))
|
||||
{
|
||||
pOldestErrorRate = pErrorRate;
|
||||
}
|
||||
}
|
||||
|
||||
if (pOldestErrorRate != NULL)
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pOldestErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
|
||||
for (i = 0; i < NV_ARRAY_ELEMENTS(pCorrErrorRates->monthlyMaxCorrectableErrorRates); i++)
|
||||
{
|
||||
pErrorRate = &pCorrErrorRates->monthlyMaxCorrectableErrorRates[i][linkId];
|
||||
inforom_nvl_v3_seconds_to_day_and_month(pErrorRate->lastUpdated, ¤tEntryDay,
|
||||
¤tEntryMonth);
|
||||
|
||||
if ((pErrorRate->lastUpdated == 0) || (currentEntryMonth == month))
|
||||
{
|
||||
if (inforom_nvl_v3_should_replace_error_rate_entry(pErrorRate,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates))
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
pOldestErrorRate = NULL;
|
||||
break;
|
||||
}
|
||||
else if ((pOldestErrorRate == NULL) ||
|
||||
(pErrorRate->lastUpdated < pOldestErrorRate->lastUpdated))
|
||||
{
|
||||
pOldestErrorRate = pErrorRate;
|
||||
}
|
||||
}
|
||||
|
||||
if (pOldestErrorRate != NULL)
|
||||
{
|
||||
inforom_nvl_v3_update_error_rate_entry(pOldestErrorRate, sec,
|
||||
currentFlitCrcRate,
|
||||
pCurrentLaneCrcRates);
|
||||
bUpdated = NV_TRUE;
|
||||
}
|
||||
|
||||
*bDirty = bUpdated;
|
||||
|
||||
// Update aggregate error counts for each correctable error
|
||||
|
||||
errorEvent.nvliptInstance = nvliptInstance;
|
||||
errorEvent.localLinkIdx = localLinkIdx;
|
||||
|
||||
if (pErrorCounts->flitCrc > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_RX_FLIT_CRC_CORR;
|
||||
errorEvent.count = pErrorCounts->flitCrc;
|
||||
nvswitch_inforom_nvl_log_error_event_ls10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
if (pErrorCounts->rxLinkReplay > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_RX_LINK_REPLAY_EVENTS_CORR;
|
||||
errorEvent.count = pErrorCounts->rxLinkReplay;
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_ls10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
if (pErrorCounts->txLinkReplay > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_TX_LINK_REPLAY_EVENTS_CORR;
|
||||
errorEvent.count = pErrorCounts->txLinkReplay;
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_ls10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
if (pErrorCounts->linkRecovery > 0)
|
||||
{
|
||||
errorEvent.error = INFOROM_NVLINK_DL_LINK_RECOVERY_EVENTS_CORR;
|
||||
errorEvent.count = pErrorCounts->linkRecovery;
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_ls10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
{
|
||||
if (pErrorCounts->laneCrc[i] == 0)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
errorEvent.error = INFOROM_NVLINK_DL_RX_LANE0_CRC_CORR + i;
|
||||
errorEvent.count = pErrorCounts->laneCrc[i];
|
||||
bUpdated = NV_FALSE;
|
||||
nvswitch_inforom_nvl_log_error_event_ls10(device,
|
||||
pNvlGeneric, &errorEvent, &bUpdated);
|
||||
*bDirty |= bUpdated;
|
||||
}
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setL1Threshold_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 word1,
|
||||
NvU32 word2
|
||||
)
|
||||
{
|
||||
INFOROM_NVL_OBJECT_V4S *pNvlObject = &((PINFOROM_NVL_OBJECT)pNvlGeneric)->v4s;
|
||||
|
||||
pNvlObject->l1ThresholdData.word1 = word1;
|
||||
pNvlObject->l1ThresholdData.word2 = word2;
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_getL1Threshold_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
void *pNvlGeneric,
|
||||
NvU32 *word1,
|
||||
NvU32 *word2
|
||||
)
|
||||
{
|
||||
INFOROM_NVL_OBJECT_V4S *pNvlObject = &((PINFOROM_NVL_OBJECT)pNvlGeneric)->v4s;
|
||||
|
||||
*word1 = pNvlObject->l1ThresholdData.word1;
|
||||
*word2 = pNvlObject->l1ThresholdData.word2;
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus nvswitch_inforom_nvl_setup_nvlink_state_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
INFOROM_NVLINK_STATE *pNvlinkState,
|
||||
NvU8 version
|
||||
)
|
||||
{
|
||||
if (version != 4)
|
||||
{
|
||||
NVSWITCH_PRINT(device, WARN, "NVL v%u not supported\n", version);
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
pNvlinkState->pFmt = INFOROM_NVL_OBJECT_V4S_FMT;
|
||||
pNvlinkState->pPackedObject = nvswitch_os_malloc(INFOROM_NVL_OBJECT_V4S_PACKED_SIZE);
|
||||
if (pNvlinkState->pPackedObject == NULL)
|
||||
{
|
||||
return -NVL_NO_MEM;
|
||||
}
|
||||
|
||||
pNvlinkState->pNvl = nvswitch_os_malloc(sizeof(INFOROM_NVL_OBJECT));
|
||||
if (pNvlinkState->pNvl == NULL)
|
||||
{
|
||||
nvswitch_os_free(pNvlinkState->pPackedObject);
|
||||
return -NVL_NO_MEM;
|
||||
}
|
||||
|
||||
pNvlinkState->bDisableCorrectableErrorLogging = NV_FALSE;
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
NvlStatus
|
||||
@@ -271,5 +769,97 @@ nvswitch_bbx_get_sxid_ls10
|
||||
NVSWITCH_GET_SXIDS_PARAMS *params
|
||||
)
|
||||
{
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
NvlStatus status;
|
||||
void *pDmaBuf;
|
||||
NvU64 dmaHandle;
|
||||
FLCN *pFlcn;
|
||||
RM_FLCN_CMD_SOE bbxCmd;
|
||||
NvU32 cmdSeqDesc;
|
||||
NVSWITCH_TIMEOUT timeout;
|
||||
NvU32 transferSize;
|
||||
RM_SOE_BBX_GET_SXID_DATA bbxSxidData;
|
||||
NvU32 sxidIdx;
|
||||
|
||||
if (!nvswitch_is_inforom_supported_ls10(device))
|
||||
{
|
||||
NVSWITCH_PRINT(device, INFO, "%s: InfoROM is not supported\n", __FUNCTION__);
|
||||
return -NVL_ERR_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
if (params == NULL)
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
transferSize = sizeof(bbxSxidData);
|
||||
status = nvswitch_os_alloc_contig_memory(device->os_handle, &pDmaBuf, transferSize,
|
||||
(device->dma_addr_width == 32));
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: Failed to allocate contig memory. rc:%d\n", __FUNCTION__, status);
|
||||
return status;
|
||||
}
|
||||
|
||||
status = nvswitch_os_map_dma_region(device->os_handle, pDmaBuf, &dmaHandle,
|
||||
transferSize, NVSWITCH_DMA_DIR_TO_SYSMEM);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: Failed to map DMA region. rc:%d\n", __FUNCTION__, status);
|
||||
goto nvswitch_bbx_get_sxid_ls10_free_and_exit;
|
||||
}
|
||||
|
||||
nvswitch_os_memset(pDmaBuf, 0, transferSize);
|
||||
|
||||
pFlcn = device->pSoe->pFlcn;
|
||||
nvswitch_timeout_create(NVSWITCH_INTERVAL_5MSEC_IN_NS, &timeout);
|
||||
|
||||
nvswitch_os_memset(&bbxCmd, 0, sizeof(bbxCmd));
|
||||
bbxCmd.hdr.unitId = RM_SOE_UNIT_IFR;
|
||||
bbxCmd.hdr.size = sizeof(bbxCmd);
|
||||
bbxCmd.cmd.ifr.cmdType = RM_SOE_IFR_BBX_SXID_GET;
|
||||
bbxCmd.cmd.ifr.bbxSxidGet.sizeInBytes = transferSize;
|
||||
RM_FLCN_U64_PACK(&bbxCmd.cmd.ifr.bbxSxidGet.dmaHandle, &dmaHandle);
|
||||
|
||||
status = flcnQueueCmdPostBlocking(device, pFlcn,
|
||||
(PRM_FLCN_CMD)&bbxCmd,
|
||||
NULL, // pMsg
|
||||
NULL, // pPayload
|
||||
SOE_RM_CMDQ_LOG_ID,
|
||||
&cmdSeqDesc,
|
||||
&timeout);
|
||||
if (status != NV_OK)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: BBX cmd %d failed. rc:%d\n",
|
||||
__FUNCTION__, bbxCmd.cmd.ifr.cmdType, status);
|
||||
goto nvswitch_bbx_get_sxid_ls10_unmap_and_exit;
|
||||
}
|
||||
|
||||
status = nvswitch_os_sync_dma_region_for_cpu(device->os_handle, dmaHandle,
|
||||
transferSize,
|
||||
NVSWITCH_DMA_DIR_TO_SYSMEM);
|
||||
if (status != NV_OK)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: Failed to sync DMA region. rc:%d\n", __FUNCTION__, status);
|
||||
goto nvswitch_bbx_get_sxid_ls10_unmap_and_exit;
|
||||
}
|
||||
|
||||
nvswitch_os_memcpy((NvU8 *)&bbxSxidData, (NvU8 *)pDmaBuf, sizeof(bbxSxidData));
|
||||
|
||||
// Copy out SXIDs
|
||||
params->sxidCount = bbxSxidData.sxidCount;
|
||||
for (sxidIdx = 0; sxidIdx < INFOROM_BBX_OBJ_XID_ENTRIES; sxidIdx++)
|
||||
{
|
||||
params->sxidFirst[sxidIdx].sxid = bbxSxidData.sxidFirst[sxidIdx].sxid;
|
||||
params->sxidFirst[sxidIdx].timestamp = bbxSxidData.sxidFirst[sxidIdx].timestamp;
|
||||
params->sxidLast[sxidIdx].sxid = bbxSxidData.sxidLast[sxidIdx].sxid;
|
||||
params->sxidLast[sxidIdx].timestamp = bbxSxidData.sxidLast[sxidIdx].timestamp;
|
||||
}
|
||||
|
||||
nvswitch_bbx_get_sxid_ls10_unmap_and_exit:
|
||||
nvswitch_os_unmap_dma_region(device->os_handle, pDmaBuf, dmaHandle,
|
||||
transferSize, NVSWITCH_DMA_DIR_FROM_SYSMEM);
|
||||
nvswitch_bbx_get_sxid_ls10_free_and_exit:
|
||||
nvswitch_os_free_contig_memory(device->os_handle, pDmaBuf, transferSize);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -113,7 +113,7 @@ _nvswitch_initialize_minion_interrupts
|
||||
intrEn = FLD_SET_DRF_NUM(_MINION, _MINION_INTR_STALL_EN, _LINK,
|
||||
localDiscoveredLinks, intrEn);
|
||||
|
||||
{
|
||||
{
|
||||
// Disable interrupts only if explicitly requested to. Default to enable.
|
||||
if (device->regkeys.minion_intr != NV_SWITCH_REGKEY_MINION_INTERRUPTS_DISABLE)
|
||||
{
|
||||
@@ -358,11 +358,11 @@ _nvswitch_initialize_egress_interrupts
|
||||
DRF_DEF(_EGRESS, _ERR_FATAL_REPORT_EN_1, _MCRSP_RAM_HDR_ECC_DBE_ERR, _ENABLE);
|
||||
|
||||
chip_device->intr_mask.egress[1].nonfatal =
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _NXBAR_REDUCTION_HDR_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCRSPCTRLSTORE_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _RBCTRLSTORE_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREDSGT_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREDBUF_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _NXBAR_REDUCTION_HDR_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCRSPCTRLSTORE_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _RBCTRLSTORE_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREDSGT_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREDBUF_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCRSP_RAM_HDR_ECC_LIMIT_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _NXBAR_REDUCTION_HDR_ECC_DBE_ERR, _ENABLE) |
|
||||
DRF_DEF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_1, _NXBAR_REDUCTION_HDR_PARITY_ERR, _ENABLE) |
|
||||
@@ -4360,12 +4360,16 @@ _nvswitch_service_nvltlc_tx_sys_fatal_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_TX_SYS, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_TX_SYS, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4379,6 +4383,10 @@ _nvswitch_service_nvltlc_tx_sys_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TX_SYS_NCISOC_PARITY_ERR, "NCISOC Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_NCISOC_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_SYS, _ERR_STATUS_0, _NCISOC_HDR_ECC_DBE_ERR, 1);
|
||||
@@ -4386,6 +4394,10 @@ _nvswitch_service_nvltlc_tx_sys_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TX_SYS_NCISOC_HDR_ECC_DBE_ERR, "NCISOC HDR ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_NCISOC_HDR_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_SYS, _ERR_STATUS_0, _NCISOC_DAT_ECC_DBE_ERR, 1);
|
||||
@@ -4468,12 +4480,16 @@ _nvswitch_service_nvltlc_rx_sys_fatal_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_SYS, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4494,6 +4510,11 @@ _nvswitch_service_nvltlc_rx_sys_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_HDR_RAM_ECC_DBE_ERR, "HDR RAM ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_HDR_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _HDR_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -4508,6 +4529,11 @@ _nvswitch_service_nvltlc_rx_sys_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_DAT0_RAM_ECC_DBE_ERR, "DAT0 RAM ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DAT0_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _DAT0_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -4522,6 +4548,11 @@ _nvswitch_service_nvltlc_rx_sys_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_SYS_DAT1_RAM_ECC_DBE_ERR, "DAT1 RAM ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DAT1_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_SYS, _ERR_STATUS_0, _DAT1_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -4569,12 +4600,16 @@ _nvswitch_service_nvltlc_tx_lnk_fatal_0_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4588,6 +4623,10 @@ _nvswitch_service_nvltlc_tx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TXDLCREDITPARITYERR, "TX DL Credit Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_DL_CREDIT_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _CREQ_RAM_HDR_ECC_DBE_ERR, 1);
|
||||
@@ -4623,6 +4662,11 @@ _nvswitch_service_nvltlc_tx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_TX_LNK_RSP1_RAM_DAT_ECC_DBE_ERR, "RSP1 RAM DAT ECC DBE Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_RSP1_DAT_RAM_ECC_DBE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -4662,11 +4706,16 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4680,6 +4729,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDLHDRPARITYERR, "RX DL HDR Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DL_HDR_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXDLDATAPARITYERR, 1);
|
||||
@@ -4687,6 +4740,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDLDATAPARITYERR, "RX DL Data Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DL_DATA_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXDLCTRLPARITYERR, 1);
|
||||
@@ -4694,6 +4751,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDLCTRLPARITYERR, "RX DL Ctrl Parity Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DL_CTRL_PARITY_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXPKTLENERR, 1);
|
||||
@@ -4701,6 +4762,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXPKTLENERR, "RX Packet Length Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_PKTLEN_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RSVCACHEATTRPROBEREQERR, 1);
|
||||
@@ -4708,6 +4773,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RSVCACHEATTRPROBEREQERR, "RSV Packet Status Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSVD_CACHE_ATTR_PROBE_REQ_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RSVCACHEATTRPROBERSPERR, 1);
|
||||
@@ -4715,6 +4784,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RSVCACHEATTRPROBERSPERR, "RSV CacheAttr Probe Rsp Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSVD_CACHE_ATTR_PROBE_RSP_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _DATLENGTRMWREQMAXERR, 1);
|
||||
@@ -4722,6 +4795,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_DATLENGTRMWREQMAXERR, "Data Length RMW Req Max Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DATLEN_GT_RMW_REQ_MAX_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _DATLENLTATRRSPMINERR, 1);
|
||||
@@ -4729,6 +4806,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_DATLENLTATRRSPMINERR, "Data Len Lt ATR RSP Min Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DATLEN_LT_ATR_RSP_MIN_ERR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _INVALIDCACHEATTRPOERR, 1);
|
||||
@@ -4736,6 +4817,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_INVALIDCACHEATTRPOERR, "Invalid Cache Attr PO Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_PO_FOR_CACHE_ATTR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXRSPSTATUS_HW_ERR, 1);
|
||||
@@ -4743,6 +4828,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_LNK_RXRSPSTATUS_HW_ERR, "RX Rsp Status HW Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSP_STATUS_HW_ERR_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _RXRSPSTATUS_UR_ERR, 1);
|
||||
@@ -4750,6 +4839,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_LNK_RXRSPSTATUS_UR_ERR, "RX Rsp Status UR Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSP_STATUS_UR_ERR_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_0, _INVALID_COLLAPSED_RESPONSE_ERR, 1);
|
||||
@@ -4757,6 +4850,10 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RX_LNK_INVALID_COLLAPSED_RESPONSE_ERR, "Invalid Collapsed Response Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_INVALID_COLLAPSED_RESPONSE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -4796,12 +4893,17 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_1);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FATAL_REPORT_EN_1);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -4809,12 +4911,19 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_ls10
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_FIRST_1);
|
||||
injected = NVSWITCH_LINK_RD32_LS10(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_REPORT_INJECT_1);
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _RXHDROVFERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXHDROVFERR, "RX HDR OVF Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_1, _RXHDROVFERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_HDR_OVERFLOW_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _RXDATAOVFERR, 1);
|
||||
@@ -4822,6 +4931,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_RXDATAOVFERR, "RX Data OVF Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_1, _RXDATAOVFERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_DATA_OVERFLOW_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _STOMPDETERR, 1);
|
||||
@@ -4829,6 +4944,12 @@ _nvswitch_service_nvltlc_rx_lnk_fatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLTLC_STOMPDETERR, "Stomp Det Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC, _RX_LNK_ERR_REPORT_INJECT_1, _STOMPDETERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_STOMP_DETECTED_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _RXPOISONERR, 1);
|
||||
@@ -4948,6 +5069,7 @@ _nvswitch_service_nvlipt_common_fatal_ls10
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit, contain, unhandled;
|
||||
NvU32 link, local_link_idx;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_ENG_RD32(device, NVLIPT, , instance, _NVLIPT_COMMON, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_ENG_RD32(device, NVLIPT, , instance, _NVLIPT_COMMON, _ERR_FATAL_REPORT_EN_0);
|
||||
@@ -4959,6 +5081,8 @@ _nvswitch_service_nvlipt_common_fatal_ls10
|
||||
return -NVL_NOT_FOUND;
|
||||
}
|
||||
|
||||
error_event.nvliptInstance = (NvU8) instance;
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_ENG_RD32(device, NVLIPT, , instance, _NVLIPT_COMMON, _ERR_FIRST_0);
|
||||
contain = NVSWITCH_ENG_RD32(device, NVLIPT, , instance, _NVLIPT_COMMON, _ERR_CONTAIN_EN_0);
|
||||
@@ -4976,6 +5100,10 @@ _nvswitch_service_nvlipt_common_fatal_ls10
|
||||
}
|
||||
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_CLKCTL_ILLEGAL_REQUEST_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -5302,6 +5430,7 @@ _nvswitch_emit_link_errors_nvldl_fatal_link_ls10
|
||||
ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device);
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
|
||||
// Only enabled link errors are deffered
|
||||
pending = chip_device->deferredLinkErrors[link].fatalIntrMask.dl;
|
||||
@@ -5309,10 +5438,15 @@ _nvswitch_emit_link_errors_nvldl_fatal_link_ls10
|
||||
report.raw_enable = pending;
|
||||
report.mask = report.raw_enable;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _LTSSM_FAULT_UP, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_LTSSM_FAULT_UP, "LTSSM Fault Up", NV_FALSE);
|
||||
error_event.error = INFOROM_NVLINK_DL_LTSSM_FAULT_UP_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -5336,10 +5470,6 @@ _nvswitch_emit_link_errors_nvldl_nonfatal_link_ls10
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _RX_SHORT_ERROR_RATE, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
// Disable further interrupts
|
||||
nvlink_link *nvlink = nvswitch_get_link(device, link);
|
||||
nvlink->errorThreshold.bInterruptTrigerred = NV_TRUE;
|
||||
nvswitch_configure_error_rate_threshold_interrupt_ls10(nvlink, NV_FALSE);
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_DLPL_RX_SHORT_ERROR_RATE, "RX Short Error Rate");
|
||||
}
|
||||
}
|
||||
@@ -5354,7 +5484,9 @@ _nvswitch_emit_link_errors_nvltlc_rx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device);
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit, injected;
|
||||
NvU32 pending, bit;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
NvU32 injected;
|
||||
|
||||
// Only enabled link errors are deffered
|
||||
pending = chip_device->deferredLinkErrors[link].nonFatalIntrMask.tlcRx1;
|
||||
@@ -5363,6 +5495,9 @@ _nvswitch_emit_link_errors_nvltlc_rx_lnk_nonfatal_1_ls10
|
||||
report.raw_enable = pending;
|
||||
report.mask = report.raw_enable;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_RX_LNK, _ERR_STATUS_1, _HEARTBEAT_TIMEOUT_ERR, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
@@ -5371,6 +5506,8 @@ _nvswitch_emit_link_errors_nvltlc_rx_lnk_nonfatal_1_ls10
|
||||
|
||||
if (FLD_TEST_DRF_NUM(_NVLTLC_RX_LNK, _ERR_REPORT_INJECT_1, _HEARTBEAT_TIMEOUT_ERR, 0x0, injected))
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_AN1_HEARTBEAT_TIMEOUT_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -5386,6 +5523,7 @@ _nvswitch_emit_link_errors_nvlipt_lnk_nonfatal_ls10
|
||||
ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device);
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
|
||||
// Only enabled link errors are deffered
|
||||
pending = chip_device->deferredLinkErrors[link].nonFatalIntrMask.liptLnk;
|
||||
@@ -5393,11 +5531,18 @@ _nvswitch_emit_link_errors_nvlipt_lnk_nonfatal_ls10
|
||||
report.raw_enable = pending;
|
||||
report.mask = report.raw_enable;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _FAILEDMINIONREQUEST, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_FAILEDMINIONREQUEST, "_FAILEDMINIONREQUEST");
|
||||
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_FAILED_MINION_REQUEST_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -5754,11 +5899,15 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_0_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
pending = report.raw_pending & report.mask;
|
||||
if (pending == 0)
|
||||
{
|
||||
@@ -5773,6 +5922,10 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_RX_LNK_RXRSPSTATUS_PRIV_ERR, "RX Rsp Status PRIV Error");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_RX_RSP_STATUS_PRIV_ERR_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -5805,12 +5958,16 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -5824,6 +5981,11 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_CREQ_RAM_DAT_ECC_DBE_ERR, "CREQ RAM DAT ECC DBE Error");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_CREQ_DAT_RAM_ECC_DBE_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _CREQ_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -5852,6 +6014,11 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_0_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_COM_RAM_DAT_ECC_DBE_ERR, "COM RAM DAT ECC DBE Error");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
// TODO 3014908 log these in the NVL object until we have ECC object support
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_COM_DAT_RAM_ECC_DBE_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_0, _COM_RAM_ECC_LIMIT_ERR, 1);
|
||||
@@ -5904,8 +6071,9 @@ _nvswitch_service_nvltlc_rx_lnk_nonfatal_1_ls10
|
||||
)
|
||||
{
|
||||
ls10_device *chip_device = NVSWITCH_GET_CHIP_DEVICE_LS10(device);
|
||||
NvU32 pending, bit, unhandled, injected;
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 injected;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_STATUS_1);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_RX_LNK, _ERR_NON_FATAL_REPORT_EN_1);
|
||||
@@ -5983,12 +6151,16 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NvU32 pending, bit, unhandled;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_STATUS_1);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32(device, link, NVLTLC, _NVLTLC_TX_LNK, _ERR_NON_FATAL_REPORT_EN_1);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -6002,6 +6174,10 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC0, "AN1 Timeout VC0");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC0_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _TIMEOUT_VC1, 1);
|
||||
@@ -6009,6 +6185,10 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC1, "AN1 Timeout VC1");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC1_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _TIMEOUT_VC2, 1);
|
||||
@@ -6016,13 +6196,21 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC2, "AN1 Timeout VC2");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
}
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC2_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _TIMEOUT_VC3, 1);
|
||||
if (nvswitch_test_flags(pending, bit))
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC3, "AN1 Timeout VC3");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC3_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _TIMEOUT_VC4, 1);
|
||||
@@ -6030,6 +6218,10 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC4, "AN1 Timeout VC4");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC4_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _TIMEOUT_VC5, 1);
|
||||
@@ -6037,6 +6229,10 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC5, "AN1 Timeout VC5");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC5_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _TIMEOUT_VC6, 1);
|
||||
@@ -6044,6 +6240,10 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC6, "AN1 Timeout VC6");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC6_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLTLC_TX_LNK, _ERR_STATUS_1, _TIMEOUT_VC7, 1);
|
||||
@@ -6051,6 +6251,10 @@ _nvswitch_service_nvltlc_tx_lnk_nonfatal_1_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLTLC_TX_LNK_AN1_TIMEOUT_VC7, "AN1 Timeout VC7");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_TLC_TX_AN1_TIMEOUT_VC7_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -6228,11 +6432,15 @@ _nvswitch_service_nvlipt_lnk_nonfatal_ls10
|
||||
NvU32 lnkStateRequest, lnkStateStatus;
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit, unhandled;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
report.mask = report.raw_enable;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
pending = report.raw_pending & report.mask;
|
||||
if (pending == 0)
|
||||
{
|
||||
@@ -6247,6 +6455,10 @@ _nvswitch_service_nvlipt_lnk_nonfatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_ILLEGALLINKSTATEREQUEST, "_HW_NVLIPT_LNK_ILLEGALLINKSTATEREQUEST");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_ILLEGAL_LINK_STATE_REQUEST_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _FAILEDMINIONREQUEST, 1);
|
||||
@@ -6288,6 +6500,10 @@ _nvswitch_service_nvlipt_lnk_nonfatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_RESERVEDREQUESTVALUE, "_RESERVEDREQUESTVALUE");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RESERVED_REQUEST_VALUE_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _LINKSTATEWRITEWHILEBUSY, 1);
|
||||
@@ -6295,6 +6511,10 @@ _nvswitch_service_nvlipt_lnk_nonfatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_LINKSTATEWRITEWHILEBUSY, "_LINKSTATEWRITEWHILEBUSY");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_LINK_STATE_WRITE_WHILE_BUSY_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _LINK_STATE_REQUEST_TIMEOUT, 1);
|
||||
@@ -6302,6 +6522,10 @@ _nvswitch_service_nvlipt_lnk_nonfatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_LINK_STATE_REQUEST_TIMEOUT, "_LINK_STATE_REQUEST_TIMEOUT");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_LINK_STATE_REQUEST_TIMEOUT_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _WRITE_TO_LOCKED_SYSTEM_REG_ERR, 1);
|
||||
@@ -6309,6 +6533,10 @@ _nvswitch_service_nvlipt_lnk_nonfatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_NONFATAL(_HW_NVLIPT_LNK_WRITE_TO_LOCKED_SYSTEM_REG_ERR, "_WRITE_TO_LOCKED_SYSTEM_REG_ERR");
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_WRITE_TO_LOCKED_SYSTEM_REG_NONFATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -6521,6 +6749,7 @@ _nvswitch_service_nvlipt_lnk_fatal_ls10
|
||||
{
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
NvU32 pending, bit, unhandled;
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event = { 0 };
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_STATUS_0);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_FATAL_REPORT_EN_0);
|
||||
@@ -6532,6 +6761,9 @@ _nvswitch_service_nvlipt_lnk_fatal_ls10
|
||||
return -NVL_NOT_FOUND;
|
||||
}
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
unhandled = pending;
|
||||
report.raw_first = NVSWITCH_LINK_RD32(device, link, NVLIPT_LNK, _NVLIPT_LNK, _ERR_FIRST_0);
|
||||
|
||||
@@ -6540,6 +6772,10 @@ _nvswitch_service_nvlipt_lnk_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLIPT_LNK_SLEEPWHILEACTIVELINK, "No non-empty link is detected", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_SLEEP_WHILE_ACTIVE_LINK_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _RSTSEQ_PHYCTL_TIMEOUT, 1);
|
||||
@@ -6547,6 +6783,10 @@ _nvswitch_service_nvlipt_lnk_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLIPT_LNK_RSTSEQ_PHYCTL_TIMEOUT, "Reset sequencer timed out waiting for a handshake from PHYCTL", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RSTSEQ_PHYCTL_TIMEOUT_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLIPT_LNK, _ERR_STATUS_0, _RSTSEQ_CLKCTL_TIMEOUT, 1);
|
||||
@@ -6554,6 +6794,10 @@ _nvswitch_service_nvlipt_lnk_fatal_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_NVLIPT_LNK_RSTSEQ_CLKCTL_TIMEOUT, "Reset sequencer timed out waiting for a handshake from CLKCTL", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
{
|
||||
error_event.error = INFOROM_NVLINK_NVLIPT_RSTSEQ_CLKCTL_TIMEOUT_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
}
|
||||
|
||||
NVSWITCH_UNHANDLED_CHECK(device, unhandled);
|
||||
@@ -6646,12 +6890,12 @@ _nvswitch_service_nvlw_fatal_ls10
|
||||
status[5] = _nvswitch_service_nvlipt_link_fatal_ls10(device, instance);
|
||||
|
||||
|
||||
if (status[0] != NVL_SUCCESS && status[0] != -NVL_NOT_FOUND &&
|
||||
status[1] != NVL_SUCCESS && status[1] != -NVL_NOT_FOUND &&
|
||||
status[2] != NVL_SUCCESS && status[2] != -NVL_NOT_FOUND &&
|
||||
status[3] != NVL_SUCCESS && status[3] != -NVL_NOT_FOUND &&
|
||||
status[4] != NVL_SUCCESS && status[4] != -NVL_NOT_FOUND &&
|
||||
status[5] != NVL_SUCCESS && status[5] != -NVL_NOT_FOUND)
|
||||
if (status[0] != NVL_SUCCESS &&
|
||||
status[1] != NVL_SUCCESS &&
|
||||
status[2] != NVL_SUCCESS &&
|
||||
status[3] != NVL_SUCCESS &&
|
||||
status[4] != NVL_SUCCESS &&
|
||||
status[5] != NVL_SUCCESS)
|
||||
{
|
||||
return -NVL_MORE_PROCESSING_REQUIRED;
|
||||
}
|
||||
@@ -7071,12 +7315,16 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
NvBool bSkipIntrClear = NV_FALSE;
|
||||
|
||||
NVSWITCH_INTERRUPT_LOG_TYPE report = { 0 };
|
||||
INFOROM_NVLINK_ERROR_EVENT error_event;
|
||||
|
||||
report.raw_pending = NVSWITCH_LINK_RD32(device, link, NVLDL, _NVLDL_TOP, _INTR);
|
||||
report.raw_enable = NVSWITCH_LINK_RD32(device, link, NVLDL, _NVLDL_TOP, _INTR_STALL_EN);
|
||||
report.mask = report.raw_enable;
|
||||
pending = report.raw_pending & report.mask;
|
||||
|
||||
error_event.nvliptInstance = (NvU8) nvlipt_instance;
|
||||
error_event.localLinkIdx = (NvU8) NVSWITCH_NVLIPT_GET_LOCAL_LINK_ID_LS10(link);
|
||||
|
||||
if (pending == 0)
|
||||
{
|
||||
return -NVL_NOT_FOUND;
|
||||
@@ -7089,6 +7337,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_TX_FAULT_RAM, "TX Fault Ram", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_TX_FAULT_RAM_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _TX_FAULT_INTERFACE, 1);
|
||||
@@ -7096,6 +7346,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_TX_FAULT_INTERFACE, "TX Fault Interface", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_TX_FAULT_INTERFACE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _TX_FAULT_SUBLINK_CHANGE, 1);
|
||||
@@ -7103,6 +7355,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_TX_FAULT_SUBLINK_CHANGE, "TX Fault Sublink Change", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_TX_FAULT_SUBLINK_CHANGE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _RX_FAULT_SUBLINK_CHANGE, 1);
|
||||
@@ -7110,6 +7364,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_RX_FAULT_SUBLINK_CHANGE, "RX Fault Sublink Change", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_RX_FAULT_SUBLINK_CHANGE_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _RX_FAULT_DL_PROTOCOL, 1);
|
||||
@@ -7117,6 +7373,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_RX_FAULT_DL_PROTOCOL, "RX Fault DL Protocol", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_RX_FAULT_DL_PROTOCOL_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _LTSSM_FAULT_DOWN, 1);
|
||||
@@ -7124,6 +7382,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_LTSSM_FAULT_DOWN, "LTSSM Fault Down", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_LTSSM_FAULT_DOWN_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _LTSSM_PROTOCOL, 1);
|
||||
@@ -7131,6 +7391,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_LTSSM_PROTOCOL, "LTSSM Protocol Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
|
||||
// TODO 2827793 this should be logged to the InfoROM as fatal
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _PHY_A, 1);
|
||||
@@ -7138,6 +7400,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_PHY_A, "PHY_A Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_PHY_A_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _TX_PL_ERROR, 1);
|
||||
@@ -7145,6 +7409,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_TX_PL_ERROR, "TX_PL Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_TX_PL_ERROR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
bit = DRF_NUM(_NVLDL_TOP, _INTR, _RX_PL_ERROR, 1);
|
||||
@@ -7152,6 +7418,8 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
{
|
||||
NVSWITCH_REPORT_FATAL(_HW_DLPL_RX_PL_ERROR, "RX_PL Error", NV_FALSE);
|
||||
nvswitch_clear_flags(&unhandled, bit);
|
||||
error_event.error = INFOROM_NVLINK_DL_RX_PL_ERROR_FATAL;
|
||||
nvswitch_inforom_nvlink_log_error_event(device, &error_event);
|
||||
}
|
||||
|
||||
//
|
||||
@@ -7192,7 +7460,7 @@ nvswitch_service_nvldl_fatal_link_ls10
|
||||
|
||||
if (!bSkipIntrClear)
|
||||
{
|
||||
NVSWITCH_LINK_WR32(device, link, NVLDL, _NVLDL_TOP, _INTR, pending);
|
||||
NVSWITCH_LINK_WR32(device, link, NVLDL, _NVLDL_TOP, _INTR, pending);
|
||||
}
|
||||
|
||||
if (unhandled != 0)
|
||||
|
||||
@@ -137,10 +137,9 @@ nvswitch_init_lpwr_regs_ls10
|
||||
bLpEnable = NV_TRUE;
|
||||
softwareDesired = (bLpEnable) ? 0x1 : 0x0;
|
||||
|
||||
// TO-DO: The write to the AN1 register is not working. The logic here needs to be re-visited.
|
||||
tempRegVal = NVSWITCH_LINK_RD32_LS10(device, linkNum, NVLIPT_LNK, _NVLIPT_LNK, _CTRL_SYSTEM_LINK_AN1_CTRL);
|
||||
tempRegVal = FLD_SET_DRF_NUM(_NVLIPT, _LNK_CTRL_SYSTEM_LINK_AN1_CTRL, _PWRM_L1_ENABLE, softwareDesired, tempRegVal);
|
||||
NVSWITCH_LINK_WR32_LS10(device, linkNum, NVLIPT_LNK, _NVLIPT_LNK, _CTRL_SYSTEM_LINK_AN1_CTRL, tempRegVal);
|
||||
tempRegVal = NVSWITCH_LINK_RD32_LS10(device, linkNum, NVLIPT_LNK, _NVLIPT_LNK, _PWRM_CTRL);
|
||||
tempRegVal = FLD_SET_DRF_NUM(_NVLIPT, _LNK_PWRM_CTRL, _L1_SOFTWARE_DESIRED, softwareDesired, tempRegVal);
|
||||
NVSWITCH_LINK_WR32_LS10(device, linkNum, NVLIPT_LNK, _NVLIPT_LNK, _PWRM_CTRL, tempRegVal);
|
||||
}
|
||||
|
||||
void
|
||||
@@ -1079,6 +1078,29 @@ nvswitch_store_topology_information_ls10
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
nvswitch_get_error_rate_threshold_ls10
|
||||
(
|
||||
nvlink_link *link
|
||||
)
|
||||
{
|
||||
nvswitch_device *device = link->dev->pDevInfo;
|
||||
NvU32 linkNumber = link->linkNumber;
|
||||
NvU32 crcRegVal;
|
||||
|
||||
crcRegVal = NVSWITCH_LINK_RD32_LS10(device, linkNumber, NVLDL,
|
||||
_NVLDL_RX, _ERROR_RATE_CTRL);
|
||||
|
||||
link->errorThreshold.thresholdMan = DRF_VAL(_NVLDL_RX, _ERROR_RATE_CTRL, _SHORT_THRESHOLD_MAN,
|
||||
crcRegVal);
|
||||
link->errorThreshold.thresholdExp = DRF_VAL(_NVLDL_RX, _ERROR_RATE_CTRL, _SHORT_THRESHOLD_EXP,
|
||||
crcRegVal);
|
||||
link->errorThreshold.timescaleMan = DRF_VAL(_NVLDL_RX, _ERROR_RATE_CTRL, _SHORT_TIMESCALE_MAN,
|
||||
crcRegVal);
|
||||
link->errorThreshold.timescaleExp = DRF_VAL(_NVLDL_RX, _ERROR_RATE_CTRL, _SHORT_TIMESCALE_EXP,
|
||||
crcRegVal);
|
||||
}
|
||||
|
||||
void
|
||||
nvswitch_set_error_rate_threshold_ls10
|
||||
(
|
||||
@@ -1132,7 +1154,6 @@ nvswitch_set_error_rate_threshold_ls10
|
||||
crcRegVal &= ~shortRateMask;
|
||||
crcRegVal |= crcShortRegkeyVal;
|
||||
|
||||
|
||||
link->errorThreshold.bUserConfig = NV_FALSE;
|
||||
link->errorThreshold.bInterruptTrigerred = NV_FALSE;
|
||||
}
|
||||
@@ -1204,13 +1225,11 @@ nvswitch_configure_error_rate_threshold_interrupt_ls10
|
||||
if (bEnable)
|
||||
{
|
||||
link->errorThreshold.bInterruptTrigerred = NV_FALSE;
|
||||
intrRegVal = FLD_SET_DRF_NUM(_NVLDL_TOP, _INTR_NONSTALL_EN, _RX_SHORT_ERROR_RATE, 1,
|
||||
intrRegVal);
|
||||
intrRegVal |= DRF_DEF(_NVLDL_TOP, _INTR_NONSTALL_EN, _RX_SHORT_ERROR_RATE, _ENABLE);
|
||||
}
|
||||
else
|
||||
{
|
||||
intrRegVal = FLD_SET_DRF_NUM(_NVLDL_TOP, _INTR_NONSTALL_EN, _RX_SHORT_ERROR_RATE, 0,
|
||||
intrRegVal);
|
||||
intrRegVal |= DRF_DEF(_NVLDL_TOP, _INTR_NONSTALL_EN, _RX_SHORT_ERROR_RATE, _DISABLE);
|
||||
}
|
||||
|
||||
NVSWITCH_LINK_WR32_LS10(device, linkNumber, NVLDL,
|
||||
@@ -1414,7 +1433,7 @@ nvswitch_execute_unilateral_link_shutdown_ls10
|
||||
NvU32 link_state_request;
|
||||
NvU32 link_state;
|
||||
NvU32 stat_data = 0;
|
||||
NvU32 link_intr_subcode = 0;
|
||||
NvU32 link_intr_subcode;
|
||||
|
||||
if (!NVSWITCH_IS_LINK_ENG_VALID_LS10(device, NVLDL, link->linkNumber))
|
||||
{
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
|
||||
* SPDX-License-Identifier: MIT
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
@@ -65,7 +65,7 @@
|
||||
#include "ls10/minion_nvlink_defines_public_ls10.h"
|
||||
|
||||
#define NVSWITCH_IFR_MIN_BIOS_VER_LS10 0x9610170000ull
|
||||
#define NVSWITCH_SMBPBI_MIN_BIOS_VER_LS10 0x9610220000ull
|
||||
#define NVSWITCH_SMBPBI_MIN_BIOS_VER_LS10 0x9610170000ull
|
||||
|
||||
void *
|
||||
nvswitch_alloc_chipdevice_ls10
|
||||
@@ -113,7 +113,7 @@ nvswitch_pri_ring_init_ls10
|
||||
{
|
||||
keepPolling = (nvswitch_timeout_check(&timeout)) ? NV_FALSE : NV_TRUE;
|
||||
|
||||
command = NVSWITCH_REG_RD32(device, _GFW_GLOBAL, _BOOT_PARTITION_PROGRESS);
|
||||
command = NVSWITCH_REG_RD32(device, _GFW_GLOBAL, _BOOT_PARTITION_PROGRESS);
|
||||
if (FLD_TEST_DRF(_GFW_GLOBAL, _BOOT_PARTITION_PROGRESS, _VALUE, _SUCCESS, command))
|
||||
{
|
||||
break;
|
||||
@@ -1353,10 +1353,10 @@ nvswitch_reset_and_drain_links_ls10
|
||||
NvU32 link;
|
||||
NvU32 data32;
|
||||
NvU32 retry_count = 3;
|
||||
NvU32 link_state_request;
|
||||
NvU32 link_state;
|
||||
NvU32 stat_data;
|
||||
NvU32 link_intr_subcode;
|
||||
NvU32 link_state_request;
|
||||
NvU32 link_state;
|
||||
NvU32 stat_data;
|
||||
NvU32 link_intr_subcode;
|
||||
|
||||
if (link_mask == 0)
|
||||
{
|
||||
@@ -1575,7 +1575,6 @@ nvswitch_set_nport_port_config_ls10
|
||||
)
|
||||
{
|
||||
NvU32 val;
|
||||
NvlStatus status = NVL_SUCCESS;
|
||||
|
||||
if (p->requesterLinkID >= NVBIT(
|
||||
DRF_SIZE(NV_NPORT_REQLINKID_REQROUTINGID) +
|
||||
@@ -1625,162 +1624,156 @@ nvswitch_set_nport_port_config_ls10
|
||||
|
||||
if (p->type == CONNECT_TRUNK_SWITCH)
|
||||
{
|
||||
if (!nvswitch_is_soe_supported(device))
|
||||
if (IS_RTLSIM(device) || IS_EMULATION(device) || IS_FMODEL(device))
|
||||
{
|
||||
// Set trunk specific settings (TPROD) on PRE-SILION
|
||||
|
||||
// NPORT
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _NPORT, _CTRL);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _EGDRAINENB, _DISABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _ENEGRESSDBI, _ENABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _ENROUTEDBI, _ENABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _RTDRAINENB, _DISABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _SPARE, _INIT, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _TRUNKLINKENB, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _NPORT, _CTRL, val);
|
||||
// NPORT
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _NPORT, _CTRL);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _EGDRAINENB, _DISABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _ENEGRESSDBI, _ENABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _ENROUTEDBI, _ENABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _RTDRAINENB, _DISABLE, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _SPARE, _INIT, val);
|
||||
val = FLD_SET_DRF(_NPORT, _CTRL, _TRUNKLINKENB, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _NPORT, _CTRL, val);
|
||||
|
||||
// EGRESS
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _CTRL);
|
||||
val = FLD_SET_DRF(_EGRESS, _CTRL, _CTO_ENB, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _CTRL, val);
|
||||
// EGRESS
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _CTRL);
|
||||
val = FLD_SET_DRF(_EGRESS, _CTRL, _CTO_ENB, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _CTRL, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_CONTAIN_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _CREDIT_TIME_OUT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _HWRSPERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _INVALIDVCSET_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _REQTGTIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _RSPREQIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _URRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_CONTAIN_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_CONTAIN_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _CREDIT_TIME_OUT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _HWRSPERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _INVALIDVCSET_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _REQTGTIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _RSPREQIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_CONTAIN_EN_0, _URRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_CONTAIN_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _CREDIT_TIME_OUT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _HWRSPERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _INVALIDVCSET_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _REQTGTIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _RSPREQIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _URRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_FATAL_REPORT_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _CREDIT_TIME_OUT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _HWRSPERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _INVALIDVCSET_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _REQTGTIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _RSPREQIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_FATAL_REPORT_EN_0, _URRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_FATAL_REPORT_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_LOG_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _CREDIT_TIME_OUT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _HWRSPERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _INVALIDVCSET_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _REQTGTIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _RSPREQIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _URRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_LOG_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_LOG_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _CREDIT_TIME_OUT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _HWRSPERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _INVALIDVCSET_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _REQTGTIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _RSPREQIDMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_LOG_EN_0, _URRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_LOG_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_0, _PRIVRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_NON_FATAL_REPORT_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _EGRESS, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_EGRESS, _ERR_NON_FATAL_REPORT_EN_0, _PRIVRSPERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _EGRESS, _ERR_NON_FATAL_REPORT_EN_0, val);
|
||||
|
||||
// INGRESS
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_CONTAIN_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _EXTAREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _EXTBREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _INVALIDVCSET, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _MCREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _REMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_CONTAIN_EN_0, val);
|
||||
// INGRESS
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_CONTAIN_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _EXTAREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _EXTBREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _INVALIDVCSET, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _MCREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_CONTAIN_EN_0, _REMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_CONTAIN_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _EXTAREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _EXTBREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _INVALIDVCSET, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _MCREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _REMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_FATAL_REPORT_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _EXTAREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _EXTBREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _INVALIDVCSET, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _MCREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_FATAL_REPORT_EN_0, _REMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_FATAL_REPORT_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _EXTAREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _EXTBREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _INVALIDVCSET, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _MCREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _REMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _EXTAREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _EXTBREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _INVALIDVCSET, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _MCREMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_0, _REMAPTAB_ECC_DBE_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_1);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTAREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTAREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTBREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTBREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _MCCMDTOUCADDRERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _MCREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _MCREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _READMCREFLECTMEMERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_1, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_1);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTAREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTAREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTBREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _EXTBREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _MCCMDTOUCADDRERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _MCREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _MCREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_LOG_EN_1, _READMCREFLECTMEMERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_LOG_EN_1, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_INDEX_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_INDEX_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_INDEX_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _REMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_INDEX_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTAREMAPTAB_REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_INDEX_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _EXTBREMAPTAB_REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_ACLFAIL, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_ADDRBOUNDSERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_INDEX_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _MCREMAPTAB_REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _REMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_0, _REQCONTEXTMISMATCHERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_1);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTAREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTAREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTBREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTBREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCCMDTOUCADDRERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _READMCREFLECTMEMERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_1, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_1);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTAREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTAREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTBREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _EXTBREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCCMDTOUCADDRERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREMAPTAB_ADDRTYPEERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _MCREMAPTAB_ECC_LIMIT_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_INGRESS, _ERR_NON_FATAL_REPORT_EN_1, _READMCREFLECTMEMERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _INGRESS, _ERR_NON_FATAL_REPORT_EN_1, val);
|
||||
|
||||
// SOURCETRACK
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_CONTAIN_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _DUP_CREQ_TCEN0_TAG_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _INVALID_TCEN0_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _INVALID_TCEN1_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _SOURCETRACK_TIME_OUT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_CONTAIN_EN_0, val);
|
||||
// SOURCETRACK
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_CONTAIN_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _DUP_CREQ_TCEN0_TAG_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _INVALID_TCEN0_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _INVALID_TCEN1_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_CONTAIN_EN_0, _SOURCETRACK_TIME_OUT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_CONTAIN_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _DUP_CREQ_TCEN0_TAG_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _INVALID_TCEN0_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _INVALID_TCEN1_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _SOURCETRACK_TIME_OUT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_FATAL_REPORT_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _DUP_CREQ_TCEN0_TAG_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _INVALID_TCEN0_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _INVALID_TCEN1_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_FATAL_REPORT_EN_0, _SOURCETRACK_TIME_OUT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_FATAL_REPORT_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_LOG_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _DUP_CREQ_TCEN0_TAG_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _INVALID_TCEN0_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _INVALID_TCEN1_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _SOURCETRACK_TIME_OUT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_LOG_EN_0, val);
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_LOG_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_DBE_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _DUP_CREQ_TCEN0_TAG_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _INVALID_TCEN0_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _INVALID_TCEN1_RSP_ERR, __TPROD, val);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_LOG_EN_0, _SOURCETRACK_TIME_OUT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_LOG_EN_0, val);
|
||||
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_NON_FATAL_REPORT_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_LIMIT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_NON_FATAL_REPORT_EN_0, val);
|
||||
}
|
||||
else
|
||||
{
|
||||
val = NVSWITCH_LINK_RD32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_NON_FATAL_REPORT_EN_0);
|
||||
val = FLD_SET_DRF(_SOURCETRACK, _ERR_NON_FATAL_REPORT_EN_0, _CREQ_TCEN0_CRUMBSTORE_ECC_LIMIT_ERR, __TPROD, val);
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _SOURCETRACK, _ERR_NON_FATAL_REPORT_EN_0, val);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Set trunk specific settings (TPROD) in SOE
|
||||
status = nvswitch_set_nport_tprod_state_ls10(device, p->portNum);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: Failed to set NPORT TPROD state\n",
|
||||
__FUNCTION__);
|
||||
}
|
||||
// nvswitch_set_nport_tprod_state_ls10(device, p->portNum);
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -1791,7 +1784,7 @@ nvswitch_set_nport_port_config_ls10
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _NPORT, _SRC_PORT_TYPE0, NvU64_LO32(p->trunkSrcMask));
|
||||
NVSWITCH_LINK_WR32(device, p->portNum, NPORT, _NPORT, _SRC_PORT_TYPE1, NvU64_HI32(p->trunkSrcMask));
|
||||
|
||||
return status;
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -2647,6 +2640,14 @@ nvswitch_get_num_links_ls10
|
||||
return NVSWITCH_NUM_LINKS_LS10;
|
||||
}
|
||||
|
||||
static NvU8
|
||||
nvswitch_get_num_links_per_nvlipt_ls10
|
||||
(
|
||||
nvswitch_device *device
|
||||
)
|
||||
{
|
||||
return NVSWITCH_LINKS_PER_NVLIPT_LS10;
|
||||
}
|
||||
|
||||
void
|
||||
nvswitch_set_fatal_error_ls10
|
||||
@@ -2797,7 +2798,7 @@ nvswitch_is_inforom_supported_ls10
|
||||
{
|
||||
NVSWITCH_PRINT(device, INFO,
|
||||
"INFOROM is not supported since SOE is not supported\n");
|
||||
return NV_FALSE;
|
||||
return NV_FALSE;
|
||||
}
|
||||
|
||||
status = _nvswitch_get_bios_version(device, &version);
|
||||
@@ -2805,8 +2806,8 @@ nvswitch_is_inforom_supported_ls10
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: Error getting BIOS version\n",
|
||||
__FUNCTION__);
|
||||
return NV_FALSE;
|
||||
}
|
||||
return NV_FALSE;
|
||||
}
|
||||
|
||||
if (version >= NVSWITCH_IFR_MIN_BIOS_VER_LS10)
|
||||
{
|
||||
@@ -2848,14 +2849,21 @@ nvswitch_is_smbpbi_supported_ls10
|
||||
nvswitch_device *device
|
||||
)
|
||||
{
|
||||
NvU64 version;
|
||||
NvlStatus status;
|
||||
|
||||
if (!nvswitch_is_smbpbi_supported_lr10(device))
|
||||
{
|
||||
return NV_FALSE;
|
||||
}
|
||||
|
||||
//
|
||||
// Temporary driver WAR to disable SMBPBI on the LS10 NVSwitch driver.
|
||||
// This should be removed once 3875091 is resolved.
|
||||
//
|
||||
return NV_FALSE;
|
||||
|
||||
#if 0
|
||||
NvU64 version;
|
||||
NvlStatus status;
|
||||
|
||||
status = _nvswitch_get_bios_version(device, &version);
|
||||
if (status != NVL_SUCCESS)
|
||||
{
|
||||
@@ -2874,6 +2882,7 @@ nvswitch_is_smbpbi_supported_ls10
|
||||
"SMBPBI is not supported on NVSwitch BIOS version %llx.\n", version);
|
||||
return NV_FALSE;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -2906,8 +2915,17 @@ NvlStatus nvswitch_get_link_public_id_ls10
|
||||
NvU32 *publicId
|
||||
)
|
||||
{
|
||||
NVSWITCH_PRINT(device, WARN, "%s: Function not implemented\n", __FUNCTION__);
|
||||
return -NVL_ERR_NOT_IMPLEMENTED;
|
||||
if (!device->hal.nvswitch_is_link_valid(device, linkId) ||
|
||||
(publicId == NULL))
|
||||
{
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
*publicId = NVSWITCH_NVLIPT_GET_PUBLIC_ID_LS10(linkId);
|
||||
|
||||
|
||||
return (NVSWITCH_ENG_VALID_LS10(device, NVLIPT, *publicId)) ?
|
||||
NVL_SUCCESS : -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -4920,7 +4938,7 @@ nvswitch_launch_ALI_ls10
|
||||
}
|
||||
|
||||
nvswitch_launch_ALI_link_training(device, link, NV_FALSE);
|
||||
}
|
||||
}
|
||||
FOR_EACH_INDEX_IN_MASK_END;
|
||||
|
||||
return NVL_SUCCESS;
|
||||
@@ -5047,29 +5065,29 @@ nvswitch_set_training_mode_ls10
|
||||
{
|
||||
|
||||
regVal = NVSWITCH_LINK_RD32_LS10(device, link->linkNumber, NVLIPT_LNK, _NVLIPT_LNK,
|
||||
_CTRL_CAP_LOCAL_LINK_CHANNEL);
|
||||
_CTRL_CAP_LOCAL_LINK_CHANNEL);
|
||||
|
||||
if (!FLD_TEST_DRF(_NVLIPT_LNK, _CTRL_CAP_LOCAL_LINK_CHANNEL, _ALI_SUPPORT, _SUPPORTED, regVal))
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: ALI training not supported! Non-ALI will be used as the default.\n",__FUNCTION__);
|
||||
if (!FLD_TEST_DRF(_NVLIPT_LNK, _CTRL_CAP_LOCAL_LINK_CHANNEL, _ALI_SUPPORT, _SUPPORTED, regVal))
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: ALI training not supported! Non-ALI will be used as the default.\n",__FUNCTION__);
|
||||
#ifdef INCLUDE_NVLINK_LIB
|
||||
device->nvlink_device->enableALI = NV_FALSE;
|
||||
#endif
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
#ifdef INCLUDE_NVLINK_LIB
|
||||
device->nvlink_device->enableALI = NV_TRUE;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: ALI training not enabled! Non-ALI will be used as the default.\n",__FUNCTION__);
|
||||
#ifdef INCLUDE_NVLINK_LIB
|
||||
device->nvlink_device->enableALI = NV_FALSE;
|
||||
device->nvlink_device->enableALI = NV_FALSE;
|
||||
#endif
|
||||
return NVL_SUCCESS;
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
}
|
||||
FOR_EACH_INDEX_IN_MASK_END;
|
||||
@@ -5567,7 +5585,7 @@ nvswitch_ctrl_set_nvlink_error_threshold_ls10
|
||||
|
||||
// Configure the interrupt
|
||||
nvswitch_configure_error_rate_threshold_interrupt_ls10(link,
|
||||
link->errorThreshold.bInterruptEn);
|
||||
pParams->errorThreshold[link->linkNumber].bInterruptEn);
|
||||
}
|
||||
}
|
||||
FOR_EACH_INDEX_IN_MASK_END;
|
||||
@@ -5593,6 +5611,9 @@ nvswitch_ctrl_get_nvlink_error_threshold_ls10
|
||||
continue;
|
||||
}
|
||||
|
||||
// Get the Error threshold
|
||||
nvswitch_get_error_rate_threshold_ls10(link);
|
||||
|
||||
pParams->errorThreshold[link->linkNumber].thresholdMan =
|
||||
link->errorThreshold.thresholdMan;
|
||||
pParams->errorThreshold[link->linkNumber].thresholdExp =
|
||||
|
||||
@@ -31,6 +31,7 @@
|
||||
#include "common_nvswitch.h"
|
||||
#include "ls10/ls10.h"
|
||||
#include "ls10/soe_ls10.h"
|
||||
#include "lr10/soe_lr10.h"
|
||||
|
||||
#include "nvswitch/ls10/dev_soe_ip.h"
|
||||
#include "nvswitch/ls10/dev_soe_ip_addendum.h"
|
||||
@@ -39,9 +40,6 @@
|
||||
#include "nvswitch/ls10/dev_nvlsaw_ip_addendum.h"
|
||||
#include "nvswitch/ls10/dev_riscv_pri.h"
|
||||
|
||||
#include "nvswitch/ls10/dev_nport_ip.h"
|
||||
#include "nvswitch/ls10/dev_npg_ip.h"
|
||||
|
||||
#include "flcn/flcnable_nvswitch.h"
|
||||
#include "flcn/flcn_nvswitch.h"
|
||||
#include "rmflcncmdif_nvswitch.h"
|
||||
@@ -182,7 +180,7 @@ dumpDebugRegisters
|
||||
NVSWITCH_PRINT(device, ERROR, "RESET_PLM : 0x%08x\n", regRESET_PLM);
|
||||
NVSWITCH_PRINT(device, ERROR, "EXE_PLM : 0x%08x\n", regEXE_PLM);
|
||||
}
|
||||
#endif // defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
|
||||
#endif // defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
|
||||
|
||||
/*
|
||||
* @Brief : Attach or Detach driver to SOE Queues
|
||||
@@ -232,7 +230,12 @@ _nvswitch_is_soe_attached_ls10
|
||||
return FLD_TEST_DRF(_NVLSAW, _SOE_ATTACH_DETACH, _STATUS, _ATTACHED, val);
|
||||
}
|
||||
|
||||
// BACK UP Nport state and reset NPORT
|
||||
/*
|
||||
* @Brief : Backup NPORT state and issue NPORT reset
|
||||
*
|
||||
* @param[in] device
|
||||
* @param[in] nport
|
||||
*/
|
||||
NvlStatus
|
||||
nvswitch_soe_issue_nport_reset_ls10
|
||||
(
|
||||
@@ -240,7 +243,7 @@ nvswitch_soe_issue_nport_reset_ls10
|
||||
NvU32 nport
|
||||
)
|
||||
{
|
||||
FLCN *pFlcn = device->pSoe->pFlcn;
|
||||
FLCN *pFlcn = device->pSoe->pFlcn;
|
||||
NvU32 cmdSeqDesc = 0;
|
||||
NV_STATUS status;
|
||||
RM_FLCN_CMD_SOE cmd;
|
||||
@@ -256,7 +259,7 @@ nvswitch_soe_issue_nport_reset_ls10
|
||||
pNportReset->nport = nport;
|
||||
pNportReset->cmdType = RM_SOE_CORE_CMD_ISSUE_NPORT_RESET;
|
||||
|
||||
nvswitch_timeout_create(NVSWITCH_INTERVAL_1SEC_IN_NS * 5, &timeout);
|
||||
nvswitch_timeout_create(NVSWITCH_INTERVAL_5MSEC_IN_NS, &timeout);
|
||||
status = flcnQueueCmdPostBlocking(device, pFlcn,
|
||||
(PRM_FLCN_CMD)&cmd,
|
||||
NULL, // pMsg
|
||||
@@ -274,7 +277,12 @@ nvswitch_soe_issue_nport_reset_ls10
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
// De-reset NPORT and restore NPORT state
|
||||
/*
|
||||
* @Brief : De-Assert NPORT reset and restore NPORT state
|
||||
*
|
||||
* @param[in] device
|
||||
* @param[in] nport
|
||||
*/
|
||||
NvlStatus
|
||||
nvswitch_soe_restore_nport_state_ls10
|
||||
(
|
||||
@@ -292,13 +300,13 @@ nvswitch_soe_restore_nport_state_ls10
|
||||
nvswitch_os_memset(&cmd, 0, sizeof(cmd));
|
||||
|
||||
cmd.hdr.unitId = RM_SOE_UNIT_CORE;
|
||||
cmd.hdr.size = sizeof(cmd);
|
||||
cmd.hdr.size = RM_SOE_CMD_SIZE(CORE, NPORT_STATE);
|
||||
|
||||
pNportState = &cmd.cmd.core.nportState;
|
||||
pNportState->nport = nport;
|
||||
pNportState->cmdType = RM_SOE_CORE_CMD_RESTORE_NPORT_STATE;
|
||||
|
||||
nvswitch_timeout_create(NVSWITCH_INTERVAL_1SEC_IN_NS * 5, &timeout);
|
||||
nvswitch_timeout_create(NVSWITCH_INTERVAL_5MSEC_IN_NS, &timeout);
|
||||
status = flcnQueueCmdPostBlocking(device, pFlcn,
|
||||
(PRM_FLCN_CMD)&cmd,
|
||||
NULL, // pMsg
|
||||
@@ -336,17 +344,10 @@ nvswitch_set_nport_tprod_state_ls10
|
||||
NVSWITCH_TIMEOUT timeout;
|
||||
RM_SOE_CORE_CMD_NPORT_TPROD_STATE *nportTprodState;
|
||||
|
||||
if (!NVSWITCH_ENG_IS_VALID(device, NPORT, nport))
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s: NPORT #%d invalid\n",
|
||||
__FUNCTION__, nport);
|
||||
return -NVL_BAD_ARGS;
|
||||
}
|
||||
|
||||
nvswitch_os_memset(&cmd, 0, sizeof(cmd));
|
||||
|
||||
cmd.hdr.unitId = RM_SOE_UNIT_CORE;
|
||||
cmd.hdr.size = RM_SOE_CMD_SIZE(CORE, NPORT_STATE);
|
||||
cmd.hdr.size = sizeof(cmd);
|
||||
|
||||
nportTprodState = &cmd.cmd.core.nportTprodState;
|
||||
nportTprodState->nport = nport;
|
||||
@@ -391,7 +392,7 @@ nvswitch_soe_init_l2_state_ls10
|
||||
|
||||
if (!nvswitch_is_soe_supported(device))
|
||||
{
|
||||
NVSWITCH_PRINT(device, INFO, "%s: SOE is not supported. skipping!\n",
|
||||
NVSWITCH_PRINT(device, INFO, "%s: SOE is not supported\n",
|
||||
__FUNCTION__);
|
||||
return;
|
||||
}
|
||||
@@ -420,6 +421,7 @@ nvswitch_soe_init_l2_state_ls10
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* @Brief : Init sequence for SOE FSP RISCV image
|
||||
*
|
||||
@@ -529,7 +531,6 @@ nvswitch_unload_soe_ls10
|
||||
// Detach driver from SOE Queues
|
||||
_nvswitch_soe_attach_detach_driver_ls10(device, NV_FALSE);
|
||||
|
||||
|
||||
return NVL_SUCCESS;
|
||||
}
|
||||
|
||||
@@ -554,7 +555,7 @@ nvswitch_soe_register_event_callbacks_ls10
|
||||
device, pFlcn,
|
||||
RM_SOE_UNIT_THERM,
|
||||
NULL,
|
||||
nvswitch_therm_soe_callback_ls10,
|
||||
nvswitch_therm_soe_callback_lr10,
|
||||
NULL,
|
||||
&pSoe->thermEvtDesc);
|
||||
if (status != NV_OK)
|
||||
|
||||
@@ -28,7 +28,6 @@
|
||||
#include "ls10/therm_ls10.h"
|
||||
#include "error_nvswitch.h"
|
||||
#include "soe/soeiftherm.h"
|
||||
#include "rmflcncmdif_nvswitch.h"
|
||||
|
||||
#include "flcn/flcnable_nvswitch.h"
|
||||
#include "flcn/flcn_nvswitch.h"
|
||||
@@ -362,103 +361,6 @@ nvswitch_monitor_thermal_alert_ls10
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* @brief Callback function to recieve thermal messages from SOE.
|
||||
*/
|
||||
void
|
||||
nvswitch_therm_soe_callback_ls10
|
||||
(
|
||||
nvswitch_device *device,
|
||||
RM_FLCN_MSG *pGenMsg,
|
||||
void *pParams,
|
||||
NvU32 seqDesc,
|
||||
NV_STATUS status
|
||||
)
|
||||
{
|
||||
RM_SOE_THERM_MSG_SLOWDOWN_STATUS slowdown_status;
|
||||
RM_SOE_THERM_MSG_SHUTDOWN_STATUS shutdown_status;
|
||||
RM_FLCN_MSG_SOE *pMsg = (RM_FLCN_MSG_SOE *)pGenMsg;
|
||||
NvU32 temperature;
|
||||
NvU32 threshold;
|
||||
|
||||
switch (pMsg->msg.soeTherm.msgType)
|
||||
{
|
||||
case RM_SOE_THERM_MSG_ID_SLOWDOWN_STATUS:
|
||||
{
|
||||
slowdown_status = pMsg->msg.soeTherm.slowdown;
|
||||
if (slowdown_status.bSlowdown)
|
||||
{
|
||||
if (slowdown_status.source.bTsense) // TSENSE_THERM_ALERT
|
||||
{
|
||||
temperature = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.maxTemperature);
|
||||
threshold = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.warnThreshold);
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
|
||||
"NVSWITCH Temperature %dC | TSENSE WARN Threshold %dC\n",
|
||||
temperature, threshold);
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
|
||||
"Thermal Slowdown Engaged | Temp higher than WARN Threshold\n");
|
||||
}
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
|
||||
"Thermal Slowdown Engaged | Links Thermal Mode %s\n", (slowdown_status.bLinksL1Status ? "ON" : "OFF"));
|
||||
|
||||
if (slowdown_status.source.bPmgr) // PMGR_THERM_ALERT
|
||||
{
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
|
||||
"Thermal Slowdown Engaged | PMGR WARN Threshold reached\n");
|
||||
}
|
||||
}
|
||||
else // REVERT_SLOWDOWN
|
||||
{
|
||||
temperature = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.maxTemperature);
|
||||
threshold = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(slowdown_status.warnThreshold);
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_END,
|
||||
"NVSWITCH Temperature %dC | TSENSE WARN Threshold %dC\n",
|
||||
temperature, threshold);
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_END,
|
||||
"Thermal Slowdown Disengaged | Links Thermal Mode %s\n", (slowdown_status.bLinksL1Status ? "ON" : "OFF"));
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_END,
|
||||
"Thermal slowdown Disengaged\n");
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
case RM_SOE_THERM_MSG_ID_SHUTDOWN_STATUS:
|
||||
{
|
||||
shutdown_status = pMsg->msg.soeTherm.shutdown;
|
||||
if (shutdown_status.source.bTsense) // TSENSE_THERM_SHUTDOWN
|
||||
{
|
||||
temperature = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(shutdown_status.maxTemperature);
|
||||
threshold = RM_SOE_NV_TEMP_TO_CELSIUS_TRUNCED(shutdown_status.overtThreshold);
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_SHUTDOWN,
|
||||
"NVSWITCH Temperature %dC | OVERT Threshold %dC\n",
|
||||
temperature, threshold);
|
||||
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_SHUTDOWN,
|
||||
"TSENSE OVERT Threshold reached. Shutting Down\n");
|
||||
}
|
||||
|
||||
if (shutdown_status.source.bPmgr) // PMGR_THERM_SHUTDOWN
|
||||
{
|
||||
NVSWITCH_PRINT_SXID(device, NVSWITCH_ERR_HW_HOST_THERMAL_EVENT_START,
|
||||
"PMGR OVERT Threshold reached. Shutting Down\n");
|
||||
}
|
||||
break;
|
||||
}
|
||||
default:
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR, "%s Unknown message Id\n", __FUNCTION__);
|
||||
NVSWITCH_ASSERT(0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// nvswitch_therm_read_voltage
|
||||
//
|
||||
|
||||
@@ -5080,3 +5080,21 @@ nvswitch_lib_ctrl
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
#if defined(DEVELOP) || defined(DEBUG) || defined(NV_MODS)
|
||||
void nvswitch_assert_log
|
||||
(
|
||||
const char *function,
|
||||
const char *file,
|
||||
NvU32 line
|
||||
)
|
||||
{
|
||||
nvswitch_os_assert_log("NVSwitch: Assertion failed in %s() at %s:%d\n",
|
||||
function, file, line);
|
||||
}
|
||||
#else
|
||||
void nvswitch_assert_log(void)
|
||||
{
|
||||
nvswitch_os_assert_log("NVSwitch: Assertion failed\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user