mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-23 00:13:59 +00:00
530.30.02
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@@ -315,6 +315,7 @@ typedef enum
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NV_SOC_IRQ_DPAUX_TYPE,
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NV_SOC_IRQ_GPIO_TYPE,
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NV_SOC_IRQ_HDACODEC_TYPE,
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NV_SOC_IRQ_TCPC2DISP_TYPE,
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NV_SOC_IRQ_INVALID_TYPE
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} nv_soc_irq_type_t;
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@@ -329,6 +330,7 @@ typedef struct nv_soc_irq_info_s {
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NvU32 gpio_num;
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NvU32 dpaux_instance;
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} irq_data;
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NvS32 ref_count;
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} nv_soc_irq_info_t;
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#define NV_MAX_SOC_IRQS 6
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@@ -384,9 +386,11 @@ typedef struct nv_state_t
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NvS32 current_soc_irq;
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NvU32 num_soc_irqs;
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NvU32 hdacodec_irq;
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NvU32 tcpc2disp_irq;
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NvU8 *soc_dcb_blob;
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NvU32 soc_dcb_size;
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NvU32 disp_sw_soc_chip_id;
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NvBool soc_is_dpalt_mode_supported;
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NvU32 igpu_stall_irq[NV_IGPU_MAX_STALL_IRQS];
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NvU32 igpu_nonstall_irq;
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@@ -649,7 +653,8 @@ static inline NvBool IS_REG_OFFSET(nv_state_t *nv, NvU64 offset, NvU64 length)
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static inline NvBool IS_FB_OFFSET(nv_state_t *nv, NvU64 offset, NvU64 length)
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{
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return ((nv->fb) && (offset >= nv->fb->cpu_address) &&
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return ((nv->fb) && (nv->fb->size != 0) &&
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(offset >= nv->fb->cpu_address) &&
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((offset + (length - 1)) >= offset) &&
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((offset + (length - 1)) <= (nv->fb->cpu_address + (nv->fb->size - 1))));
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}
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@@ -739,7 +744,7 @@ nv_state_t* NV_API_CALL nv_get_ctl_state (void);
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void NV_API_CALL nv_set_dma_address_size (nv_state_t *, NvU32 );
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NV_STATUS NV_API_CALL nv_alias_pages (nv_state_t *, NvU32, NvU32, NvU32, NvU64, NvU64 *, void **);
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NV_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, NvU32, NvBool, NvU32, NvBool, NvBool, NvU64 *, void **);
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NV_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, NvU32, NvBool, NvU32, NvBool, NvBool, NvS32, NvU64 *, void **);
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NV_STATUS NV_API_CALL nv_free_pages (nv_state_t *, NvU32, NvBool, NvU32, void *);
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NV_STATUS NV_API_CALL nv_register_user_pages (nv_state_t *, NvU64, NvU64 *, void *, void **);
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@@ -915,7 +920,6 @@ NV_STATUS NV_API_CALL rm_write_registry_string (nvidia_stack_t *, nv_state_t *
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void NV_API_CALL rm_parse_option_string (nvidia_stack_t *, const char *);
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char* NV_API_CALL rm_remove_spaces (const char *);
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char* NV_API_CALL rm_string_token (char **, const char);
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void NV_API_CALL rm_vgpu_vfio_set_driver_vm(nvidia_stack_t *, NvBool);
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NV_STATUS NV_API_CALL rm_run_rc_callback (nvidia_stack_t *, nv_state_t *);
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void NV_API_CALL rm_execute_work_item (nvidia_stack_t *, void *);
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@@ -985,11 +989,12 @@ const char* NV_API_CALL rm_get_dynamic_power_management_status(nvidia_stack_t *,
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const char* NV_API_CALL rm_get_gpu_gcx_support(nvidia_stack_t *, nv_state_t *, NvBool);
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void NV_API_CALL rm_acpi_notify(nvidia_stack_t *, nv_state_t *, NvU32);
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void NV_API_CALL rm_acpi_nvpcf_notify(nvidia_stack_t *);
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NvBool NV_API_CALL rm_is_altstack_in_use(void);
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/* vGPU VFIO specific functions */
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NV_STATUS NV_API_CALL nv_vgpu_create_request(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU32, NvU16 *, NvU32);
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NV_STATUS NV_API_CALL nv_vgpu_create_request(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU32, NvU16 *, NvU32, NvBool *);
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NV_STATUS NV_API_CALL nv_vgpu_delete(nvidia_stack_t *, const NvU8 *, NvU16);
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NV_STATUS NV_API_CALL nv_vgpu_get_type_ids(nvidia_stack_t *, nv_state_t *, NvU32 *, NvU32 *, NvBool, NvU8, NvBool);
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NV_STATUS NV_API_CALL nv_vgpu_get_type_info(nvidia_stack_t *, nv_state_t *, NvU32, char *, int, NvU8);
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