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530.30.02

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This commit is contained in:
Andy Ritger
2023-02-28 11:12:44 -08:00
parent e598191e8e
commit 4397463e73
928 changed files with 124728 additions and 88525 deletions
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36
src/nvidia/generated/g_gpu_mgr_nvoc.h
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@@ -7,7 +7,7 @@ extern "C" {
#endif
/*
* SPDX-FileCopyrightText: Copyright (c) 2005-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2005-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -30,6 +30,7 @@ extern "C" {
*/
#include "g_gpu_mgr_nvoc.h"
#ifndef _GPUMGR_H_
#define _GPUMGR_H_
@@ -52,6 +53,8 @@ struct OBJGPU;
#include "nvoc/utility.h"
#include "nv_firmware_types.h"
#include "gpu_mgr/gpu_mgr_sli.h"
#include "gpu/perf/kern_perf_gpuboostsync.h"
#include "utils/nvbitvector.h"
@@ -78,7 +81,6 @@ TYPEDEF_BITVECTOR(MC_ENGINE_BITVECTOR);
#define gpumgrGetSliLinkConnectionCount(pGpu) ((NvU32) 0)
#define gpumgrGetSLIConfig(gpuInstance, onlyWithSliLink) ((NvU32) 0)
#define gpumgrDisableVidLink(pGpu, head, max_dr_port)
#define gpumgrPinsetToPinsetTableIndex(pinset, pPinsetIndex) (NV_ERR_NOT_SUPPORTED)
#define gpumgrGetBcEnabledStatus(g) (NV_FALSE)
#define gpumgrGetBcEnabledStatusEx(g, t) (NV_FALSE)
#define gpumgrSetBcEnabledStatus(g, b) do { NvBool b2 = b; (void)b2; } while (0)
@@ -86,7 +88,6 @@ TYPEDEF_BITVECTOR(MC_ENGINE_BITVECTOR);
#define gpumgrSLILoopReentrancyPop(pGpu) ((NvU32)0)
#define gpumgrSLILoopReentrancyPush(pGpu, sliLoopReentrancy) do { NvU32 x = sliLoopReentrancy; (void)x; } while(0)
typedef struct
{
NvU32 gpuId;
@@ -131,6 +132,23 @@ typedef struct _def_gpumgr_save_vbios_state
#define SLI_BT_VIDLINK 0
#define SLI_BT_NVLINK 1
/*!
* SLI link detection HAL flag defines for Sli/Vid/NvLink link detection HAL functions.
*/
#define GPU_LINK_DETECTION_HAL_STUB 0
#define GPU_LINK_DETECTION_HAL_GK104 1
#define GPU_LINK_DETECTION_HAL_GP100 2
#define GPU_LINK_DETECTION_HAL_GP102 3
//
// GPU NVLINK reduced bandwidth mode
//
#define GPU_NVLINK_BW_MODE_FULL (0x0)
#define GPU_NVLINK_BW_MODE_OFF (0x1)
#define GPU_NVLINK_BW_MODE_MIN (0x2)
#define GPU_NVLINK_BW_MODE_HALF (0x3)
#define GPU_NVLINK_BW_MODE_3QUARTER (0x4)
typedef struct NVLINK_TOPOLOGY_PARAMS
{
NvU32 sysmemLinks;
@@ -250,11 +268,13 @@ struct OBJGPUMGR {
struct OBJGPUGRP *pGpuGrpTable[32];
NvU32 gpuInstMaskTable[32];
NvU8 gpuBridgeType;
NvU8 gpuSliLinkRoute[2][32][32][2];
SLI_GPU_BOOST_SYNC sliGpuBoostSync;
GPUMGRSAVEVBIOSSTATE primaryVbiosState;
NvU8 powerDisconnectedGpuCount;
NvU8 powerDisconnectedGpuBus[32];
NVLINK_TOPOLOGY_INFO nvlinkTopologyInfo[32];
NvU8 nvlinkBwMode;
GPUMGR_SAVE_MIG_INSTANCE_TOPOLOGY MIGTopologyInfo[32];
GPU_HANDLE_ID gpuHandleIDList[32];
NvU32 numGpuHandles;
@@ -341,6 +361,15 @@ NV_STATUS gpumgrSetGpuInitDisabledNvlinks_IMPL(NvU32 gpuId, NvU32 mask, NvBool b
NV_STATUS gpumgrGetGpuInitDisabledNvlinks_IMPL(NvU32 gpuId, NvU32 *pMask, NvBool *pbSkipHwNvlinkDisable);
#define gpumgrGetGpuInitDisabledNvlinks(gpuId, pMask, pbSkipHwNvlinkDisable) gpumgrGetGpuInitDisabledNvlinks_IMPL(gpuId, pMask, pbSkipHwNvlinkDisable)
NvU8 gpumgrGetGpuNvlinkBwMode_IMPL(void);
#define gpumgrGetGpuNvlinkBwMode() gpumgrGetGpuNvlinkBwMode_IMPL()
void gpumgrSetGpuNvlinkBwModeFromRegistry_IMPL(struct OBJGPU *pGpu);
#define gpumgrSetGpuNvlinkBwModeFromRegistry(pGpu) gpumgrSetGpuNvlinkBwModeFromRegistry_IMPL(pGpu)
NV_STATUS gpumgrSetGpuNvlinkBwMode_IMPL(NvU8 mode);
#define gpumgrSetGpuNvlinkBwMode(mode) gpumgrSetGpuNvlinkBwMode_IMPL(mode)
NvBool gpumgrCheckIndirectPeer_IMPL(struct OBJGPU *pGpu, struct OBJGPU *pRemoteGpu);
#define gpumgrCheckIndirectPeer(pGpu, pRemoteGpu) gpumgrCheckIndirectPeer_IMPL(pGpu, pRemoteGpu)
@@ -482,6 +511,7 @@ NvBool gpumgrSetGpuAcquire(OBJGPU *pGpu);
void gpumgrSetGpuRelease(void);
NvU8 gpumgrGetGpuBridgeType(void);
NvBool gpumgrAreAllGpusInOffloadMode(void);
NvBool gpumgrIsSafeToReadGpuInfo(void);
//
// gpumgrIsSubDeviceCountOne