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570.158.01
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 1993-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -238,7 +238,7 @@ NV_STATUS gsyncRefSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFT
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NV_STATUS gsyncRefMaster_P2060 (OBJGPU *, OBJGSYNC *, REFTYPE, NvU32 *DisplayMask,
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NvU32 *Refresh, NvBool retainMaster,
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NvBool skipSwapBarrierWar);
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NV_STATUS gsyncRefSlaves_P2060 (OBJGPU *, PDACEXTERNALDEVICE, REFTYPE, NvU32 *DisplayMask_s, NvU32 *Refresh);
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NV_STATUS gsyncRefSlaves_P2060 (OBJGPU *, OBJGSYNC *, REFTYPE, NvU32 *DisplayMask_s, NvU32 *Refresh);
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NV_STATUS gsyncGetCplStatus_P2060 (OBJGPU *, PDACEXTERNALDEVICE, GSYNCSTATUS, NvU32 *);
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NV_STATUS gsyncGetEmitTestSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32 *);
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NV_STATUS gsyncSetEmitTestSignal_P2060 (OBJGPU *, PDACEXTERNALDEVICE, NvU32);
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 1993-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -33,6 +33,6 @@ NV_STATUS gsyncSetHouseSyncMode_P2061(OBJGPU *, DACEXTERNALDEVICE *, NvU8);
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NV_STATUS gsyncGetCplStatus_P2061 (OBJGPU *, DACEXTERNALDEVICE *, GSYNCSTATUS, NvU32 *);
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NV_STATUS gsyncSetSyncSkew_P2061_V204(OBJGPU *, DACEXTERNALDEVICE *, NvU32);
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NV_STATUS gsyncGetSyncSkew_P2061_V204(OBJGPU *, DACEXTERNALDEVICE *, NvU32 *);
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NV_STATUS gsyncSetRasterSyncDecodeMode_P2061_V300(OBJGPU *, DACEXTERNALDEVICE *);
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NV_STATUS gsyncSetRasterSyncDecodeMode_P2061_V300(OBJGPU *, OBJGPU *, DACEXTERNALDEVICE *);
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#endif // DAC_P2061_H
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@@ -183,16 +183,12 @@ void pmaFreeList(PMA *pPma, PRANGELISTTYPE *ppList);
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* @param[in] physAddrBase The base address of this address tree
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* @param[in] pBlacklistPageBase Structure that contains the blacklisted pages
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* @param[in] blacklistCount Number of blacklisted pages
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* @param[in] bBlacklistFromInforom Whether the blacklisted pages are coming from
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* inforom (i.e., from heap/PMA init) or not
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* (i.e., from ECC interrupt handling)
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*
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* @return NV_OK
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* NV_ERR_NO_MEMORY if memory allocation fails
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*/
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NV_STATUS pmaRegisterBlacklistInfo(PMA *pPma, NvU64 physAddrBase,
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PPMA_BLACKLIST_ADDRESS pBlacklistPageBase, NvU32 blacklistCount,
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NvBool bBlacklistFromInforom);
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PPMA_BLACKLIST_ADDRESS pBlacklistPageBase, NvU32 blacklistCount);
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/*!
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* @brief Query blacklisting states tracked by PMA
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