mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-04-23 07:49:08 +00:00
560.28.03
This commit is contained in:
Gaurav Juvekar
@@ -36,6 +36,7 @@
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#include "ctrl/ctrl0073/ctrl0073specific.h" // NV0073_CTRL_HDCP_VPRIME_SIZE
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#include "displayport.h"
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#define NV_SUPPORTED_DP_LINK_RATES__SIZE NV_SUPPORTED_DP1X_LINK_RATES__SIZE
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namespace DisplayPort
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{
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typedef NvU64 LinkRate;
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@@ -44,58 +45,36 @@ namespace DisplayPort
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{
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public:
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NvU8 entries;
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// Store link rate in multipler of 10MBPS to save space
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NvU16 element[NV_SUPPORTED_DP_LINK_RATES__SIZE];
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virtual void clear() = 0;
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virtual bool import(NvU8 linkBw)
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{
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DP_ASSERT(0);
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return false;
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}
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virtual LinkRate getLowerRate(LinkRate rate) = 0;
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virtual LinkRate getMaxRate() = 0;
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virtual NvU8 getNumElements() = 0;
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NvU8 getNumLinkRates()
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{
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return entries;
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}
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};
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class LinkRates1x : virtual public LinkRates
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{
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public:
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// Store link rate in multipler of 270MBPS to save space
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NvU8 element[NV_SUPPORTED_DP1X_LINK_RATES__SIZE];
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LinkRates1x()
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LinkRates()
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{
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entries = 0;
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for (int i = 0; i < NV_SUPPORTED_DP1X_LINK_RATES__SIZE; i++)
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for (int i = 0; i < NV_SUPPORTED_DP_LINK_RATES__SIZE; i++)
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{
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element[i] = 0;
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}
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}
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virtual void clear()
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void clear()
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{
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entries = 0;
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for (int i = 0; i < NV_SUPPORTED_DP1X_LINK_RATES__SIZE; i++)
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for (int i = 0; i < NV_SUPPORTED_DP_LINK_RATES__SIZE; i++)
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{
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element[i] = 0;
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}
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}
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virtual bool import(NvU8 linkBw)
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bool import(NvU16 linkBw)
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{
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if (!IS_VALID_LINKBW(linkBw))
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if (!IS_VALID_LINKBW_10M(linkBw))
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{
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DP_ASSERT(0 && "Unsupported Link Bandwidth");
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return false;
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}
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if (entries < NV_SUPPORTED_DP1X_LINK_RATES__SIZE)
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if (entries < NV_SUPPORTED_DP_LINK_RATES__SIZE)
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{
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element[entries] = linkBw;
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entries++;
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@@ -105,47 +84,49 @@ namespace DisplayPort
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return false;
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}
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virtual LinkRate getLowerRate(LinkRate rate)
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LinkRate getLowerRate(LinkRate rate)
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{
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int i;
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NvU8 linkBw = (NvU8)(rate / DP_LINK_BW_FREQ_MULTI_MBPS);
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if ((entries == 0) || (linkBw <= element[0]))
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if ((entries == 0) || (rate <= element[0]))
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return 0;
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for (i = entries - 1; i > 0; i--)
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{
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if (linkBw > element[i])
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if (rate > element[i])
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break;
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}
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rate = (LinkRate)element[i] * DP_LINK_BW_FREQ_MULTI_MBPS;
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return rate;
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return ((LinkRate)element[i]);
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}
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virtual LinkRate getMaxRate()
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LinkRate getMaxRate()
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{
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LinkRate rate = 0;
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if ((entries > 0) &&
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(entries <= NV_SUPPORTED_DP1X_LINK_RATES__SIZE))
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(entries <= NV_SUPPORTED_DP_LINK_RATES__SIZE))
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{
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rate = (LinkRate)element[entries - 1] * DP_LINK_BW_FREQ_MULTI_MBPS;
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rate = (LinkRate)element[entries - 1];
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}
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return rate;
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}
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virtual NvU8 getNumElements()
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NvU8 getNumElements()
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{
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return NV_SUPPORTED_DP1X_LINK_RATES__SIZE;
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return NV_SUPPORTED_DP_LINK_RATES__SIZE;
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}
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NvU8 getNumLinkRates()
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{
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return entries;
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}
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};
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class LinkPolicy : virtual public Object
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{
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protected:
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bool bNoFallback; // No fallback when LT fails
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LinkRates1x linkRates;
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LinkRates linkRates;
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public:
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LinkPolicy() : bNoFallback(false)
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{
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@@ -281,8 +262,40 @@ namespace DisplayPort
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return linkTrainCounter;
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}
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// Returns data rate in Bytes per second
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NvU64 convertLinkRateToDataRate(LinkRate linkRate) const
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{
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NvU64 dataRate;
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dataRate = LINK_RATE_TO_DATA_RATE_8B_10B(linkRate);
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return dataRate;
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}
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// Returns minRate in data rate in Bytes per second
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NvU64 convertMinRateToDataRate() const
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{
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NvU64 dataRate;
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dataRate = DP_LINK_RATE_BITSPS_TO_BYTESPS(OVERHEAD_8B_10B(minRate));
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return dataRate;
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}
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NvU64 getTotalDataRate() const
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{
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return (convertLinkRateToDataRate(peakRate) * lanes);
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}
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NvU64 linkOverhead(NvU64 rate)
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{
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if(IS_VALID_LINKBW_10M(rate))
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{
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// Converting here so that minRate from 10M is converted to bps
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rate = DP_LINK_RATE_10M_TO_BPS(rate);
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}
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else
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{
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// Convert from data rate to bps
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rate = DATA_RATE_8B_10B_TO_LINK_RATE_BPS(rate);
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}
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if(bEnableFEC)
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{
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@@ -356,74 +369,89 @@ namespace DisplayPort
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if (TotalLinkPBN <= 90)
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{
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peakRatePossible = peakRate = RBR;
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minRate = linkOverhead(RBR);
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peakRatePossible = dp2LinkRate_1_62Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_1_62Gbps);
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lanes = 0; // FAIL
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}
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if (TotalLinkPBN <= 192)
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{
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peakRatePossible = peakRate = RBR;
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minRate = linkOverhead(RBR);
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peakRatePossible = dp2LinkRate_1_62Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_1_62Gbps);
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lanes = 1;
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}
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else if (TotalLinkPBN <= 320)
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{
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peakRatePossible = peakRate = HBR;
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minRate = linkOverhead(HBR);
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peakRatePossible = dp2LinkRate_2_70Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_2_70Gbps);
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lanes = 1;
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}
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else if (TotalLinkPBN <= 384)
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{
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peakRatePossible = peakRate = RBR;
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minRate = linkOverhead(RBR);
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peakRatePossible = dp2LinkRate_1_62Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_1_62Gbps);
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lanes = 2;
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}
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else if (TotalLinkPBN <= 640)
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{
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// could be HBR2 x 1, but TotalLinkPBN works out same
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peakRatePossible = peakRate = HBR;
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minRate = linkOverhead(HBR);
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peakRatePossible = dp2LinkRate_2_70Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_2_70Gbps);
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lanes = 2;
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}
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else if (TotalLinkPBN <= 768)
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{
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peakRatePossible = peakRate = RBR;
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minRate = linkOverhead(RBR);
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peakRatePossible = dp2LinkRate_1_62Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_1_62Gbps);
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lanes = 4;
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}
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else if (TotalLinkPBN <= 960)
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{
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peakRatePossible = peakRate = HBR3;
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minRate = linkOverhead(HBR3);
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peakRatePossible = dp2LinkRate_8_10Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_8_10Gbps);
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lanes = 1;
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}
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else if (TotalLinkPBN <= 1280)
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{
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// could be HBR2 x 2
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peakRatePossible = peakRate = HBR;
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minRate = linkOverhead(HBR);
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peakRatePossible = dp2LinkRate_2_70Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_2_70Gbps);
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lanes = 4;
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}
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else if (TotalLinkPBN <= 1920)
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{
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peakRatePossible = peakRate = HBR3;
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minRate = linkOverhead(HBR3);
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peakRatePossible = dp2LinkRate_8_10Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_8_10Gbps);
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lanes = 2;
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}
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else if (TotalLinkPBN <= 2560)
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{
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peakRatePossible = peakRate = HBR2;
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minRate = linkOverhead(HBR2);
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peakRatePossible = dp2LinkRate_5_40Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_5_40Gbps);
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lanes = 4;
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}
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else if (TotalLinkPBN <= 3840)
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{
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peakRatePossible = peakRate = HBR3;
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minRate = linkOverhead(HBR3);
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peakRatePossible = dp2LinkRate_8_10Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_8_10Gbps);
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lanes = 4;
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}
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else {
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peakRatePossible = peakRate = RBR, minRate = linkOverhead(RBR), lanes = 0; // FAIL
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else
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{
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peakRatePossible = dp2LinkRate_1_62Gbps;
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peakRate = peakRatePossible;
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minRate = linkOverhead(dp2LinkRate_1_62Gbps);
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lanes = 0; // FAIL
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DP_ASSERT(0 && "Unknown configuration");
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}
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}
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@@ -512,7 +540,7 @@ namespace DisplayPort
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NvU32 slotsForPBN(NvU32 allocatedPBN, bool usable = false)
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{
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NvU64 bytes_per_pbn = 54 * 1000000 / 64; // this comes out exact
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NvU64 bytes_per_timeslot = peakRate * lanes / 64;
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NvU64 bytes_per_timeslot = getTotalDataRate() / 64;
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if (bytes_per_timeslot == 0)
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return (NvU32)-1;
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@@ -532,7 +560,7 @@ namespace DisplayPort
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NvU32 PBNForSlots(NvU32 slots) // Rounded down
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{
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NvU64 bytes_per_pbn = 54 * 1000000 / 64; // this comes out exact
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NvU64 bytes_per_timeslot = peakRate * lanes / 64;
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NvU64 bytes_per_timeslot = getTotalDataRate() / 64;
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return (NvU32)(bytes_per_timeslot * slots/ bytes_per_pbn);
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}
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@@ -553,8 +581,8 @@ namespace DisplayPort
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bool operator< (const LinkConfiguration & right) const
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{
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NvU64 leftMKBps = peakRate * lanes;
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NvU64 rightMKBps = right.peakRate * right.lanes;
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NvU64 leftMKBps = getTotalDataRate();
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NvU64 rightMKBps = right.getTotalDataRate();
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if (leftMKBps == rightMKBps)
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{
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@@ -567,10 +595,5 @@ namespace DisplayPort
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}
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};
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#define IS_DP2X_UHBR_LINK_DATA_RATE(val) (((NvU32)(val) == UHBR_2_50GHZ) || \
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((NvU32)(val) == UHBR_2_70GHZ) || \
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((NvU32)(val) == UHBR_10_0GHZ) || \
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((NvU32)(val) == UHBR_13_5GHZ) || \
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((NvU32)(val) == UHBR_20_0GHZ))
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}
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#endif //INCLUDED_DP_LINKCONFIG_H
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