mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-26 01:43:59 +00:00
560.28.03
This commit is contained in:
@@ -136,6 +136,8 @@ typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS {
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_3_1 (0x00000006U)
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_4_0 (0x00000007U)
|
||||
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NVLINK_VERSION_5_0 (0x00000008U)
|
||||
|
||||
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_INVALID (0x00000000U)
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_1_0 (0x00000001U)
|
||||
@@ -145,6 +147,8 @@ typedef struct NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS {
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_3_1 (0x00000006U)
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_4_0 (0x00000007U)
|
||||
|
||||
#define NV2080_CTRL_NVLINK_CAPS_NCI_VERSION_5_0 (0x00000008U)
|
||||
|
||||
|
||||
/*
|
||||
* NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS
|
||||
@@ -374,6 +378,8 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO {
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_3_1 (0x00000006U)
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_4_0 (0x00000007U)
|
||||
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_5_0 (0x00000008U)
|
||||
|
||||
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NVLINK_VERSION_INVALID (0x000000FFU)
|
||||
|
||||
@@ -384,6 +390,8 @@ typedef struct NV2080_CTRL_NVLINK_LINK_STATUS_INFO {
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_3_1 (0x00000006U)
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_4_0 (0x00000007U)
|
||||
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_5_0 (0x00000008U)
|
||||
|
||||
|
||||
#define NV2080_CTRL_NVLINK_STATUS_NCI_VERSION_INVALID (0x000000FFU)
|
||||
|
||||
@@ -866,6 +874,118 @@ typedef struct NV2080_CTRL_NVLINK_CLEAR_COUNTERS_PARAMS {
|
||||
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_V1_MAX_COUNTER NV2080_CTRL_NVLINK_COUNTER_LP_DL
|
||||
|
||||
/* Transmit Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_XMIT_PACKETS 22U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_XMIT_BYTES 23U
|
||||
/* Received Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_PACKETS 24U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_BYTES 25U
|
||||
/* Link Events */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LINK_ERROR_RECOVERY_COUNTER 26U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LINK_DOWNED_COUNTER 27U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LINK_RECOVERY_SUCCESSFUL_COUNTER 28U
|
||||
/* Link Receive Errors */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_ERRORS 29U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_REMOTE_ERRORS 30U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_GENERAL_ERRORS 31U
|
||||
/* Link Receive Errors Detail */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_MALFORMED_PKT_ERROR 32U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_BUFFER_OVERRUN_ERROR 33U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RCV_VL15DROPPED_ERROR 34U
|
||||
/* Link Other Errors Detail */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LINK_INTEGRITY_ERRORS 35U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_BUFFER_OVERRUN_ERRORS 36U
|
||||
/* Link Transmit Errors */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_XMIT_WAIT_TIME 37U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_XMIT_ERRORS 38U
|
||||
/* FEC Block Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_SINGLE_ERROR_BLOCKS 39U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_CORRECTED_BLOCKS 40U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_UNCORRECTED_BLOCKS 41U
|
||||
/* FEC Symbol Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_CORRECTED_SYMBOLS_LANE_0 42U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_CORRECTED_SYMBOLS_LANE_1 43U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_CORRECTED_SYMBOLS_TOTAL 44U
|
||||
/* FEC Raw Error Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RAW_ERRORS_LANE_0 45U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RAW_ERRORS_LANE_1 46U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_CORRECTED_BITS 47U
|
||||
/* FEC Raw BER */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RAW_BER_LANE_0 48U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RAW_BER_LANE_1 49U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RAW_BER_TOTAL 50U
|
||||
/* FEC Effective BER */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_NO_ERROR_BLOCKS 51U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_EFFECTIVE_ERRORS 52U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_EFFECTIVE_BER 53U
|
||||
/* Phy Symbol Errors Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_SYMBOL_ERRORS 54U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_SYMBOL_BER 55U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_RECEIVED_BITS 56U
|
||||
/* Phy Other Errors Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_SYNC_HEADER_ERRORS 57U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_TIME_SINCE_LAST_CLEAR 58U
|
||||
/* PLR Receive Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_PLR_RCV_BLOCKS 59U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_PLR_RCV_BLOCKS_WITH_UNCORRECTABLE_ERRORS 60U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_PLR_RCV_BLOCKS_WITH_ERRORS 61U
|
||||
/* PLR Transmit Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_PLR_XMIT_BLOCKS 62U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_PLR_XMIT_RETRY_BLOCKS 63U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_PLR_XMIT_RETRY_EVENTS 64U
|
||||
/* PLR BW Loss Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_PLR_BW_LOSS 65U
|
||||
/* NVLE Rx counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_NVLE_RX_GOOD 66U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_NVLE_RX_ERROR 67U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_NVLE_RX_AUTH 68U
|
||||
/* NVLE Tx Counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_NVLE_TX_GOOD 69U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_NVLE_TX_ERROR 70U
|
||||
/* FEC Histogram */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_0 71U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_1 72U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_2 73U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_3 74U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_4 75U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_5 76U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_6 77U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_7 78U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_8 79U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_9 80U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_10 81U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_11 82U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_12 83U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_13 84U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_14 85U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_HISTORY_15 86U
|
||||
|
||||
/* Throughput counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_TP_RX_DATA 87U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_TP_TX_DATA 88U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_TP_RX_RAW 89U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_TP_TX_RAW 90U
|
||||
|
||||
/* Low power counters */
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_ENTRY 91U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_ENTRY_FORCE 92U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_EXIT 93U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_EXIT_RECAL 94U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_EXIT_REMOTE 95U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_LP_STEADY_STATE_TIME 96U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_HIGH_SPEED_STEADY_STATE_TIME 97U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_L1_OTHER_STATE_TIME 98U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_LOCAL_ENTRY_TIME 99U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_LOCAL_EXIT_TIME 100U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_LOCAL_FULL_BW_ENTRY_TIME 101U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_LOCAL_FULL_BW_EXIT_TIME 102U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_REMOTE_ENTRY_TIME 103U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_REMOTE_EXIT_TIME 104U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_REMOTE_FULL_BW_ENTRY_TIME 105U
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_LP_REMOTE_FULL_BW_EXIT_TIME 106U
|
||||
|
||||
#define NV2080_CTRL_NVLINK_COUNTERS_MAX 107U
|
||||
|
||||
|
||||
|
||||
#define NV2080_CTRL_NVLINK_COUNTER_MAX_GROUPS 2U
|
||||
@@ -945,14 +1065,145 @@ typedef struct NV2080_CTRL_NVLINK_INJECT_ERROR_PARAMS {
|
||||
} NV2080_CTRL_NVLINK_INJECT_ERROR_PARAMS;
|
||||
|
||||
/* NVLINK unit list - to be used with error notifiers */
|
||||
#define NV2080_CTRL_NVLINK_UNIT_DL 0x01U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TL 0x02U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TLC_RX_0 0x03U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TLC_RX_1 0x04U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TLC_TX_0 0x05U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_MIF_RX_0 0x06U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_MIF_TX_0 0x07U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_MINION 0x08U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_DL 0x01U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TL 0x02U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TLC_RX_0 0x03U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TLC_RX_1 0x04U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_TLC_TX_0 0x05U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_MIF_RX_0 0x06U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_MIF_TX_0 0x07U
|
||||
#define NV2080_CTRL_NVLINK_UNIT_MINION 0x08U
|
||||
|
||||
/*
|
||||
* NV2080_CTRL_NVLINK_ERROR_INJECT_CFG
|
||||
*
|
||||
* [in] errType
|
||||
* This parameter specifies the type of error injection settings
|
||||
* [in] errSettings
|
||||
* This parameter specifies the settings for the error type in NVL5
|
||||
*/
|
||||
|
||||
typedef enum NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE {
|
||||
NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE_TX_ERR = 1,
|
||||
NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE_PKT_ERR = 2,
|
||||
NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE_AUTH_TAG_ERR = 3,
|
||||
NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE_LINK_ERR = 4,
|
||||
NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE_MAX = 5,
|
||||
} NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE;
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_HW_ERROR_INJECT_CFG {
|
||||
NV2080_CTRL_NVLINK_HW_ERROR_INJECT_ERR_TYPE errType;
|
||||
NV_DECLARE_ALIGNED(NvU64 errSettings, 8);
|
||||
} NV2080_CTRL_NVLINK_HW_ERROR_INJECT_CFG;
|
||||
|
||||
/*
|
||||
* Tx error type settings
|
||||
*/
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_TX_ERR_TYPE 31:28
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_TX_ERR_TYPE_NO_ERROR 0x00000000U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_TX_ERR_TYPE_RAW_BER 0x00000001U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_TX_ERR_TYPE_EFFECTIVE_BER 0x00000002U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_TX_ERR_ERR_INJECT_DURATION 27:12 // Error Injection Duration, in 10ms units.
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_TX_ERR_BER_MANTISSA 11:8
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_TX_ERR_BER_EXPONENT 7:0
|
||||
|
||||
/*
|
||||
* Packet error type settings
|
||||
*/
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_INJECT_COUNT 15:0
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_STOMP 16:16
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_STOMP_DIS 0x00000000U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_STOMP_EN 0x00000001U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_POISON 17:17
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_POISON_DIS 0x00000000U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_POISON_EN 0x00000001U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_PKT_ERR_CLEAR_COUNTERS 18:18
|
||||
|
||||
/*
|
||||
* Authentication error type settings
|
||||
*/
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_AUTH_TAG_ERR_PIPE_INDEX 3:0
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_AUTH_TAG_ERR_AUTH_ERR 4:4
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_AUTH_TAG_ERR_AUTH_ERR_DIS 0x00000000U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_AUTH_TAG_ERR_AUTH_ERR_EN 0x00000001U
|
||||
|
||||
/*
|
||||
* Link Error type settings
|
||||
*/
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_LINK_ERR_FORCE_LINK_DOWN 0:0
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_LINK_ERR_FORCE_LINK_DOWN_DIS 0x00000000U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_LINK_ERR_FORCE_LINK_DOWN_EN 0x00000001U
|
||||
|
||||
/*
|
||||
* NV2080_CTRL_CMD_NVLINK_SET_HW_ERROR_INJECT
|
||||
* This command causes all the same actions to occur as if the related
|
||||
* error were to occur, either fatal or recoverable.
|
||||
*
|
||||
* [in] linkMask size: 64 bits
|
||||
* Mask of the links to be configured.
|
||||
* [in] errCfg
|
||||
* This parameter specifies that the error configurations.
|
||||
*/
|
||||
|
||||
#define NV2080_CTRL_NVLINK_SET_HW_ERROR_INJECT_PARAMS_MESSAGE_ID (0x81U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_SET_HW_ERROR_INJECT_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvU64 linkMask, 8);
|
||||
NV_DECLARE_ALIGNED(NV2080_CTRL_NVLINK_HW_ERROR_INJECT_CFG errCfg[NV2080_CTRL_NVLINK_MAX_LINKS], 8);
|
||||
} NV2080_CTRL_NVLINK_SET_HW_ERROR_INJECT_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_SET_HW_ERROR_INJECT (0x20803081U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_SET_HW_ERROR_INJECT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_STS_LINK_STATE 1:0
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_STS_LINK_STATE_UP 0x00000000U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_STS_LINK_STATE_DOWN_BY_REQUEST 0x00000001U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_STS_LINK_STATE_DOWN_BY_HW_ERR 0x00000002U
|
||||
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_STS_OPER_STS 0:0
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_STS_OPER_STS_NO_ERR_INJECT 0x00000000U
|
||||
#define NV2080_CTRL_NVLINK_HW_ERROR_INJECT_STS_OPER_STS_PERFORMING_ERR_INJECT 0x00000001U
|
||||
|
||||
/*
|
||||
* NV2080_CTRL_NVLINK_HW_ERROR_INJECT_INFO
|
||||
*
|
||||
* [out] txErrInfo
|
||||
* This info specifies the settings for Tx errs in NVL5
|
||||
* [out] packetErrSettings
|
||||
* This info specifies the settings for Pkt errs in NVL5
|
||||
* [out] authErrSettings
|
||||
* This info specifies the settings for NVLE errs in NVL5
|
||||
* [out] linkStatus
|
||||
* This specifies the status of the link in NVL5
|
||||
* [out] errInjectStatus
|
||||
* This specifies the status of error injection
|
||||
*/
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_HW_ERROR_INJECT_INFO {
|
||||
NvU32 txErrInfo;
|
||||
NvU32 packetErrInfo;
|
||||
NvU32 authErrInfo;
|
||||
NvU32 linkStatus;
|
||||
NvU32 errInjectStatus;
|
||||
} NV2080_CTRL_NVLINK_HW_ERROR_INJECT_INFO;
|
||||
|
||||
/*
|
||||
* NV2080_CTRL_CMD_NVLINK_GET_HW_ERROR_INJECT
|
||||
* This command get all the current nvlink error config
|
||||
*
|
||||
* [in] linkMask size: 64 bits
|
||||
* Mask of the links to be configured.
|
||||
* [in] errCfg
|
||||
* This parameter specifies that the error configurations.
|
||||
*/
|
||||
|
||||
#define NV2080_CTRL_NVLINK_GET_HW_ERROR_INJECT_PARAMS_MESSAGE_ID (0x82U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_GET_HW_ERROR_INJECT_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvU64 linkMask, 8);
|
||||
NV2080_CTRL_NVLINK_HW_ERROR_INJECT_INFO errInfo[NV2080_CTRL_NVLINK_MAX_LINKS];
|
||||
} NV2080_CTRL_NVLINK_GET_HW_ERROR_INJECT_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_GET_HW_ERROR_INJECT (0x20803082U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_HW_ERROR_INJECT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
/*
|
||||
* NV2080_CTRL_CMD_NVLINK_GET_ERROR_RECOVERIES
|
||||
@@ -3233,6 +3484,34 @@ typedef struct NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS {
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_IS_REDUCED_CONFIG (0x20803046U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MAX_LENGTH 496U
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_DATA {
|
||||
NvU8 data[NV2080_CTRL_NVLINK_PRM_ACCESS_MAX_LENGTH];
|
||||
} NV2080_CTRL_NVLINK_PRM_DATA;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PAOS (0x20803047U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS_MESSAGE_ID (0x47U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 plane_ind;
|
||||
NvU8 admin_status;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvU8 swid;
|
||||
NvU8 e;
|
||||
NvU8 fd;
|
||||
NvU8 ps_e;
|
||||
NvU8 ls_e;
|
||||
NvU8 ee_ps;
|
||||
NvU8 ee_ls;
|
||||
NvU8 ee;
|
||||
NvU8 ase;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PAOS_PARAMS;
|
||||
|
||||
|
||||
|
||||
/*!
|
||||
@@ -3246,6 +3525,621 @@ typedef struct NV2080_CTRL_NVLINK_IS_REDUCED_CONFIG_PARAMS {
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_FATAL_ERROR_RECOVERY (0x20803048U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | 0x48" */
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PLTC (0x20803053U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PLTC_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PLTC_PARAMS_MESSAGE_ID (0x53U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PLTC_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 lane_mask;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvU8 local_tx_precoding_admin;
|
||||
NvU8 local_rx_precoding_admin;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PLTC_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPLM (0x20803054U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPLM_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPLM_PARAMS_MESSAGE_ID (0x54U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPLM_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvBool test_mode;
|
||||
NvU8 plane_ind;
|
||||
NvU8 port_type;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvU8 fec_override_admin_10g_40g;
|
||||
NvU8 fec_override_admin_25g;
|
||||
NvU8 fec_override_admin_50g;
|
||||
NvU8 fec_override_admin_100g;
|
||||
NvU8 fec_override_admin_56g;
|
||||
NvU8 rs_fec_correction_bypass_admin;
|
||||
NvU16 fec_override_admin_200g_4x;
|
||||
NvU16 fec_override_admin_400g_8x;
|
||||
NvU16 fec_override_admin_50g_1x;
|
||||
NvU16 fec_override_admin_100g_2x;
|
||||
NvU16 fec_override_admin_400g_4x;
|
||||
NvU16 fec_override_admin_800g_8x;
|
||||
NvU16 fec_override_admin_100g_1x;
|
||||
NvU16 fec_override_admin_200g_2x;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPLM_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPSLC (0x20803055U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLC_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLC_PARAMS_MESSAGE_ID (0x55U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLC_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvBool l1_req_en;
|
||||
NvBool l1_fw_req_en;
|
||||
NvBool l1_cap_adv;
|
||||
NvBool l1_fw_cap_adv;
|
||||
NvU32 hp_queues_bitmap;
|
||||
NvU16 l1_hw_active_time;
|
||||
NvU16 l1_hw_inactive_time;
|
||||
NvU8 qem[8];
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLC_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MCAM (0x20803056U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MCAM_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MCAM_PARAMS_MESSAGE_ID (0x56U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MCAM_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 access_reg_group;
|
||||
NvU8 feature_group;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MCAM_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTECR (0x2080305cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS_MESSAGE_ID (0x5cU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 slot_index;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTECR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTWE (0x2080305dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS_MESSAGE_ID (0x5dU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTWE_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTEWE (0x2080305eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS_MESSAGE_ID (0x5eU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 slot_index;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTEWE_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTSDE (0x2080305fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTSDE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTSDE_PARAMS_MESSAGE_ID (0x5fU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTSDE_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 slot_index;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTSDE_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MGCR (0x20803060U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MGCR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MGCR_PARAMS_MESSAGE_ID (0x60U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MGCR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 segment;
|
||||
NvU32 GPIO_set;
|
||||
NvU32 GPIO_clear;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MGCR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTCAP (0x20803061U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTCAP_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTCAP_PARAMS_MESSAGE_ID (0x61U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTCAP_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 slot_index;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTCAP_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PMTU (0x20803062U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS_MESSAGE_ID (0x62U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvBool itre;
|
||||
NvU8 i_e;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvU8 protocol;
|
||||
NvU16 admin_mtu;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PMTU_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MCIA (0x20803063U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS_MESSAGE_ID (0x63U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 slot_index;
|
||||
NvU8 module;
|
||||
NvBool pnv;
|
||||
NvBool l;
|
||||
NvU16 device_address;
|
||||
NvU8 page_number;
|
||||
NvU8 i2c_device_address;
|
||||
NvU16 size;
|
||||
NvU8 bank_number;
|
||||
NvBool passwd_length;
|
||||
NvU32 password;
|
||||
NvU32 dword[32];
|
||||
NvU32 password_msb;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MCIA_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PMLP (0x20803064U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS_MESSAGE_ID (0x64U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 width;
|
||||
NvU8 plane_ind;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvBool m_lane_m;
|
||||
NvBool rxtx;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PMLP_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_GHPKT (0x20803065U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_GHPKT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_GHPKT_PARAMS_MESSAGE_ID (0x65U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_GHPKT_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU16 trap_id;
|
||||
NvU8 action;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_GHPKT_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PDDR (0x20803066U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PDDR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PDDR_PARAMS_MESSAGE_ID (0x66U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PDDR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 port_type;
|
||||
NvU8 plane_ind;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvU8 page_select;
|
||||
NvU8 module_info_ext;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PDDR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTMP (0x20803067U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTMP_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTMP_PARAMS_MESSAGE_ID (0x67U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTMP_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU16 sensor_index;
|
||||
NvU8 slot_index;
|
||||
NvU8 sdme;
|
||||
NvU8 weme;
|
||||
NvU8 mtr;
|
||||
NvU8 mte;
|
||||
NvU16 temperature_threshold_hi;
|
||||
NvU8 sdee;
|
||||
NvU8 tee;
|
||||
NvU16 temperature_threshold_lo;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTMP_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPTT (0x20803068U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPTT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPTT_PARAMS_MESSAGE_ID (0x68U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPTT_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvBool le;
|
||||
NvU8 port_type;
|
||||
NvU8 lane;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvBool sw;
|
||||
NvBool dm_ig;
|
||||
NvBool p;
|
||||
NvBool e;
|
||||
NvU8 modulation;
|
||||
NvU8 prbs_mode_admin;
|
||||
NvBool prbs_fec_admin;
|
||||
NvU16 lane_rate_admin;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPTT_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPCNT (0x20803069U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPCNT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPCNT_PARAMS_MESSAGE_ID (0x69U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPCNT_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 grp;
|
||||
NvU8 port_type;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvU8 swid;
|
||||
NvU8 prio_tc;
|
||||
NvU8 grp_profile;
|
||||
NvU8 plane_ind;
|
||||
NvBool counters_cap;
|
||||
NvBool lp_gl;
|
||||
NvBool clr;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPCNT_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MGIR (0x2080306aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MGIR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MGIR_PARAMS_MESSAGE_ID (0x6aU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MGIR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MGIR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPAOS (0x2080306bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPAOS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPAOS_PARAMS_MESSAGE_ID (0x6bU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPAOS_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 port_type;
|
||||
NvU8 phy_test_mode_admin;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvU8 swid;
|
||||
NvU8 plane_ind;
|
||||
NvU8 phy_status_admin;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPAOS_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPHCR (0x2080306cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPHCR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPHCR_PARAMS_MESSAGE_ID (0x6cU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPHCR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 plane_ind;
|
||||
NvU8 port_type;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvU8 hist_type;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPHCR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_SLTP (0x2080306dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_SLTP_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_SLTP_PARAMS_MESSAGE_ID (0x6dU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_SLTP_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvBool c_db;
|
||||
NvU8 port_type;
|
||||
NvU8 lane_speed;
|
||||
NvU8 lane;
|
||||
NvBool tx_policy;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvU8 lp_msb;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_SLTP_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PGUID (0x2080306eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PGUID_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PGUID_PARAMS_MESSAGE_ID (0x6eU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PGUID_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 plane_ind;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PGUID_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPRT (0x2080306fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPRT_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPRT_PARAMS_MESSAGE_ID (0x6fU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPRT_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvBool le;
|
||||
NvU8 port_type;
|
||||
NvU8 lane;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
NvBool sw;
|
||||
NvBool dm_ig;
|
||||
NvBool p;
|
||||
NvBool tun_ovr;
|
||||
NvBool s;
|
||||
NvBool e;
|
||||
NvU8 modulation;
|
||||
NvU8 prbs_mode_admin;
|
||||
NvU16 lane_rate_oper;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPRT_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PTYS (0x20803070U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PTYS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PTYS_PARAMS_MESSAGE_ID (0x70U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PTYS_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 proto_mask;
|
||||
NvBool transmit_allowed;
|
||||
NvU8 plane_ind;
|
||||
NvU8 port_type;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvU8 tx_ready_e;
|
||||
NvBool ee_tx_ready;
|
||||
NvBool an_disable_admin;
|
||||
NvU32 ext_eth_proto_admin;
|
||||
NvU32 eth_proto_admin;
|
||||
NvU16 ib_proto_admin;
|
||||
NvU16 ib_link_width_admin;
|
||||
NvBool xdr_2x_slow_admin;
|
||||
NvU8 force_lt_frames_admin;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PTYS_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_SLRG (0x20803071U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_SLRG_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_SLRG_PARAMS_MESSAGE_ID (0x71U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_SLRG_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 port_type;
|
||||
NvU8 lane;
|
||||
NvU8 lp_msb;
|
||||
NvU8 pnat;
|
||||
NvU8 local_port;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_SLRG_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PMAOS (0x20803072U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PMAOS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PMAOS_PARAMS_MESSAGE_ID (0x72U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PMAOS_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 admin_status;
|
||||
NvU8 module;
|
||||
NvU8 slot_index;
|
||||
NvBool rst;
|
||||
NvU8 e;
|
||||
NvBool ee;
|
||||
NvBool ase;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PMAOS_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPLR (0x20803073U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPLR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPLR_PARAMS_MESSAGE_ID (0x73U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPLR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 plane_ind;
|
||||
NvU8 port_type;
|
||||
NvBool op_mod;
|
||||
NvBool apply_im;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvU16 lb_en;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPLR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_GET_SUPPORTED_COUNTERS (0x20803074U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS_MESSAGE_ID" */
|
||||
#define NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS_MESSAGE_ID (0x74U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS {
|
||||
NV_DECLARE_ALIGNED(NvU64 counterMask[NV2080_CTRL_NVLINK_COUNTER_MAX_GROUPS], 8);
|
||||
} NV2080_CTRL_NVLINK_GET_SUPPORTED_COUNTERS_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MORD (0x20803075U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MORD_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MORD_PARAMS_MESSAGE_ID (0x75U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MORD_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU16 segment_type;
|
||||
NvU8 seq_num;
|
||||
NvBool vhca_id_valid;
|
||||
NvBool inline_dump;
|
||||
NvU16 vhca_id;
|
||||
NvU32 index1;
|
||||
NvU32 index2;
|
||||
NvU16 num_of_obj2;
|
||||
NvU16 num_of_obj1;
|
||||
NV_DECLARE_ALIGNED(NvU64 device_opaque, 8);
|
||||
NvU32 mkey;
|
||||
NV_DECLARE_ALIGNED(NvU64 address, 8);
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MORD_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTRC_CAP (0x20803076U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CAP_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CAP_PARAMS_MESSAGE_ID (0x76U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CAP_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvBool trace_owner;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CAP_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTRC_CONF (0x20803077U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CONF_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CONF_PARAMS_MESSAGE_ID (0x77U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CONF_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 trace_mode;
|
||||
NvU8 log_trace_buffer_size;
|
||||
NvU8 trace_mkey;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CONF_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTRC_CTRL (0x20803078U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CTRL_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CTRL_PARAMS_MESSAGE_ID (0x78U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CTRL_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU16 modify_field_select;
|
||||
NvBool arm_event;
|
||||
NvU8 trace_status;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTRC_CTRL_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTEIM (0x20803079U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTEIM_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTEIM_PARAMS_MESSAGE_ID (0x79U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTEIM_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTEIM_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTIE (0x2080307aU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTIE_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTIE_PARAMS_MESSAGE_ID (0x7aU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTIE_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 enable_all;
|
||||
NvU8 log_delay;
|
||||
NvU32 source_id_bitmask[8];
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTIE_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTIM (0x2080307bU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTIM_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTIM_PARAMS_MESSAGE_ID (0x7bU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTIM_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 log_level;
|
||||
NvU32 log_bit_mask;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTIM_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MPSCR (0x2080307cU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MPSCR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MPSCR_PARAMS_MESSAGE_ID (0x7cU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MPSCR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 warning_inactive_time;
|
||||
NvU8 warning_active_time;
|
||||
NvU8 critical_inactive_time;
|
||||
NvU8 critical_active_time;
|
||||
NvBool cc;
|
||||
NvU16 queue_depth_th;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MPSCR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MTSR (0x2080307dU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MTSR_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MTSR_PARAMS_MESSAGE_ID (0x7dU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MTSR_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MTSR_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PPSLS (0x2080307eU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLS_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLS_PARAMS_MESSAGE_ID (0x7eU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLS_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PPSLS_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_MLPC (0x2080307fU) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_MLPC_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_MLPC_PARAMS_MESSAGE_ID (0x7fU)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_MLPC_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvU8 cnt_64bit;
|
||||
NvBool stop_at_ff;
|
||||
NvBool counter_rst;
|
||||
NvBool counter_en;
|
||||
NvU8 force_count_mask;
|
||||
NvU8 cnt_type[8];
|
||||
NvU8 cnt_val[8];
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_MLPC_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_PRM_ACCESS_PLIB (0x20803080U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_PRM_ACCESS_PLIB_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_PRM_ACCESS_PLIB_PARAMS_MESSAGE_ID (0x80U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_PRM_ACCESS_PLIB_PARAMS {
|
||||
NvBool bWrite;
|
||||
NV2080_CTRL_NVLINK_PRM_DATA prm;
|
||||
NvU16 ib_port;
|
||||
NvU8 lp_msb;
|
||||
NvU8 local_port;
|
||||
NvU8 split_num;
|
||||
} NV2080_CTRL_NVLINK_PRM_ACCESS_PLIB_PARAMS;
|
||||
|
||||
#define NV2080_CTRL_CMD_NVLINK_GET_PLATFORM_INFO (0x20803083U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_NVLINK_INTERFACE_ID << 8) | NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS_MESSAGE_ID" */
|
||||
|
||||
#define NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS_MESSAGE_ID (0x83U)
|
||||
|
||||
typedef struct NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS {
|
||||
NvU8 ibGuid[16];
|
||||
NvU8 rackGuid[16];
|
||||
NvU8 chassisPhysicalSlotNumber;
|
||||
NvU8 computeSlotIndex;
|
||||
NvU8 nodeIndex;
|
||||
NvU8 peerType;
|
||||
NvU8 moduleId;
|
||||
} NV2080_CTRL_NVLINK_GET_PLATFORM_INFO_PARAMS;
|
||||
|
||||
|
||||
|
||||
/* _ctrl2080nvlink_h_ */
|
||||
|
||||
Reference in New Issue
Block a user