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https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-08 09:10:03 +00:00
550.54.14
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@@ -1,5 +1,5 @@
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/*******************************************************************************
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Copyright (c) 2013-2019 NVidia Corporation
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Copyright (c) 2013-2023 NVidia Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to
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@@ -320,7 +320,7 @@ typedef struct
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typedef struct
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{
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NvProcessorUuid gpuUuidArray[UVM_MAX_GPUS]; // IN
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NvProcessorUuid gpuUuidArray[UVM_MAX_GPUS_V1]; // IN
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NvU32 numGpus; // IN
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NvU64 serverId NV_ALIGN_BYTES(8); // OUT
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NV_STATUS rmStatus; // OUT
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@@ -344,9 +344,9 @@ typedef struct
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typedef struct
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{
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NvProcessorUuid gpuUuidArray[UVM_MAX_GPUS]; // OUT
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NvU32 validCount; // OUT
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NV_STATUS rmStatus; // OUT
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NvProcessorUuid gpuUuidArray[UVM_MAX_GPUS_V1]; // OUT
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NvU32 validCount; // OUT
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NV_STATUS rmStatus; // OUT
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} UVM_GET_GPU_UUID_TABLE_PARAMS;
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#if defined(WIN32) || defined(WIN64)
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@@ -494,7 +494,7 @@ typedef struct
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NvU64 base NV_ALIGN_BYTES(8); // IN
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NvU64 length NV_ALIGN_BYTES(8); // IN
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NvU64 offset NV_ALIGN_BYTES(8); // IN
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UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS]; // IN
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UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS_V2]; // IN
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NvU64 gpuAttributesCount NV_ALIGN_BYTES(8); // IN
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NvS32 rmCtrlFd; // IN
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NvU32 hClient; // IN
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@@ -552,7 +552,7 @@ typedef struct
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typedef struct
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{
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NvProcessorUuid gpu_uuid; // IN
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NvProcessorUuid gpu_uuid; // IN/OUT
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NvBool numaEnabled; // OUT
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NvS32 numaNodeId; // OUT
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NvS32 rmCtrlFd; // IN
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@@ -835,7 +835,14 @@ typedef struct
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//
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// Initialize any tracker object such as a queue or counter
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// UvmToolsCreateEventQueue, UvmToolsCreateProcessAggregateCounters, UvmToolsCreateProcessorCounters
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// UvmToolsCreateEventQueue, UvmToolsCreateProcessAggregateCounters,
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// UvmToolsCreateProcessorCounters.
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// Note that the order of structure elements has the version as the last field.
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// This is used to tell whether the kernel supports V2 events or not because
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// the V1 UVM_TOOLS_INIT_EVENT_TRACKER ioctl would not read or update that
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// field but V2 will. This is needed because it is possible to create an event
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// queue before CUDA is initialized which means UvmSetDriverVersion() hasn't
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// been called yet and the kernel version is unknown.
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//
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#define UVM_TOOLS_INIT_EVENT_TRACKER UVM_IOCTL_BASE(56)
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typedef struct
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@@ -847,6 +854,8 @@ typedef struct
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NvU32 allProcessors; // IN
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NvU32 uvmFd; // IN
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NV_STATUS rmStatus; // OUT
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NvU32 requestedVersion; // IN
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NvU32 grantedVersion; // OUT
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} UVM_TOOLS_INIT_EVENT_TRACKER_PARAMS;
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//
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@@ -927,6 +936,12 @@ typedef struct
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//
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// UvmToolsGetProcessorUuidTable
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// Note that tablePtr != 0 and count == 0 means that tablePtr is assumed to be
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// an array of size UVM_MAX_PROCESSORS_V1 and that only UvmEventEntry_V1
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// processor IDs (physical GPU UUIDs) will be reported.
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// tablePtr == 0 and count == 0 can be used to query how many processors are
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// present in order to dynamically allocate the correct size array since the
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// total number of processors is returned in 'count'.
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//
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#define UVM_TOOLS_GET_PROCESSOR_UUID_TABLE UVM_IOCTL_BASE(64)
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typedef struct
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@@ -934,6 +949,7 @@ typedef struct
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NvU64 tablePtr NV_ALIGN_BYTES(8); // IN
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NvU32 count; // IN/OUT
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NV_STATUS rmStatus; // OUT
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NvU32 version; // OUT
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} UVM_TOOLS_GET_PROCESSOR_UUID_TABLE_PARAMS;
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@@ -979,7 +995,7 @@ typedef struct
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{
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NvU64 base NV_ALIGN_BYTES(8); // IN
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NvU64 length NV_ALIGN_BYTES(8); // IN
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UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS]; // IN
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UvmGpuMappingAttributes perGpuAttributes[UVM_MAX_GPUS_V2]; // IN
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NvU64 gpuAttributesCount NV_ALIGN_BYTES(8); // IN
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NV_STATUS rmStatus; // OUT
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} UVM_ALLOC_SEMAPHORE_POOL_PARAMS;
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