570.211.01

README.md

@@ -1,7 +1,7 @@
 # NVIDIA Linux Open GPU Kernel Module Source
 
 This is the source release of the NVIDIA Linux open GPU kernel modules,
-version 570.207.
+version 570.211.01.
 
 
 ## How to Build
@@ -17,7 +17,7 @@ as root:
 
 Note that the kernel modules built here must be used with GSP
 firmware and user-space NVIDIA GPU driver components from a corresponding
-570.207 driver release.  This can be achieved by installing
+570.211.01 driver release.  This can be achieved by installing
 the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
 option.  E.g.,
 
@@ -185,7 +185,7 @@ table below).
 For details on feature support and limitations, see the NVIDIA GPU driver
 end user README here:
 
-https://us.download.nvidia.com/XFree86/Linux-x86_64/570.207/README/kernel_open.html
+https://us.download.nvidia.com/XFree86/Linux-x86_64/570.211.01/README/kernel_open.html
 
 For vGPU support, please refer to the README.vgpu packaged in the vGPU Host
 Package for more details.

kernel-open/Kbuild

@@ -79,7 +79,7 @@ ccflags-y += -I$(src)/common/inc
 ccflags-y += -I$(src)
 ccflags-y += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args
 ccflags-y += -D__KERNEL__ -DMODULE -DNVRM
-ccflags-y += -DNV_VERSION_STRING=\"570.207\"
+ccflags-y += -DNV_VERSION_STRING=\"570.211.01\"
 
 ifneq ($(SYSSRCHOST1X),)
  ccflags-y += -I$(SYSSRCHOST1X)
@@ -181,6 +181,7 @@ NV_CONFTEST_CFLAGS += $(filter -std=%,$(KBUILD_CFLAGS))
 NV_CONFTEST_CFLAGS += $(call cc-disable-warning,pointer-sign)
 NV_CONFTEST_CFLAGS += $(call cc-option,-fshort-wchar,)
 NV_CONFTEST_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types,)
+NV_CONFTEST_CFLAGS += $(call cc-option,-fms-extensions,)
 NV_CONFTEST_CFLAGS += -Wno-error
 
 NV_CONFTEST_COMPILE_TEST_HEADERS := $(obj)/conftest/macros.h

kernel-open/common/inc/nv-linux.h

@@ -833,9 +833,9 @@ static inline dma_addr_t nv_phys_to_dma(struct device *dev, NvU64 pa)
 #define NV_PRINT_AT(nv_debug_level,at)                                           \
     {                                                                            \
         nv_printf(nv_debug_level,                                                \
-            "NVRM: VM: %s:%d: 0x%p, %d page(s), count = %d, "                    \
+            "NVRM: VM: %s:%d: 0x%p, %d page(s), count = %lld, "                  \
             "page_table = 0x%p\n",  __FUNCTION__, __LINE__, at,                  \
-            at->num_pages, NV_ATOMIC_READ(at->usage_count),                      \
+            at->num_pages, (long long)atomic64_read(&at->usage_count),           \
             at->page_table);                                                     \
     }
 
@@ -1174,7 +1174,7 @@ struct nv_dma_buf
 typedef struct nv_alloc_s {
     struct nv_alloc_s *next;
     struct device     *dev;
-    atomic_t       usage_count;
+    atomic64_t       usage_count;
     struct {
         NvBool contig      : 1;
         NvBool guest       : 1;
@@ -1486,7 +1486,7 @@ typedef struct
 typedef struct nv_linux_state_s {
     nv_state_t nv_state;
 
-    atomic_t   usage_count;
+    atomic64_t usage_count;
 
     NvU32    suspend_count;
 
@@ -1825,9 +1825,9 @@ static inline NvBool nv_alloc_release(nv_linux_file_private_t *nvlfp, nv_alloc_t
 {
     NV_PRINT_AT(NV_DBG_MEMINFO, at);
 
-    if (NV_ATOMIC_DEC_AND_TEST(at->usage_count))
+    if (atomic64_dec_and_test(&at->usage_count))
     {
-        NV_ATOMIC_INC(at->usage_count);
+        atomic64_inc(&at->usage_count);
 
         at->next = nvlfp->free_list;
         nvlfp->free_list = at;

kernel-open/header-presence-tests.mk

@@ -3,6 +3,7 @@
 NV_HEADER_PRESENCE_TESTS = \
   asm/system.h \
   drm/drmP.h \
+  drm/drm_print.h \
   drm/drm_aperture.h \
   drm/drm_auth.h \
   drm/drm_gem.h \

kernel-open/nvidia-drm/nvidia-drm-priv.h

@@ -31,6 +31,10 @@
 #include <drm/drmP.h>
 #endif
 
+#if defined(NV_DRM_PRINT_H_PRESENT)
+#include <drm/drm_print.h>
+#endif
+
 #if defined(NV_DRM_DRM_DEVICE_H_PRESENT)
 #include <drm/drm_device.h>
 #endif

kernel-open/nvidia/nv-mmap.c

@@ -72,7 +72,7 @@ nvidia_vma_open(struct vm_area_struct *vma)
 
     if (at != NULL)
     {
-        NV_ATOMIC_INC(at->usage_count);
+        atomic64_inc(&at->usage_count);
 
         NV_PRINT_AT(NV_DBG_MEMINFO, at);
     }
@@ -423,7 +423,7 @@ static int nvidia_mmap_sysmem(
     int ret = 0;
     unsigned long start = 0;
 
-    NV_ATOMIC_INC(at->usage_count);
+    atomic64_inc(&at->usage_count);
 
     start = vma->vm_start;
     for (j = page_index; j < (page_index + pages); j++)
@@ -459,7 +459,7 @@ static int nvidia_mmap_sysmem(
 
         if (ret)
         {
-            NV_ATOMIC_DEC(at->usage_count);
+            atomic64_dec(&at->usage_count);
             return -EAGAIN;
         }
         start += PAGE_SIZE;

kernel-open/nvidia/nv-pci.c

@@ -1030,7 +1030,7 @@ nv_pci_remove(struct pci_dev *pci_dev)
      * For eGPU, fall off the bus along with clients active is a valid scenario.
      * Hence skipping the sanity check for eGPU.
      */
-    if ((NV_ATOMIC_READ(nvl->usage_count) != 0) && !(nv->is_external_gpu))
+    if ((atomic64_read(&nvl->usage_count) != 0) && !(nv->is_external_gpu))
     {
         nv_printf(NV_DBG_ERRORS,
                   "NVRM: Attempting to remove device %04x:%02x:%02x.%x with non-zero usage count!\n",
@@ -1041,7 +1041,7 @@ nv_pci_remove(struct pci_dev *pci_dev)
          * We can't return from this function without corrupting state, so we wait for
          * the usage count to go to zero.
          */
-        while (NV_ATOMIC_READ(nvl->usage_count) != 0)
+        while (atomic64_read(&nvl->usage_count) != 0)
         {
 
             /*
@@ -1113,7 +1113,7 @@ nv_pci_remove(struct pci_dev *pci_dev)
         nvl->sysfs_config_file = NULL;
     }
 
-    if (NV_ATOMIC_READ(nvl->usage_count) == 0)
+    if (atomic64_read(&nvl->usage_count) == 0)
     {
         nv_lock_destroy_locks(sp, nv);
     }
@@ -1129,7 +1129,7 @@ nv_pci_remove(struct pci_dev *pci_dev)
 
     num_nv_devices--;
 
-    if (NV_ATOMIC_READ(nvl->usage_count) == 0)
+    if (atomic64_read(&nvl->usage_count) == 0)
     {
         NV_PCI_DISABLE_DEVICE(pci_dev);
         NV_KFREE(nvl, sizeof(nv_linux_state_t));

kernel-open/nvidia/nv-procfs.c

@@ -886,7 +886,7 @@ nv_procfs_close_unbind_lock(
         down(&nvl->ldata_lock);
         if ((value == 1) && !(nv->flags & NV_FLAG_UNBIND_LOCK))
         {
-            if (NV_ATOMIC_READ(nvl->usage_count) == 0)
+            if (atomic64_read(&nvl->usage_count) == 0)
                 rm_unbind_lock(sp, nv);
 
             if (nv->flags & NV_FLAG_UNBIND_LOCK)

kernel-open/nvidia/nv.c

@@ -356,7 +356,7 @@ nv_alloc_t *nvos_create_alloc(
     }
 
     memset(at->page_table, 0, pt_size);
-    NV_ATOMIC_SET(at->usage_count, 0);
+    atomic64_set(&at->usage_count, 0);
 
     for (i = 0; i < at->num_pages; i++)
     {
@@ -386,7 +386,7 @@ int nvos_free_alloc(
     if (at == NULL)
         return -1;
 
-    if (NV_ATOMIC_READ(at->usage_count))
+    if (atomic64_read(&at->usage_count))
         return 1;
 
     for (i = 0; i < at->num_pages; i++)
@@ -1598,13 +1598,10 @@ static int nv_open_device(nv_state_t *nv, nvidia_stack_t *sp)
         return -ENODEV;
     }
 
-    if (unlikely(NV_ATOMIC_READ(nvl->usage_count) >= NV_S32_MAX))
-        return -EMFILE;
-
     if ( ! (nv->flags & NV_FLAG_OPEN))
     {
         /* Sanity check: !NV_FLAG_OPEN requires usage_count == 0 */
-        if (NV_ATOMIC_READ(nvl->usage_count) != 0)
+        if (atomic64_read(&nvl->usage_count) != 0)
         {
             NV_DEV_PRINTF(NV_DBG_ERRORS, nv,
                           "Minor device %u is referenced without being open!\n",
@@ -1626,7 +1623,7 @@ static int nv_open_device(nv_state_t *nv, nvidia_stack_t *sp)
 
     nv_assert_not_in_gpu_exclusion_list(sp, nv);
 
-    NV_ATOMIC_INC(nvl->usage_count);
+    atomic64_inc(&nvl->usage_count);
 
     return 0;
 }
@@ -2065,7 +2062,7 @@ static void nv_close_device(nv_state_t *nv, nvidia_stack_t *sp)
 {
     nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv);
 
-    if (NV_ATOMIC_READ(nvl->usage_count) == 0)
+    if (atomic64_read(&nvl->usage_count) == 0)
     {
         nv_printf(NV_DBG_ERRORS,
                   "NVRM: Attempting to close unopened minor device %u!\n",
@@ -2074,7 +2071,7 @@ static void nv_close_device(nv_state_t *nv, nvidia_stack_t *sp)
         return;
     }
 
-    if (NV_ATOMIC_DEC_AND_TEST(nvl->usage_count))
+    if (atomic64_dec_and_test(&nvl->usage_count))
         nv_stop_device(nv, sp);
 }
 
@@ -2119,7 +2116,7 @@ nvidia_close_callback(
     nv_close_device(nv, sp);
 
     bRemove = (!NV_IS_DEVICE_IN_SURPRISE_REMOVAL(nv)) &&
-              (NV_ATOMIC_READ(nvl->usage_count) == 0) &&
+              (atomic64_read(&nvl->usage_count) == 0) &&
               rm_get_device_remove_flag(sp, nv->gpu_id);
 
     nv_free_file_private(nvlfp);
@@ -2138,7 +2135,7 @@ nvidia_close_callback(
      * any cleanup related to linux layer locks and nv linux state struct.
      * nvidia_pci_remove when scheduled will do necessary cleanup.
      */
-    if ((NV_ATOMIC_READ(nvl->usage_count) == 0) && nv->removed)
+    if ((atomic64_read(&nvl->usage_count) == 0) && nv->removed)
     {
         nv_lock_destroy_locks(sp, nv);
         NV_KFREE(nvl, sizeof(nv_linux_state_t));
@@ -2659,7 +2656,7 @@ nvidia_ioctl(
                      * Only the current client should have an open file
                      * descriptor for the device, to allow safe offlining.
                      */
-                    if (NV_ATOMIC_READ(nvl->usage_count) > 1)
+                    if (atomic64_read(&nvl->usage_count) > 1)
                     {
                         status = -EBUSY;
                         goto unlock;
@@ -3048,12 +3045,12 @@ nvidia_ctl_open(
     /* save the nv away in file->private_data */
     nvlfp->nvptr = nvl;
 
-    if (NV_ATOMIC_READ(nvl->usage_count) == 0)
+    if (atomic64_read(&nvl->usage_count) == 0)
     {
         nv->flags |= (NV_FLAG_OPEN | NV_FLAG_CONTROL);
     }
 
-    NV_ATOMIC_INC(nvl->usage_count);
+    atomic64_inc(&nvl->usage_count);
     up(&nvl->ldata_lock);
 
     return 0;
@@ -3078,7 +3075,7 @@ nvidia_ctl_close(
     nv_printf(NV_DBG_INFO, "NVRM: nvidia_ctl_close\n");
 
     down(&nvl->ldata_lock);
-    if (NV_ATOMIC_DEC_AND_TEST(nvl->usage_count))
+    if (atomic64_dec_and_test(&nvl->usage_count))
     {
         nv->flags &= ~NV_FLAG_OPEN;
     }
@@ -3243,7 +3240,7 @@ nv_alias_pages(
 
     at->guest_id = guest_id;
     *priv_data = at;
-    NV_ATOMIC_INC(at->usage_count);
+    atomic64_inc(&at->usage_count);
 
     NV_PRINT_AT(NV_DBG_MEMINFO, at);
 
@@ -3810,7 +3807,7 @@ NV_STATUS NV_API_CALL nv_alloc_pages(
     }
 
     *priv_data = at;
-    NV_ATOMIC_INC(at->usage_count);
+    atomic64_inc(&at->usage_count);
 
     NV_PRINT_AT(NV_DBG_MEMINFO, at);
 
@@ -3846,7 +3843,7 @@ NV_STATUS NV_API_CALL nv_free_pages(
      * This is described in greater detail in the comments above the
      * nvidia_vma_(open|release)() callbacks in nv-mmap.c.
      */
-    if (!NV_ATOMIC_DEC_AND_TEST(at->usage_count))
+    if (!atomic64_dec_and_test(&at->usage_count))
         return NV_OK;
 
     if (!at->flags.guest)
@@ -3875,7 +3872,7 @@ NvBool nv_lock_init_locks
     NV_INIT_MUTEX(&nvl->mmap_lock);
     NV_INIT_MUTEX(&nvl->open_q_lock);
 
-    NV_ATOMIC_SET(nvl->usage_count, 0);
+    atomic64_set(&nvl->usage_count, 0);
 
     if (!rm_init_event_locks(sp, nv))
         return NV_FALSE;

src/common/inc/nvBldVer.h

@@ -36,25 +36,25 @@
 // and then checked back in. You cannot make changes to these sections without
 // corresponding changes to the buildmeister script
 #ifndef NV_BUILD_BRANCH
-    #define NV_BUILD_BRANCH             r570_00
+    #define NV_BUILD_BRANCH             r573_96
 #endif
 #ifndef NV_PUBLIC_BRANCH
-    #define NV_PUBLIC_BRANCH             r570_00
+    #define NV_PUBLIC_BRANCH             r573_96
 #endif
 
 #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS)
-#define NV_BUILD_BRANCH_VERSION         "rel/gpu_drv/r570/r570_00-658"
+#define NV_BUILD_BRANCH_VERSION         "rel/gpu_drv/r570/r573_96-1"
-#define NV_BUILD_CHANGELIST_NUM         (36886698)
+#define NV_BUILD_CHANGELIST_NUM         (36945344)
 #define NV_BUILD_TYPE                   "Official"
-#define NV_BUILD_NAME                   "rel/gpu_drv/r570/r570_00-658"
+#define NV_BUILD_NAME                   "rel/gpu_drv/r570/r573_96-1"
-#define NV_LAST_OFFICIAL_CHANGELIST_NUM (36886698)
+#define NV_LAST_OFFICIAL_CHANGELIST_NUM (36945344)
 
 #else     /* Windows builds */
-#define NV_BUILD_BRANCH_VERSION         "r570_00-640"
+#define NV_BUILD_BRANCH_VERSION         "r573_96-648"
-#define NV_BUILD_CHANGELIST_NUM         (36886698)
+#define NV_BUILD_CHANGELIST_NUM         (36918590)
 #define NV_BUILD_TYPE                   "Official"
-#define NV_BUILD_NAME                   "573.92"
+#define NV_BUILD_NAME                   "573.95"
-#define NV_LAST_OFFICIAL_CHANGELIST_NUM (36886698)
+#define NV_LAST_OFFICIAL_CHANGELIST_NUM (36918590)
 #define NV_BUILD_BRANCH_BASE_VERSION    R570
 #endif
 // End buildmeister python edited section

src/common/inc/nvUnixVersion.h

@@ -4,7 +4,7 @@
 #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
     (defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
 
-#define NV_VERSION_STRING               "570.207"
+#define NV_VERSION_STRING               "570.211.01"
 
 #else
 

src/common/inc/swref/published/ada/ad102/dev_nv_pcfg_xve_regmap.h

@@ -0,0 +1,71 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __dev_nv_pcfg_xve_regmap_h__
+#define __dev_nv_pcfg_xve_regmap_h__
+
+#define NV_PCFG_XVE_REGISTER_MAP_START_OFFSET 0x00088000
+
+/*
+ * <prefix>_MAP   has 1 bit set for each dword register.
+ * <prefix>_COUNT has total number of set bits in <prefix>_MAP.
+ */
+#define NV_PCFG_XVE_REGISTER_VALID_COUNT 474
+#define NV_PCFG_XVE_REGISTER_VALID_MAP { \
+    /* 0x00088000 */ 0xFFF1FFFF, 0x101FFF9F, \
+    /* 0x00088100 */ 0x3FFA3C7F, 0x00000000, \
+    /* 0x00088200 */ 0x03F00000, 0x00000000, \
+    /* 0x00088300 */ 0x00000000, 0x00000000, \
+    /* 0x00088400 */ 0x8007FFC0, 0x3F3F5807, \
+    /* 0x00088500 */ 0x000000BF, 0x00000000, \
+    /* 0x00088600 */ 0x0140AA1F, 0x00000000, \
+    /* 0x00088700 */ 0x00013FFF, 0x00000000, \
+    /* 0x00088800 */ 0xFFEFDFD7, 0x1EDAFFFF, \
+    /* 0x00088900 */ 0xFFFFFFFF, 0x006FFFFF, \
+    /* 0x00088A00 */ 0xFF7FFFFF, 0x0007FFFF, \
+    /* 0x00088B00 */ 0x00000000, 0xFFFFF000, \
+    /* 0x00088C00 */ 0x0007BFE7, 0xFFC003FC, \
+    /* 0x00088D00 */ 0xFFFFFFFF, 0x7C1F3FFF, \
+    /* 0x00088E00 */ 0xFFFFFFFF, 0x00FFFFFF, \
+    /* 0x00088F00 */ 0x00000000, 0xFF000000 }
+
+#define NV_PCFG_XVE_REGISTER_WR_COUNT 352
+#define NV_PCFG_XVE_REGISTER_WR_MAP { \
+    /* 0x00088000 */ 0x3EF193FA, 0x1007C505, \
+    /* 0x00088100 */ 0x3FFA0828, 0x00000000, \
+    /* 0x00088200 */ 0x03200000, 0x00000000, \
+    /* 0x00088300 */ 0x00000000, 0x00000000, \
+    /* 0x00088400 */ 0x80007EC0, 0x3F075007, \
+    /* 0x00088500 */ 0x000000BF, 0x00000000, \
+    /* 0x00088600 */ 0x0140AA10, 0x00000000, \
+    /* 0x00088700 */ 0x00013FFF, 0x00000000, \
+    /* 0x00088800 */ 0x004C5FC3, 0x1C5AFFC0, \
+    /* 0x00088900 */ 0xFFFC7804, 0x006FFFFF, \
+    /* 0x00088A00 */ 0xFF7FFDFD, 0x00007FFF, \
+    /* 0x00088B00 */ 0x00000000, 0xF8A54000, \
+    /* 0x00088C00 */ 0x00003C01, 0x3FC003FC, \
+    /* 0x00088D00 */ 0xFFFFFFFC, 0x701B2C3F, \
+    /* 0x00088E00 */ 0xFFFFFFF8, 0x00FFBFFF, \
+    /* 0x00088F00 */ 0x00000000, 0xFF000000 }
+
+#endif // {__dev_nv_pcfg_xve_regmap_h__}

src/nvidia/arch/nvalloc/unix/src/osapi.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1999-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -350,7 +350,7 @@ RmLogGpuCrash(OBJGPU *pGpu)
                 "NVRM: A GPU crash dump has been created. If possible, please run\n"
                 "NVRM: nvidia-bug-report.sh as root to collect this data before\n"
                 "NVRM: the NVIDIA kernel module is unloaded.\n");
-            if (hypervisorIsVgxHyper())
+            if (!IS_GSP_CLIENT(pGpu) && hypervisorIsVgxHyper())
             {
                 nv_printf(NV_DBG_ERRORS, "NVRM: Dumping nvlogs buffers\n");
                 nvlogDumpToKernelLog(NV_FALSE);

src/nvidia/generated/g_kernel_bif_nvoc.c

@@ -720,7 +720,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner *
         pThis->__kbifDoFunctionLevelReset__ = &kbifDoFunctionLevelReset_GH100;
     }
 
-    // kbifInitXveRegMap -- halified (3 hals) body
+    // kbifInitXveRegMap -- halified (4 hals) body
     if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000400UL) )) /* ChipHal: GA100 */ 
     {
         pThis->__kbifInitXveRegMap__ = &kbifInitXveRegMap_GA100;
@@ -729,6 +729,10 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner *
     {
         pThis->__kbifInitXveRegMap__ = &kbifInitXveRegMap_TU102;
     }
+    else if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x01f00000UL) )) /* ChipHal: AD102 | AD103 | AD104 | AD106 | AD107 */ 
+    {
+        pThis->__kbifInitXveRegMap__ = &kbifInitXveRegMap_AD102;
+    }
     else
     {
         pThis->__kbifInitXveRegMap__ = &kbifInitXveRegMap_GA102;
@@ -1120,7 +1124,7 @@ static void __nvoc_init_funcTable_KernelBif_1(KernelBif *pThis, RmHalspecOwner *
     {
         pThis->__kbifDoSecondaryBusHotReset__ = &kbifDoSecondaryBusHotReset_GH100;
     }
-} // End __nvoc_init_funcTable_KernelBif_1 with approximately 160 basic block(s).
+} // End __nvoc_init_funcTable_KernelBif_1 with approximately 161 basic block(s).
 
 
 // Initialize vtable(s) for 75 virtual method(s).

src/nvidia/generated/g_kernel_bif_nvoc.h

@@ -213,7 +213,7 @@ struct KernelBif {
     void (*__kbifProbePcieCplAtomicCaps__)(struct OBJGPU *, struct KernelBif * /*this*/);  // halified (3 hals) body
     void (*__kbifReadPcieCplCapsFromConfigSpace__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *);  // halified (3 hals) body
     NV_STATUS (*__kbifDoFunctionLevelReset__)(struct OBJGPU *, struct KernelBif * /*this*/);  // halified (2 hals) body
-    NV_STATUS (*__kbifInitXveRegMap__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU8);  // halified (3 hals) body
+    NV_STATUS (*__kbifInitXveRegMap__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU8);  // halified (4 hals) body
     NvU32 (*__kbifGetMSIXTableVectorControlSize__)(struct OBJGPU *, struct KernelBif * /*this*/);  // halified (3 hals) body
     NV_STATUS (*__kbifConfigAccessWait__)(struct OBJGPU *, struct KernelBif * /*this*/, RMTIMEOUT *);  // halified (3 hals) body
     NV_STATUS (*__kbifGetPciConfigSpacePriMirror__)(struct OBJGPU *, struct KernelBif * /*this*/, NvU32 *, NvU32 *);  // halified (2 hals) body
@@ -1226,6 +1226,8 @@ NV_STATUS kbifInitXveRegMap_GA100(struct OBJGPU *pGpu, struct KernelBif *pKernel
 
 NV_STATUS kbifInitXveRegMap_GA102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg3);
 
+NV_STATUS kbifInitXveRegMap_AD102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif, NvU8 arg3);
+
 NvU32 kbifGetMSIXTableVectorControlSize_TU102(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);
 
 NvU32 kbifGetMSIXTableVectorControlSize_GH100(struct OBJGPU *pGpu, struct KernelBif *pKernelBif);

src/nvidia/interface/nvrm_registry.h

@@ -2576,12 +2576,6 @@
 #define NV_REG_STR_RM_FORCE_GR_SCRUBBER_CHANNEL_DISABLE     0x00000000
 #define NV_REG_STR_RM_FORCE_GR_SCRUBBER_CHANNEL_ENABLE      0x00000001
 
-// Type DWORD
-// Allows extending PMU FB Operationg Timeout (DMA / FBFlush) on certain profiles
-// This currently takes effect on GB10X profile only
-#define NV_REG_STR_RM_PMU_FB_TIMEOUT_US                    "RmPmuFBTimeoutUs"
-#define NV_REG_STR_RM_PMU_FB_TIMEOUT_US_DEFAULT            (0)
-
 //
 // Type: Dword
 //

src/nvidia/src/kernel/gpu/bif/arch/ada/kernel_bif_ad102.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
  * SPDX-License-Identifier: MIT
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -27,9 +27,14 @@
 
 #include "published/ada/ad102/dev_bus.h"
 #include "published/ada/ad102/dev_bus_addendum.h"
+#include "published/ada/ad102/dev_nv_pcfg_xve_regmap.h"
 
 static NvBool _kbifPreOsCheckErotGrantAllowed_AD102(OBJGPU *pGpu, void *pVoid);
 
+// XVE register map for PCIe config space
+static const NvU32 xveRegMapValid[] = NV_PCFG_XVE_REGISTER_VALID_MAP;
+static const NvU32 xveRegMapWrite[] = NV_PCFG_XVE_REGISTER_WR_MAP;
+
 /*!
  * Signals preOs to have eRoT hand over control of EEPROM to RM
  *
@@ -85,3 +90,57 @@ _kbifPreOsCheckErotGrantAllowed_AD102
 
     return FLD_TEST_DRF(_PBUS, _SW_GLOBAL_EROT_GRANT, _ALLOW, _YES, reg);
 }
+
+/*!
+ * This function setups the xve register map pointers
+ *
+ * @param[in]  pGpu           GPU object pointer
+ * @param[in]  pKernelBif     KernelBif object pointer
+ * @param[in]  func           PCIe function number
+ *
+ * @return  'NV_OK' if successful, an RM error code otherwise.
+ * 
+ * Todo by rjindal: (Bug: 5020203) Create an IMPL for kbifInitXveRegMap 
+ *                  and reduce the HALs for this function in a cleanup CL.
+ */
+
+NV_STATUS
+kbifInitXveRegMap_AD102
+(
+    OBJGPU    *pGpu,
+    KernelBif *pKernelBif,
+    NvU8       func
+)
+{
+    extern NvU32 kbifInitXveRegMap_GM107(OBJGPU *pGpu, KernelBif *pKernelBif, NvU8 func);
+    NV_STATUS  status      = NV_OK;
+    NvU32      controlSize = 0;
+
+    if (func == 0)
+    {
+        pKernelBif->xveRegmapRef[0].nFunc              = 0;
+        pKernelBif->xveRegmapRef[0].xveRegMapValid     = xveRegMapValid;
+        pKernelBif->xveRegmapRef[0].xveRegMapWrite     = xveRegMapWrite;
+        pKernelBif->xveRegmapRef[0].numXveRegMapValid  = NV_ARRAY_ELEMENTS(xveRegMapValid);
+        pKernelBif->xveRegmapRef[0].numXveRegMapWrite  = NV_ARRAY_ELEMENTS(xveRegMapWrite);
+        pKernelBif->xveRegmapRef[0].bufBootConfigSpace = pKernelBif->cacheData.gpuBootConfigSpace;
+        // Each MSIX table entry is 4 NvU32s
+        controlSize = kbifGetMSIXTableVectorControlSize_HAL(pGpu, pKernelBif);
+        if (pKernelBif->xveRegmapRef[0].bufMsixTable == NULL)
+            pKernelBif->xveRegmapRef[0].bufMsixTable = portMemAllocNonPaged(controlSize * 4 * sizeof(NvU32));
+        NV_ASSERT_OR_RETURN(pKernelBif->xveRegmapRef[0].bufMsixTable != NULL, NV_ERR_NO_MEMORY);
+    }
+    else if (func == 1)
+    {
+        // Init regmap for Fn1 using older HAL
+        status = kbifInitXveRegMap_GM107(pGpu, pKernelBif, 1);
+    }
+    else
+    {
+        NV_PRINTF(LEVEL_ERROR, "Invalid argument, func: %d.\n", func);
+        NV_ASSERT(0);
+        status = NV_ERR_INVALID_ARGUMENT;
+    }
+
+    return status;
+}

version.mk

@@ -1,4 +1,4 @@
-NVIDIA_VERSION = 570.207
+NVIDIA_VERSION = 570.211.01
 
 # This file.
 VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))