mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-22 07:53:58 +00:00
570.123.07
This commit is contained in:
@@ -1,5 +1,5 @@
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/*******************************************************************************
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Copyright (c) 2015-2024 NVIDIA Corporation
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Copyright (c) 2015-2025 NVIDIA Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to
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@@ -110,16 +110,22 @@ typedef enum
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bool uvm_channel_pool_is_p2p(uvm_channel_pool_t *pool)
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{
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uvm_channel_manager_t *manager = pool->manager;
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uvm_gpu_t *gpu = manager->gpu;
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uvm_gpu_id_t id;
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if (manager->pool_to_use.default_for_type[UVM_CHANNEL_TYPE_GPU_TO_GPU] == pool)
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return true;
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for_each_gpu_id_in_mask(id, &manager->gpu->peer_info.peer_gpu_mask) {
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if (manager->pool_to_use.gpu_to_gpu[uvm_id_gpu_index(id)] == pool)
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uvm_spin_lock(&gpu->peer_info.peer_gpu_lock);
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for_each_gpu_id_in_mask(id, &gpu->peer_info.peer_gpu_mask) {
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if (manager->pool_to_use.gpu_to_gpu[uvm_id_gpu_index(id)] == pool) {
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uvm_spin_unlock(&gpu->peer_info.peer_gpu_lock);
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return true;
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}
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}
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uvm_spin_unlock(&gpu->peer_info.peer_gpu_lock);
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return false;
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}
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@@ -1974,6 +1980,7 @@ NV_STATUS uvm_channel_manager_suspend_p2p(uvm_channel_manager_t *channel_manager
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{
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uvm_channel_pool_t *pool;
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NV_STATUS status = NV_OK;
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uvm_gpu_t *gpu = channel_manager->gpu;
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uvm_gpu_id_t gpu_id;
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DECLARE_BITMAP(suspended_pools, UVM_COPY_ENGINE_COUNT_MAX);
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@@ -1981,7 +1988,9 @@ NV_STATUS uvm_channel_manager_suspend_p2p(uvm_channel_manager_t *channel_manager
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// Use bitmap to track which were suspended.
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bitmap_zero(suspended_pools, channel_manager->num_channel_pools);
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for_each_gpu_id_in_mask(gpu_id, &channel_manager->gpu->peer_info.peer_gpu_mask) {
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uvm_assert_mutex_locked(&g_uvm_global.global_lock);
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for_each_gpu_id_in_mask(gpu_id, &gpu->peer_info.peer_gpu_mask) {
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pool = channel_manager->pool_to_use.gpu_to_gpu[uvm_id_gpu_index(gpu_id)];
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if (pool && !test_bit(uvm_channel_pool_index_in_channel_manager(pool), suspended_pools)) {
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status = channel_pool_suspend_p2p(pool);
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@@ -2014,6 +2023,7 @@ NV_STATUS uvm_channel_manager_suspend_p2p(uvm_channel_manager_t *channel_manager
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void uvm_channel_manager_resume_p2p(uvm_channel_manager_t *channel_manager)
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{
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uvm_channel_pool_t *pool;
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uvm_gpu_t *gpu = channel_manager->gpu;
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uvm_gpu_id_t gpu_id;
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DECLARE_BITMAP(resumed_pools, UVM_COPY_ENGINE_COUNT_MAX);
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@@ -2021,7 +2031,9 @@ void uvm_channel_manager_resume_p2p(uvm_channel_manager_t *channel_manager)
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// Use bitmap to track which were suspended.
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bitmap_zero(resumed_pools, channel_manager->num_channel_pools);
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for_each_gpu_id_in_mask(gpu_id, &channel_manager->gpu->peer_info.peer_gpu_mask) {
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uvm_assert_mutex_locked(&g_uvm_global.global_lock);
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for_each_gpu_id_in_mask(gpu_id, &gpu->peer_info.peer_gpu_mask) {
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pool = channel_manager->pool_to_use.gpu_to_gpu[uvm_id_gpu_index(gpu_id)];
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if (pool && !test_and_set_bit(uvm_channel_pool_index_in_channel_manager(pool), resumed_pools))
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channel_pool_resume_p2p(pool);
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@@ -3243,9 +3255,9 @@ static void init_channel_manager_conf(uvm_channel_manager_t *manager)
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manager->conf.num_gpfifo_entries = UVM_CHANNEL_NUM_GPFIFO_ENTRIES_DEFAULT;
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if (manager->conf.num_gpfifo_entries != uvm_channel_num_gpfifo_entries) {
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pr_info("Invalid value for uvm_channel_num_gpfifo_entries = %u, using %u instead\n",
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uvm_channel_num_gpfifo_entries,
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manager->conf.num_gpfifo_entries);
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UVM_INFO_PRINT("Invalid value for uvm_channel_num_gpfifo_entries = %u, using %u instead\n",
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uvm_channel_num_gpfifo_entries,
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manager->conf.num_gpfifo_entries);
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}
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// 2- Allocation locations
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@@ -3285,9 +3297,9 @@ static void init_channel_manager_conf(uvm_channel_manager_t *manager)
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pushbuffer_loc_value = uvm_channel_pushbuffer_loc;
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if (!is_string_valid_location(pushbuffer_loc_value)) {
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pushbuffer_loc_value = UVM_CHANNEL_PUSHBUFFER_LOC_DEFAULT;
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pr_info("Invalid value for uvm_channel_pushbuffer_loc = %s, using %s instead\n",
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uvm_channel_pushbuffer_loc,
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pushbuffer_loc_value);
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UVM_INFO_PRINT("Invalid value for uvm_channel_pushbuffer_loc = %s, using %s instead\n",
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uvm_channel_pushbuffer_loc,
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pushbuffer_loc_value);
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}
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// Override the default value if requested by the user
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@@ -3297,8 +3309,8 @@ static void init_channel_manager_conf(uvm_channel_manager_t *manager)
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// so force the location to sys for now.
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// TODO: Bug 2904133: Remove the following "if" after the bug is fixed.
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if (NVCPU_IS_AARCH64) {
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pr_info("uvm_channel_pushbuffer_loc = %s is not supported on AARCH64, using sys instead\n",
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pushbuffer_loc_value);
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UVM_INFO_PRINT("uvm_channel_pushbuffer_loc = %s is not supported on AARCH64, using sys instead\n",
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pushbuffer_loc_value);
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manager->conf.pushbuffer_loc = UVM_BUFFER_LOCATION_SYS;
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}
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else {
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@@ -3310,8 +3322,9 @@ static void init_channel_manager_conf(uvm_channel_manager_t *manager)
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// Only support the knobs for GPFIFO/GPPut on Volta+
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if (!gpu->parent->gpfifo_in_vidmem_supported) {
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if (manager->conf.gpput_loc == UVM_BUFFER_LOCATION_SYS) {
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pr_info("CAUTION: allocating GPPut in sysmem is NOT supported and may crash the system, using %s instead\n",
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buffer_location_to_string(UVM_BUFFER_LOCATION_DEFAULT));
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UVM_INFO_PRINT("CAUTION: allocating GPPut in sysmem is NOT supported and may crash the system, using %s "
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"instead\n",
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buffer_location_to_string(UVM_BUFFER_LOCATION_DEFAULT));
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}
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manager->conf.gpfifo_loc = UVM_BUFFER_LOCATION_DEFAULT;
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@@ -3323,17 +3336,17 @@ static void init_channel_manager_conf(uvm_channel_manager_t *manager)
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gpfifo_loc_value = uvm_channel_gpfifo_loc;
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if (!is_string_valid_location(gpfifo_loc_value)) {
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gpfifo_loc_value = UVM_CHANNEL_GPFIFO_LOC_DEFAULT;
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pr_info("Invalid value for uvm_channel_gpfifo_loc = %s, using %s instead\n",
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uvm_channel_gpfifo_loc,
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gpfifo_loc_value);
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UVM_INFO_PRINT("Invalid value for uvm_channel_gpfifo_loc = %s, using %s instead\n",
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uvm_channel_gpfifo_loc,
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gpfifo_loc_value);
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}
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gpput_loc_value = uvm_channel_gpput_loc;
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if (!is_string_valid_location(gpput_loc_value)) {
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gpput_loc_value = UVM_CHANNEL_GPPUT_LOC_DEFAULT;
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pr_info("Invalid value for uvm_channel_gpput_loc = %s, using %s instead\n",
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uvm_channel_gpput_loc,
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gpput_loc_value);
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UVM_INFO_PRINT("Invalid value for uvm_channel_gpput_loc = %s, using %s instead\n",
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uvm_channel_gpput_loc,
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gpput_loc_value);
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}
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// On coherent platforms where the GPU does not cache sysmem but the CPU
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