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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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570.86.15
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@@ -46,6 +46,11 @@ void uvm_hal_pascal_ce_semaphore_release(uvm_push_t *push, NvU64 gpu_va, NvU32 p
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NvU32 launch_dma_plc_mode;
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bool use_flush;
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UVM_ASSERT_MSG(gpu->parent->ce_hal->semaphore_target_is_valid(push, gpu_va),
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"Semaphore target validation failed in channel %s, GPU %s.\n",
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push->channel->name,
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uvm_gpu_name(gpu));
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use_flush = uvm_hal_membar_before_semaphore(push);
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if (use_flush)
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@@ -72,6 +77,11 @@ void uvm_hal_pascal_ce_semaphore_reduction_inc(uvm_push_t *push, NvU64 gpu_va, N
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NvU32 launch_dma_plc_mode;
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bool use_flush;
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UVM_ASSERT_MSG(gpu->parent->ce_hal->semaphore_target_is_valid(push, gpu_va),
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"Semaphore target validation failed in channel %s, GPU %s.\n",
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push->channel->name,
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uvm_gpu_name(gpu));
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use_flush = uvm_hal_membar_before_semaphore(push);
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if (use_flush)
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@@ -96,11 +106,16 @@ void uvm_hal_pascal_ce_semaphore_reduction_inc(uvm_push_t *push, NvU64 gpu_va, N
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void uvm_hal_pascal_ce_semaphore_timestamp(uvm_push_t *push, NvU64 gpu_va)
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{
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uvm_gpu_t *gpu;
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uvm_gpu_t *gpu = uvm_push_get_gpu(push);
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NvU32 flush_value;
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NvU32 launch_dma_plc_mode;
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bool use_flush;
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UVM_ASSERT_MSG(gpu->parent->ce_hal->semaphore_target_is_valid(push, gpu_va),
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"Semaphore target validation failed in channel %s, GPU %s.\n",
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push->channel->name,
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uvm_gpu_name(gpu));
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use_flush = uvm_hal_membar_before_semaphore(push);
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if (use_flush)
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@@ -112,7 +127,6 @@ void uvm_hal_pascal_ce_semaphore_timestamp(uvm_push_t *push, NvU64 gpu_va)
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SET_SEMAPHORE_B, HWVALUE(C0B5, SET_SEMAPHORE_B, LOWER, NvOffset_LO32(gpu_va)),
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SET_SEMAPHORE_PAYLOAD, 0xdeadbeef);
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gpu = uvm_push_get_gpu(push);
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launch_dma_plc_mode = gpu->parent->ce_hal->plc_mode();
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NV_PUSH_1U(C0B5, LAUNCH_DMA, flush_value |
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