mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-11 02:29:58 +00:00
570.86.15
This commit is contained in:
@@ -244,13 +244,11 @@ const char *uvm_pmm_gpu_memory_type_string(uvm_pmm_gpu_memory_type_t type)
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{
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switch (type) {
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UVM_ENUM_STRING_CASE(UVM_PMM_GPU_MEMORY_TYPE_USER);
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UVM_ENUM_STRING_CASE(UVM_PMM_GPU_MEMORY_TYPE_USER_UNPROTECTED);
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UVM_ENUM_STRING_CASE(UVM_PMM_GPU_MEMORY_TYPE_KERNEL);
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UVM_ENUM_STRING_CASE(UVM_PMM_GPU_MEMORY_TYPE_KERNEL_UNPROTECTED);
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UVM_ENUM_STRING_DEFAULT();
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}
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BUILD_BUG_ON(UVM_PMM_GPU_MEMORY_TYPE_COUNT != 4);
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BUILD_BUG_ON(UVM_PMM_GPU_MEMORY_TYPE_COUNT != 2);
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}
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const char *uvm_pmm_gpu_chunk_state_string(uvm_pmm_gpu_chunk_state_t state)
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@@ -453,30 +451,6 @@ static void chunk_unpin(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk, uvm_pmm_gpu_
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chunk->suballoc->pinned_leaf_chunks--;
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}
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bool uvm_pmm_gpu_memory_type_is_user(uvm_pmm_gpu_memory_type_t type)
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{
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UVM_ASSERT(type < UVM_PMM_GPU_MEMORY_TYPE_COUNT);
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switch (type) {
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case UVM_PMM_GPU_MEMORY_TYPE_USER: // Alias UVM_PMM_GPU_MEMORY_TYPE_USER_PROTECTED
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case UVM_PMM_GPU_MEMORY_TYPE_USER_UNPROTECTED:
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return true;
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default:
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return false;
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}
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}
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bool uvm_pmm_gpu_memory_type_is_protected(uvm_pmm_gpu_memory_type_t type)
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{
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switch (type) {
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case UVM_PMM_GPU_MEMORY_TYPE_USER: // Alias UVM_PMM_GPU_MEMORY_TYPE_USER_PROTECTED
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case UVM_PMM_GPU_MEMORY_TYPE_KERNEL: // Alias UVM_PMM_GPU_MEMORY_TYPE_KERNEL_PROTECTED:
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return true;
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default:
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return false;
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}
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}
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static void uvm_gpu_chunk_set_in_eviction(uvm_gpu_chunk_t *chunk, bool in_eviction)
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{
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UVM_ASSERT(uvm_gpu_chunk_is_user(chunk));
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@@ -535,20 +509,6 @@ void uvm_pmm_gpu_sync(uvm_pmm_gpu_t *pmm)
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}
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}
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static uvm_pmm_gpu_memory_type_t pmm_squash_memory_type(uvm_pmm_gpu_memory_type_t type)
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{
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if (g_uvm_global.conf_computing_enabled)
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return type;
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// Enforce the contract that when the Confidential Computing feature is
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// disabled, all user types are alike, as well as all kernel types,
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// respectively. See uvm_pmm_gpu_memory_type_t.
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if (uvm_pmm_gpu_memory_type_is_user(type))
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return UVM_PMM_GPU_MEMORY_TYPE_USER;
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return UVM_PMM_GPU_MEMORY_TYPE_KERNEL;
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}
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static NV_STATUS pmm_gpu_alloc(uvm_pmm_gpu_t *pmm,
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size_t num_chunks,
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uvm_chunk_size_t chunk_size,
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@@ -573,7 +533,6 @@ static NV_STATUS pmm_gpu_alloc(uvm_pmm_gpu_t *pmm,
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uvm_assert_lockable_order(UVM_LOCK_ORDER_VA_BLOCK);
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}
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mem_type = pmm_squash_memory_type(mem_type);
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for (i = 0; i < num_chunks; i++) {
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uvm_gpu_root_chunk_t *root_chunk;
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@@ -1199,38 +1158,6 @@ void uvm_pmm_gpu_merge_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk)
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uvm_mutex_unlock(&pmm->lock);
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}
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uvm_gpu_phys_address_t uvm_pmm_gpu_peer_phys_address(uvm_pmm_gpu_t *pmm,
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uvm_gpu_chunk_t *chunk,
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uvm_gpu_t *accessing_gpu)
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{
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uvm_gpu_t *gpu = uvm_pmm_to_gpu(pmm);
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uvm_aperture_t aperture = uvm_gpu_peer_aperture(accessing_gpu, gpu);
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NvU64 addr;
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if (uvm_parent_gpus_are_nvswitch_connected(accessing_gpu->parent, gpu->parent))
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addr = chunk->address + gpu->parent->nvswitch_info.fabric_memory_window_start;
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else
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addr = chunk->address;
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return uvm_gpu_phys_address(aperture, addr);
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}
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uvm_gpu_address_t uvm_pmm_gpu_peer_copy_address(uvm_pmm_gpu_t *pmm,
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uvm_gpu_chunk_t *chunk,
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uvm_gpu_t *accessing_gpu)
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{
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uvm_gpu_t *gpu = uvm_pmm_to_gpu(pmm);
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uvm_gpu_identity_mapping_t *gpu_peer_mapping;
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if (accessing_gpu->parent->peer_copy_mode == UVM_GPU_PEER_COPY_MODE_PHYSICAL)
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return uvm_gpu_address_from_phys(uvm_pmm_gpu_peer_phys_address(pmm, chunk, accessing_gpu));
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UVM_ASSERT(accessing_gpu->parent->peer_copy_mode == UVM_GPU_PEER_COPY_MODE_VIRTUAL);
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gpu_peer_mapping = uvm_gpu_get_peer_mapping(accessing_gpu, gpu->id);
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return uvm_gpu_address_virtual(gpu_peer_mapping->base + chunk->address);
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}
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static NV_STATUS evict_root_chunk_from_va_block(uvm_pmm_gpu_t *pmm,
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uvm_gpu_root_chunk_t *root_chunk,
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uvm_va_block_t *va_block)
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@@ -1586,7 +1513,7 @@ static NV_STATUS pick_and_evict_root_chunk(uvm_pmm_gpu_t *pmm,
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chunk = &root_chunk->chunk;
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if (uvm_pmm_gpu_memory_type_is_kernel(type)) {
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if (type == UVM_PMM_GPU_MEMORY_TYPE_KERNEL) {
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NvU32 flags = 0;
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if (pmm_context == PMM_CONTEXT_PMA_EVICTION)
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flags |= UVM_PMA_CALLED_FROM_PMA_EVICTION;
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@@ -1973,11 +1900,12 @@ NV_STATUS alloc_root_chunk(uvm_pmm_gpu_t *pmm,
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// Also, user pages that are about to be overwritten, don't need to be
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// zeroed, either. Add a flag to uvm_pmm_gpu_alloc_* to skip scrubbing.
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const bool skip_pma_scrubbing = gpu->mem_info.numa.enabled;
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UVM_ASSERT(uvm_pmm_gpu_memory_type_is_user(type) || uvm_pmm_gpu_memory_type_is_kernel(type));
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UVM_ASSERT(type < UVM_PMM_GPU_MEMORY_TYPE_COUNT);
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options.flags = UVM_PMA_ALLOCATE_DONT_EVICT;
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if (uvm_pmm_gpu_memory_type_is_kernel(type) || !gpu_supports_pma_eviction(gpu))
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if ((type == UVM_PMM_GPU_MEMORY_TYPE_KERNEL) || !gpu_supports_pma_eviction(gpu))
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options.flags |= UVM_PMA_ALLOCATE_PINNED;
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if (skip_pma_scrubbing)
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@@ -1988,9 +1916,10 @@ NV_STATUS alloc_root_chunk(uvm_pmm_gpu_t *pmm,
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if (gpu->mem_info.numa.enabled)
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flags |= UVM_PMM_ALLOC_FLAGS_DONT_BATCH;
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// When the Confidential Computing feature is enabled, allocate GPU memory
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// in the protected region, unless specified otherwise.
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if (g_uvm_global.conf_computing_enabled && uvm_pmm_gpu_memory_type_is_protected(type))
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// In Confidential Computing, the PMA allocator exposes not only regular
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// ("protected") vidmem, but also another type called ""unprotected" vidmem.
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// UVM has no use for the latter type.
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if (g_uvm_global.conf_computing_enabled)
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options.flags |= UVM_PMA_ALLOCATE_PROTECTED_REGION;
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if (!gpu->parent->rm_info.isSimulated &&
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@@ -2245,11 +2174,7 @@ static bool check_chunk(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t *chunk)
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UVM_ASSERT(chunk_size & chunk_sizes);
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UVM_ASSERT(IS_ALIGNED(chunk->address, chunk_size));
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UVM_ASSERT(uvm_id_equal(uvm_gpu_id_from_index(chunk->gpu_index), gpu->id));
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// See pmm_squash_memory_type().
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if (!g_uvm_global.conf_computing_enabled)
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UVM_ASSERT((chunk->type == UVM_PMM_GPU_MEMORY_TYPE_USER) || (chunk->type == UVM_PMM_GPU_MEMORY_TYPE_KERNEL));
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UVM_ASSERT(chunk->type < UVM_PMM_GPU_MEMORY_TYPE_COUNT);
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if (chunk->state == UVM_PMM_GPU_CHUNK_STATE_IS_SPLIT)
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UVM_ASSERT(chunk_size > uvm_chunk_find_first_size(chunk_sizes));
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@@ -2559,8 +2484,12 @@ static NV_STATUS uvm_pmm_gpu_pma_evict_pages(void *void_pmm,
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UVM_ASSERT(IS_ALIGNED(UVM_CHUNK_SIZE_MAX, page_size));
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UVM_ASSERT(UVM_CHUNK_SIZE_MAX >= page_size);
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// Currently, when the Confidential Computing feature is enabled, the
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// entirety of vidmem is protected.
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// In Confidential Computing, RM should only request eviction of protected
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// vidmem.
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//
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// TODO: Bug 4287430: there shouldn't be any memory type argument, because
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// the callback can only relate to protected vidmem. This check can be
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// removed alongside the parameter.
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if (g_uvm_global.conf_computing_enabled && (mem_type != UVM_PMA_GPU_MEMORY_TYPE_PROTECTED))
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return NV_ERR_INVALID_ARGUMENT;
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@@ -2698,6 +2627,15 @@ static NV_STATUS uvm_pmm_gpu_pma_evict_range(void *void_pmm,
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phys_begin,
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phys_end);
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// In Confidential Computing, RM should only request eviction of protected
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// vidmem.
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//
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// TODO: Bug 4287430: there shouldn't be any memory type argument, because
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// the callback can only relate to protected vidmem. This check can be
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// removed alongside the parameter.
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if (g_uvm_global.conf_computing_enabled && (mem_type != UVM_PMA_GPU_MEMORY_TYPE_PROTECTED))
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return NV_ERR_INVALID_ARGUMENT;
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// Make sure that all pending allocations, that could have started before
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// the eviction callback was called, are done. This is required to guarantee
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// that any address that, PMA thinks, is owned by UVM has been indeed
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@@ -2990,7 +2928,7 @@ static NV_STATUS get_chunk_mappings_in_range(uvm_pmm_gpu_t *pmm, uvm_gpu_chunk_t
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uvm_assert_mutex_locked(&pmm->lock);
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// Kernel chunks do not have assigned VA blocks so we can just skip them
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if (uvm_pmm_gpu_memory_type_is_kernel(chunk->type))
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if (chunk->type == UVM_PMM_GPU_MEMORY_TYPE_KERNEL)
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return NV_WARN_NOTHING_TO_DO;
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// This chunk is located before the requested physical range. Skip its
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@@ -3434,11 +3372,8 @@ NV_STATUS uvm_pmm_gpu_init(uvm_pmm_gpu_t *pmm)
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uvm_gpu_t *gpu = uvm_pmm_to_gpu(pmm);
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const uvm_chunk_sizes_mask_t chunk_size_init[][UVM_PMM_GPU_MEMORY_TYPE_COUNT] =
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{
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{ gpu->parent->mmu_user_chunk_sizes,
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gpu->parent->mmu_user_chunk_sizes,
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gpu->parent->mmu_kernel_chunk_sizes,
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gpu->parent->mmu_kernel_chunk_sizes },
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{ 0, 0, uvm_mem_kernel_chunk_sizes(gpu), uvm_mem_kernel_chunk_sizes(gpu)},
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{ gpu->parent->mmu_user_chunk_sizes, gpu->parent->mmu_kernel_chunk_sizes },
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{ 0, uvm_mem_kernel_chunk_sizes(gpu)},
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};
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NV_STATUS status = NV_OK;
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size_t i, j, k;
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