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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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570.86.15
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@@ -35,7 +35,7 @@
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// Regkey Names
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#define NV_DP_REGKEY_OVERRIDE_DPCD_REV "OVERRIDE_DPCD_REV"
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#define NV_DP_REGKEY_DISABLE_SSC "DISABLE_SSC"
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#define NV_DP_REGKEY_DISABLE_SSC "DISABLE_SSC" // SSC (Stream Status Changed)
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#define NV_DP_REGKEY_ENABLE_FAST_LINK_TRAINING "ENABLE_FAST_LINK_TRAINING"
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#define NV_DP_REGKEY_DISABLE_MST "DISABLE_MST"
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#define NV_DP_REGKEY_ENABLE_INBAND_STEREO_SIGNALING "ENABLE_INBAND_STEREO_SIGNALING"
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@@ -49,6 +49,7 @@
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#define NV_DP_REGKEY_SKIP_ASSESSLINK_FOR_EDP "HP_WAR_2189772"
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#define NV_DP_REGKEY_HDCP_AUTH_ONLY_ON_DEMAND "DP_HDCP_AUTH_ONLY_ON_DEMAND"
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#define NV_DP_REGKEY_ENABLE_MSA_OVER_MST "ENABLE_MSA_OVER_MST"
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#define NV_DP_REGKEY_DISABLE_DOWNSPREAD "DISABLE_DOWNSPREAD"
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// Keep link alive for SST and MST
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#define NV_DP_REGKEY_KEEP_OPT_LINK_ALIVE "DP_KEEP_OPT_LINK_ALIVE"
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@@ -62,12 +63,31 @@
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// Message to power down video stream before power down link (set D3)
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#define NV_DP_REGKEY_POWER_DOWN_PHY "DP_POWER_DOWN_PHY"
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//
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// Regkey to re-assess max link if the first assessed link config
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// is lower than the panel max
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//
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#define NV_DP_REGKEY_REASSESS_MAX_LINK "DP_REASSESS_MAX_LINK"
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//
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// DSC capability of downstream device should be decided based on device's own
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// and its parent's DSC capability.
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//
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#define NV_DP_DSC_MST_CAP_BUG_3143315 "DP_DSC_MST_CAP_BUG_3143315"
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//
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// This regkey is controlling the if DPLib supports FPGA-specific Test UHBR.
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// The link rates are for internal test only.
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// This regkey is also used in RM. Both must be kept in sync.
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//
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#define NV_DP2X_REGKEY_FPGA_UHBR_SUPPORT "DP2X_FPGA_UHBR_SUPPORT"
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#define NV_DP2X_REGKEY_FPGA_UHBR_SUPPORT_2_5G NVBIT(0)
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#define NV_DP2X_REGKEY_FPGA_UHBR_SUPPORT_2_7G NVBIT(1)
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#define NV_DP2X_REGKEY_FPGA_UHBR_SUPPORT_5_0G NVBIT(2)
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#define NV_DP2X_IGNORE_CABLE_ID_CAPS "DP2X_IGNORE_CABLE_ID_CAPS"
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//
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// Bug 4388987 : This regkey will disable reading PCON caps for MST.
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//
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@@ -75,6 +95,9 @@
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#define NV_DP_REGKEY_DISABLE_TUNNEL_BW_ALLOCATION "DP_DISABLE_TUNNEL_BW_ALLOCATION"
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// Bug 4793112 : On eDP panel, do not cache source OUI if it reads zero
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#define NV_DP_REGKEY_SKIP_ZERO_OUI_CACHE "DP_SKIP_ZERO_OUI_CACHE"
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//
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// Data Base used to store all the regkey values.
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// The actual data base is declared statically in dp_evoadapter.cpp.
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@@ -106,8 +129,13 @@ struct DP_REGKEY_DATABASE
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bool bBypassEDPRevCheck;
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bool bDscMstCapBug3143315;
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bool bPowerDownPhyBeforeD3;
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bool bReassessMaxLink;
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NvU32 supportInternalUhbrOnFpga;
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bool bIgnoreCableIdCaps;
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bool bMSTPCONCapsReadDisabled;
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bool bForceDisableTunnelBwAllocation;
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bool bDownspreadDisabled;
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bool bSkipZeroOuiCache;
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};
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extern struct DP_REGKEY_DATABASE dpRegkeyDatabase;
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