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This commit is contained in:
Bernhard Stoeckner
2025-01-27 19:36:56 +01:00
parent 9d0b0414a5
commit 54d69484da
1166 changed files with 318863 additions and 182687 deletions
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655
src/nvidia/generated/g_gpu_class_list.c
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@@ -62,7 +62,7 @@ gpuGetClassDescriptorList_TU102(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC371_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC4B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC4B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC570_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVC573_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVC57A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
@@ -130,7 +130,7 @@ gpuGetClassDescriptorList_TU104(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC4B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC4B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC570_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVC573_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVC57A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
@@ -199,7 +199,7 @@ gpuGetClassDescriptorList_TU106(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVC4B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC4B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC570_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVC573_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVC57A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
@@ -266,7 +266,7 @@ gpuGetClassDescriptorList_TU116(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC371_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC4B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC4B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC570_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVC573_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVC57A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
@@ -330,7 +330,7 @@ gpuGetClassDescriptorList_TU117(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NV50_THIRD_PARTY_P2P, ENG_BUS },
{ NVA081_VGPU_CONFIG, ENG_GPU },
{ NVA084_KERNEL_HOST_VGPU_DEVICE, ENG_GPU },
{ NVB4B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVB4B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC371_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC4B0_VIDEO_DECODER, ENG_NVDEC(0) },
@@ -493,7 +493,7 @@ gpuGetClassDescriptorList_GA102(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC7B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC7FA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
@@ -566,7 +566,7 @@ gpuGetClassDescriptorList_GA103(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC7B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC7FA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
@@ -639,7 +639,7 @@ gpuGetClassDescriptorList_GA104(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC7B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC7FA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
@@ -712,7 +712,7 @@ gpuGetClassDescriptorList_GA106(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC7B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC7FA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
@@ -785,7 +785,7 @@ gpuGetClassDescriptorList_GA107(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC7B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC7FA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
@@ -860,9 +860,9 @@ gpuGetClassDescriptorList_AD102(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(3) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(2) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(2) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(1) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) },
@@ -941,9 +941,9 @@ gpuGetClassDescriptorList_AD103(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(3) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(2) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(2) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(1) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) },
@@ -1022,9 +1022,9 @@ gpuGetClassDescriptorList_AD104(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(3) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(2) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(2) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(1) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) },
@@ -1103,9 +1103,9 @@ gpuGetClassDescriptorList_AD106(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(3) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(2) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(2) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(1) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) },
@@ -1184,9 +1184,9 @@ gpuGetClassDescriptorList_AD107(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVC9B0_VIDEO_DECODER, ENG_NVDEC(3) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_MSENC(2) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(1) },
{ NVC9B7_VIDEO_ENCODER, ENG_NVENC(2) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(1) },
{ NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) },
@@ -1483,3 +1483,608 @@ gpuGetClassDescriptorList_GB102(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
}
const CLASSDESCRIPTOR *
gpuGetClassDescriptorList_GB10B(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{
static const CLASSDESCRIPTOR halGB10BClassDescriptorList[] = {
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(0) },
{ AMPERE_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ AMPERE_USERMODE_A, ENG_GPU },
{ BLACKWELL_A, ENG_GR(0) },
{ BLACKWELL_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ BLACKWELL_COMPUTE_A, ENG_GR(0) },
{ BLACKWELL_COMPUTE_A, ENG_GR(1) },
{ BLACKWELL_DMA_COPY_A, ENG_CE(0) },
{ BLACKWELL_DMA_COPY_A, ENG_CE(1) },
{ BLACKWELL_DMA_COPY_A, ENG_CE(2) },
{ BLACKWELL_DMA_COPY_A, ENG_CE(3) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(0) },
{ FERMI_CONTEXT_SHARE_A, ENG_KERNEL_FIFO },
{ FERMI_TWOD_A, ENG_GR(0) },
{ FERMI_VASPACE_A, ENG_DMA },
{ G84_PERFBUFFER, ENG_BUS },
{ GF100_DISP_SW, ENG_SW },
{ GF100_HDACODEC, ENG_HDACODEC },
{ GF100_SUBDEVICE_INFOROM, ENG_GPU },
{ GF100_SUBDEVICE_MASTER, ENG_GPU },
{ GF100_TIMED_SEMAPHORE_SW, ENG_SW },
{ GF100_ZBC_CLEAR, ENG_KERNEL_MEMORY_SYSTEM },
{ GP100_UVM_SW, ENG_SW },
{ HOPPER_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ HOPPER_SEC2_WORK_LAUNCH_A, ENG_SEC2 },
{ HOPPER_USERMODE_A, ENG_GPU },
{ KEPLER_CHANNEL_GROUP_A, ENG_KERNEL_FIFO },
{ KEPLER_DEVICE_VGPU, ENG_GPU },
{ MMU_FAULT_BUFFER, ENG_GR(0) },
{ NV0060_SYNC_GPU_BOOST, ENG_GPU },
{ NV01_MEMORY_SYNCPOINT, ENG_KERNEL_DISPLAY },
{ NV01_MEMORY_VIRTUAL, ENG_DMA },
{ NV04_DISPLAY_COMMON, ENG_KERNEL_DISPLAY },
{ NV04_SOFTWARE_TEST, ENG_SW },
{ NV50_DEFERRED_API_CLASS, ENG_SW },
{ NV50_MEMORY_VIRTUAL, ENG_DMA },
{ NV50_P2P, ENG_BUS },
{ NV50_THIRD_PARTY_P2P, ENG_BUS },
{ NVA081_VGPU_CONFIG, ENG_GPU },
{ NVA084_KERNEL_HOST_VGPU_DEVICE, ENG_GPU },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC970_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVC971_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVC973_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVC97A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
{ NVC97B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC97D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVC97E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
{ TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ TURING_USERMODE_A, ENG_GPU },
{ VOLTA_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ VOLTA_USERMODE_A, ENG_GPU },
};
#define HALGB10B_NUM_CLASS_DESCS (sizeof(halGB10BClassDescriptorList) / sizeof(CLASSDESCRIPTOR))
#define HALGB10B_NUM_CLASSES 64
ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALGB10B_NUM_CLASSES);
*pNumClassDescriptors = HALGB10B_NUM_CLASS_DESCS;
return halGB10BClassDescriptorList;
}
const CLASSDESCRIPTOR *
gpuGetClassDescriptorList_GB202(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{
static const CLASSDESCRIPTOR halGB202ClassDescriptorList[] = {
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(0) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(1) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(2) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(3) },
{ AMPERE_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ AMPERE_USERMODE_A, ENG_GPU },
{ BLACKWELL_B, ENG_GR(0) },
{ BLACKWELL_B, ENG_GR(1) },
{ BLACKWELL_B, ENG_GR(2) },
{ BLACKWELL_B, ENG_GR(3) },
{ BLACKWELL_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ BLACKWELL_CHANNEL_GPFIFO_B, ENG_KERNEL_FIFO },
{ BLACKWELL_COMPUTE_B, ENG_GR(0) },
{ BLACKWELL_COMPUTE_B, ENG_GR(1) },
{ BLACKWELL_COMPUTE_B, ENG_GR(2) },
{ BLACKWELL_COMPUTE_B, ENG_GR(3) },
{ BLACKWELL_COMPUTE_B, ENG_GR(4) },
{ BLACKWELL_COMPUTE_B, ENG_GR(5) },
{ BLACKWELL_COMPUTE_B, ENG_GR(6) },
{ BLACKWELL_COMPUTE_B, ENG_GR(7) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(0) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(1) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(2) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(3) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(4) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(5) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(6) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(7) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(0) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(1) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(2) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(3) },
{ BLACKWELL_USERMODE_A, ENG_GPU },
{ FERMI_CONTEXT_SHARE_A, ENG_KERNEL_FIFO },
{ FERMI_TWOD_A, ENG_GR(0) },
{ FERMI_TWOD_A, ENG_GR(1) },
{ FERMI_TWOD_A, ENG_GR(2) },
{ FERMI_TWOD_A, ENG_GR(3) },
{ FERMI_VASPACE_A, ENG_DMA },
{ G84_PERFBUFFER, ENG_BUS },
{ GF100_DISP_SW, ENG_SW },
{ GF100_HDACODEC, ENG_HDACODEC },
{ GF100_SUBDEVICE_INFOROM, ENG_GPU },
{ GF100_SUBDEVICE_MASTER, ENG_GPU },
{ GF100_TIMED_SEMAPHORE_SW, ENG_SW },
{ GF100_ZBC_CLEAR, ENG_KERNEL_MEMORY_SYSTEM },
{ GP100_UVM_SW, ENG_SW },
{ HOPPER_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ HOPPER_SEC2_WORK_LAUNCH_A, ENG_SEC2 },
{ HOPPER_USERMODE_A, ENG_GPU },
{ KEPLER_CHANNEL_GROUP_A, ENG_KERNEL_FIFO },
{ KEPLER_DEVICE_VGPU, ENG_GPU },
{ MMU_FAULT_BUFFER, ENG_GR(0) },
{ MMU_FAULT_BUFFER, ENG_GR(1) },
{ MMU_FAULT_BUFFER, ENG_GR(2) },
{ MMU_FAULT_BUFFER, ENG_GR(3) },
{ NV0060_SYNC_GPU_BOOST, ENG_GPU },
{ NV01_MEMORY_LOCAL_USER, ENG_SW },
{ NV01_MEMORY_VIRTUAL, ENG_DMA },
{ NV04_DISPLAY_COMMON, ENG_KERNEL_DISPLAY },
{ NV04_SOFTWARE_TEST, ENG_SW },
{ NV50_DEFERRED_API_CLASS, ENG_SW },
{ NV50_MEMORY_VIRTUAL, ENG_DMA },
{ NV50_P2P, ENG_BUS },
{ NV50_THIRD_PARTY_P2P, ENG_BUS },
{ NVA081_VGPU_CONFIG, ENG_GPU },
{ NVA084_KERNEL_HOST_VGPU_DEVICE, ENG_GPU },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA70_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVCA71_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVCA73_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVCA7A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
{ NVCA7B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(3) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(1) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(2) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(3) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(1) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(2) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(3) },
{ NVCFFA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
{ TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ TURING_USERMODE_A, ENG_GPU },
{ VOLTA_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ VOLTA_USERMODE_A, ENG_GPU },
};
#define HALGB202_NUM_CLASS_DESCS (sizeof(halGB202ClassDescriptorList) / sizeof(CLASSDESCRIPTOR))
#define HALGB202_NUM_CLASSES 68
ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALGB202_NUM_CLASSES);
*pNumClassDescriptors = HALGB202_NUM_CLASS_DESCS;
return halGB202ClassDescriptorList;
}
const CLASSDESCRIPTOR *
gpuGetClassDescriptorList_GB203(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{
static const CLASSDESCRIPTOR halGB203ClassDescriptorList[] = {
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(0) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(1) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(2) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(3) },
{ AMPERE_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ AMPERE_USERMODE_A, ENG_GPU },
{ BLACKWELL_B, ENG_GR(0) },
{ BLACKWELL_B, ENG_GR(1) },
{ BLACKWELL_B, ENG_GR(2) },
{ BLACKWELL_B, ENG_GR(3) },
{ BLACKWELL_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ BLACKWELL_CHANNEL_GPFIFO_B, ENG_KERNEL_FIFO },
{ BLACKWELL_COMPUTE_B, ENG_GR(0) },
{ BLACKWELL_COMPUTE_B, ENG_GR(1) },
{ BLACKWELL_COMPUTE_B, ENG_GR(2) },
{ BLACKWELL_COMPUTE_B, ENG_GR(3) },
{ BLACKWELL_COMPUTE_B, ENG_GR(4) },
{ BLACKWELL_COMPUTE_B, ENG_GR(5) },
{ BLACKWELL_COMPUTE_B, ENG_GR(6) },
{ BLACKWELL_COMPUTE_B, ENG_GR(7) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(0) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(1) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(2) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(3) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(4) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(5) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(6) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(7) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(0) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(1) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(2) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(3) },
{ BLACKWELL_USERMODE_A, ENG_GPU },
{ FERMI_CONTEXT_SHARE_A, ENG_KERNEL_FIFO },
{ FERMI_TWOD_A, ENG_GR(0) },
{ FERMI_TWOD_A, ENG_GR(1) },
{ FERMI_TWOD_A, ENG_GR(2) },
{ FERMI_TWOD_A, ENG_GR(3) },
{ FERMI_VASPACE_A, ENG_DMA },
{ G84_PERFBUFFER, ENG_BUS },
{ GF100_DISP_SW, ENG_SW },
{ GF100_HDACODEC, ENG_HDACODEC },
{ GF100_SUBDEVICE_INFOROM, ENG_GPU },
{ GF100_SUBDEVICE_MASTER, ENG_GPU },
{ GF100_TIMED_SEMAPHORE_SW, ENG_SW },
{ GF100_ZBC_CLEAR, ENG_KERNEL_MEMORY_SYSTEM },
{ GP100_UVM_SW, ENG_SW },
{ HOPPER_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ HOPPER_SEC2_WORK_LAUNCH_A, ENG_SEC2 },
{ HOPPER_USERMODE_A, ENG_GPU },
{ KEPLER_CHANNEL_GROUP_A, ENG_KERNEL_FIFO },
{ KEPLER_DEVICE_VGPU, ENG_GPU },
{ MMU_FAULT_BUFFER, ENG_GR(0) },
{ MMU_FAULT_BUFFER, ENG_GR(1) },
{ MMU_FAULT_BUFFER, ENG_GR(2) },
{ MMU_FAULT_BUFFER, ENG_GR(3) },
{ NV0060_SYNC_GPU_BOOST, ENG_GPU },
{ NV01_MEMORY_LOCAL_USER, ENG_SW },
{ NV01_MEMORY_VIRTUAL, ENG_DMA },
{ NV04_DISPLAY_COMMON, ENG_KERNEL_DISPLAY },
{ NV04_SOFTWARE_TEST, ENG_SW },
{ NV50_DEFERRED_API_CLASS, ENG_SW },
{ NV50_MEMORY_VIRTUAL, ENG_DMA },
{ NV50_P2P, ENG_BUS },
{ NV50_THIRD_PARTY_P2P, ENG_BUS },
{ NVA081_VGPU_CONFIG, ENG_GPU },
{ NVA084_KERNEL_HOST_VGPU_DEVICE, ENG_GPU },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA70_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVCA71_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVCA73_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVCA7A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
{ NVCA7B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(1) },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(2) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(1) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(1) },
{ NVCFFA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
{ TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ TURING_USERMODE_A, ENG_GPU },
{ VOLTA_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ VOLTA_USERMODE_A, ENG_GPU },
};
#define HALGB203_NUM_CLASS_DESCS (sizeof(halGB203ClassDescriptorList) / sizeof(CLASSDESCRIPTOR))
#define HALGB203_NUM_CLASSES 68
ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALGB203_NUM_CLASSES);
*pNumClassDescriptors = HALGB203_NUM_CLASS_DESCS;
return halGB203ClassDescriptorList;
}
const CLASSDESCRIPTOR *
gpuGetClassDescriptorList_GB205(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{
static const CLASSDESCRIPTOR halGB205ClassDescriptorList[] = {
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(0) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(1) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(2) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(3) },
{ AMPERE_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ AMPERE_USERMODE_A, ENG_GPU },
{ BLACKWELL_B, ENG_GR(0) },
{ BLACKWELL_B, ENG_GR(1) },
{ BLACKWELL_B, ENG_GR(2) },
{ BLACKWELL_B, ENG_GR(3) },
{ BLACKWELL_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ BLACKWELL_CHANNEL_GPFIFO_B, ENG_KERNEL_FIFO },
{ BLACKWELL_COMPUTE_B, ENG_GR(0) },
{ BLACKWELL_COMPUTE_B, ENG_GR(1) },
{ BLACKWELL_COMPUTE_B, ENG_GR(2) },
{ BLACKWELL_COMPUTE_B, ENG_GR(3) },
{ BLACKWELL_COMPUTE_B, ENG_GR(4) },
{ BLACKWELL_COMPUTE_B, ENG_GR(5) },
{ BLACKWELL_COMPUTE_B, ENG_GR(6) },
{ BLACKWELL_COMPUTE_B, ENG_GR(7) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(0) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(1) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(2) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(3) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(4) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(5) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(6) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(7) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(0) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(1) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(2) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(3) },
{ BLACKWELL_USERMODE_A, ENG_GPU },
{ FERMI_CONTEXT_SHARE_A, ENG_KERNEL_FIFO },
{ FERMI_TWOD_A, ENG_GR(0) },
{ FERMI_TWOD_A, ENG_GR(1) },
{ FERMI_TWOD_A, ENG_GR(2) },
{ FERMI_TWOD_A, ENG_GR(3) },
{ FERMI_VASPACE_A, ENG_DMA },
{ G84_PERFBUFFER, ENG_BUS },
{ GF100_DISP_SW, ENG_SW },
{ GF100_HDACODEC, ENG_HDACODEC },
{ GF100_SUBDEVICE_INFOROM, ENG_GPU },
{ GF100_SUBDEVICE_MASTER, ENG_GPU },
{ GF100_TIMED_SEMAPHORE_SW, ENG_SW },
{ GF100_ZBC_CLEAR, ENG_KERNEL_MEMORY_SYSTEM },
{ GP100_UVM_SW, ENG_SW },
{ HOPPER_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ HOPPER_SEC2_WORK_LAUNCH_A, ENG_SEC2 },
{ HOPPER_USERMODE_A, ENG_GPU },
{ KEPLER_CHANNEL_GROUP_A, ENG_KERNEL_FIFO },
{ KEPLER_DEVICE_VGPU, ENG_GPU },
{ MMU_FAULT_BUFFER, ENG_GR(0) },
{ MMU_FAULT_BUFFER, ENG_GR(1) },
{ MMU_FAULT_BUFFER, ENG_GR(2) },
{ MMU_FAULT_BUFFER, ENG_GR(3) },
{ NV0060_SYNC_GPU_BOOST, ENG_GPU },
{ NV01_MEMORY_LOCAL_USER, ENG_SW },
{ NV01_MEMORY_VIRTUAL, ENG_DMA },
{ NV04_DISPLAY_COMMON, ENG_KERNEL_DISPLAY },
{ NV04_SOFTWARE_TEST, ENG_SW },
{ NV50_DEFERRED_API_CLASS, ENG_SW },
{ NV50_MEMORY_VIRTUAL, ENG_DMA },
{ NV50_P2P, ENG_BUS },
{ NV50_THIRD_PARTY_P2P, ENG_BUS },
{ NVA081_VGPU_CONFIG, ENG_GPU },
{ NVA084_KERNEL_HOST_VGPU_DEVICE, ENG_GPU },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA70_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVCA71_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVCA73_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVCA7A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
{ NVCA7B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVCFFA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
{ TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ TURING_USERMODE_A, ENG_GPU },
{ VOLTA_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ VOLTA_USERMODE_A, ENG_GPU },
};
#define HALGB205_NUM_CLASS_DESCS (sizeof(halGB205ClassDescriptorList) / sizeof(CLASSDESCRIPTOR))
#define HALGB205_NUM_CLASSES 68
ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALGB205_NUM_CLASSES);
*pNumClassDescriptors = HALGB205_NUM_CLASS_DESCS;
return halGB205ClassDescriptorList;
}
const CLASSDESCRIPTOR *
gpuGetClassDescriptorList_GB206(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{
static const CLASSDESCRIPTOR halGB206ClassDescriptorList[] = {
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(0) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(1) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(2) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(3) },
{ AMPERE_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ AMPERE_USERMODE_A, ENG_GPU },
{ BLACKWELL_B, ENG_GR(0) },
{ BLACKWELL_B, ENG_GR(1) },
{ BLACKWELL_B, ENG_GR(2) },
{ BLACKWELL_B, ENG_GR(3) },
{ BLACKWELL_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ BLACKWELL_CHANNEL_GPFIFO_B, ENG_KERNEL_FIFO },
{ BLACKWELL_COMPUTE_B, ENG_GR(0) },
{ BLACKWELL_COMPUTE_B, ENG_GR(1) },
{ BLACKWELL_COMPUTE_B, ENG_GR(2) },
{ BLACKWELL_COMPUTE_B, ENG_GR(3) },
{ BLACKWELL_COMPUTE_B, ENG_GR(4) },
{ BLACKWELL_COMPUTE_B, ENG_GR(5) },
{ BLACKWELL_COMPUTE_B, ENG_GR(6) },
{ BLACKWELL_COMPUTE_B, ENG_GR(7) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(0) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(1) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(2) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(3) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(4) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(5) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(6) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(7) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(0) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(1) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(2) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(3) },
{ BLACKWELL_USERMODE_A, ENG_GPU },
{ FERMI_CONTEXT_SHARE_A, ENG_KERNEL_FIFO },
{ FERMI_TWOD_A, ENG_GR(0) },
{ FERMI_TWOD_A, ENG_GR(1) },
{ FERMI_TWOD_A, ENG_GR(2) },
{ FERMI_TWOD_A, ENG_GR(3) },
{ FERMI_VASPACE_A, ENG_DMA },
{ G84_PERFBUFFER, ENG_BUS },
{ GF100_DISP_SW, ENG_SW },
{ GF100_HDACODEC, ENG_HDACODEC },
{ GF100_SUBDEVICE_INFOROM, ENG_GPU },
{ GF100_SUBDEVICE_MASTER, ENG_GPU },
{ GF100_TIMED_SEMAPHORE_SW, ENG_SW },
{ GF100_ZBC_CLEAR, ENG_KERNEL_MEMORY_SYSTEM },
{ GP100_UVM_SW, ENG_SW },
{ HOPPER_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ HOPPER_SEC2_WORK_LAUNCH_A, ENG_SEC2 },
{ HOPPER_USERMODE_A, ENG_GPU },
{ KEPLER_CHANNEL_GROUP_A, ENG_KERNEL_FIFO },
{ KEPLER_DEVICE_VGPU, ENG_GPU },
{ MMU_FAULT_BUFFER, ENG_GR(0) },
{ MMU_FAULT_BUFFER, ENG_GR(1) },
{ MMU_FAULT_BUFFER, ENG_GR(2) },
{ MMU_FAULT_BUFFER, ENG_GR(3) },
{ NV0060_SYNC_GPU_BOOST, ENG_GPU },
{ NV01_MEMORY_LOCAL_USER, ENG_SW },
{ NV01_MEMORY_VIRTUAL, ENG_DMA },
{ NV04_DISPLAY_COMMON, ENG_KERNEL_DISPLAY },
{ NV04_SOFTWARE_TEST, ENG_SW },
{ NV50_DEFERRED_API_CLASS, ENG_SW },
{ NV50_MEMORY_VIRTUAL, ENG_DMA },
{ NV50_P2P, ENG_BUS },
{ NV50_THIRD_PARTY_P2P, ENG_BUS },
{ NVA081_VGPU_CONFIG, ENG_GPU },
{ NVA084_KERNEL_HOST_VGPU_DEVICE, ENG_GPU },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA70_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVCA71_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVCA73_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVCA7A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
{ NVCA7B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(0) },
{ NVCFFA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
{ TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ TURING_USERMODE_A, ENG_GPU },
{ VOLTA_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ VOLTA_USERMODE_A, ENG_GPU },
};
#define HALGB206_NUM_CLASS_DESCS (sizeof(halGB206ClassDescriptorList) / sizeof(CLASSDESCRIPTOR))
#define HALGB206_NUM_CLASSES 68
ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALGB206_NUM_CLASSES);
*pNumClassDescriptors = HALGB206_NUM_CLASS_DESCS;
return halGB206ClassDescriptorList;
}
const CLASSDESCRIPTOR *
gpuGetClassDescriptorList_GB207(POBJGPU pGpu, NvU32 *pNumClassDescriptors)
{
static const CLASSDESCRIPTOR halGB207ClassDescriptorList[] = {
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(0) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(1) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(2) },
{ ACCESS_COUNTER_NOTIFY_BUFFER, ENG_GR(3) },
{ AMPERE_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ AMPERE_USERMODE_A, ENG_GPU },
{ BLACKWELL_B, ENG_GR(0) },
{ BLACKWELL_B, ENG_GR(1) },
{ BLACKWELL_B, ENG_GR(2) },
{ BLACKWELL_B, ENG_GR(3) },
{ BLACKWELL_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ BLACKWELL_CHANNEL_GPFIFO_B, ENG_KERNEL_FIFO },
{ BLACKWELL_COMPUTE_B, ENG_GR(0) },
{ BLACKWELL_COMPUTE_B, ENG_GR(1) },
{ BLACKWELL_COMPUTE_B, ENG_GR(2) },
{ BLACKWELL_COMPUTE_B, ENG_GR(3) },
{ BLACKWELL_COMPUTE_B, ENG_GR(4) },
{ BLACKWELL_COMPUTE_B, ENG_GR(5) },
{ BLACKWELL_COMPUTE_B, ENG_GR(6) },
{ BLACKWELL_COMPUTE_B, ENG_GR(7) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(0) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(1) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(2) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(3) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(4) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(5) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(6) },
{ BLACKWELL_DMA_COPY_B, ENG_CE(7) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(0) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(1) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(2) },
{ BLACKWELL_INLINE_TO_MEMORY_A, ENG_GR(3) },
{ BLACKWELL_USERMODE_A, ENG_GPU },
{ FERMI_CONTEXT_SHARE_A, ENG_KERNEL_FIFO },
{ FERMI_TWOD_A, ENG_GR(0) },
{ FERMI_TWOD_A, ENG_GR(1) },
{ FERMI_TWOD_A, ENG_GR(2) },
{ FERMI_TWOD_A, ENG_GR(3) },
{ FERMI_VASPACE_A, ENG_DMA },
{ G84_PERFBUFFER, ENG_BUS },
{ GF100_DISP_SW, ENG_SW },
{ GF100_HDACODEC, ENG_HDACODEC },
{ GF100_SUBDEVICE_INFOROM, ENG_GPU },
{ GF100_SUBDEVICE_MASTER, ENG_GPU },
{ GF100_TIMED_SEMAPHORE_SW, ENG_SW },
{ GF100_ZBC_CLEAR, ENG_KERNEL_MEMORY_SYSTEM },
{ GP100_UVM_SW, ENG_SW },
{ HOPPER_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ HOPPER_SEC2_WORK_LAUNCH_A, ENG_SEC2 },
{ HOPPER_USERMODE_A, ENG_GPU },
{ KEPLER_CHANNEL_GROUP_A, ENG_KERNEL_FIFO },
{ KEPLER_DEVICE_VGPU, ENG_GPU },
{ MMU_FAULT_BUFFER, ENG_GR(0) },
{ MMU_FAULT_BUFFER, ENG_GR(1) },
{ MMU_FAULT_BUFFER, ENG_GR(2) },
{ MMU_FAULT_BUFFER, ENG_GR(3) },
{ NV0060_SYNC_GPU_BOOST, ENG_GPU },
{ NV01_MEMORY_LOCAL_USER, ENG_SW },
{ NV01_MEMORY_VIRTUAL, ENG_DMA },
{ NV04_DISPLAY_COMMON, ENG_KERNEL_DISPLAY },
{ NV04_SOFTWARE_TEST, ENG_SW },
{ NV50_DEFERRED_API_CLASS, ENG_SW },
{ NV50_MEMORY_VIRTUAL, ENG_DMA },
{ NV50_P2P, ENG_BUS },
{ NV50_THIRD_PARTY_P2P, ENG_BUS },
{ NVA081_VGPU_CONFIG, ENG_GPU },
{ NVA084_KERNEL_HOST_VGPU_DEVICE, ENG_GPU },
{ NVC372_DISPLAY_SW, ENG_KERNEL_DISPLAY },
{ NVC77F_ANY_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA70_DISPLAY, ENG_KERNEL_DISPLAY },
{ NVCA71_DISP_SF_USER, ENG_KERNEL_DISPLAY },
{ NVCA73_DISP_CAPABILITIES, ENG_KERNEL_DISPLAY },
{ NVCA7A_CURSOR_IMM_CHANNEL_PIO, ENG_KERNEL_DISPLAY },
{ NVCA7B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCA7E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY },
{ NVCFB0_VIDEO_DECODER, ENG_NVDEC(0) },
{ NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) },
{ NVCFFA_VIDEO_OFA, ENG_OFA(0) },
{ NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE },
{ RM_USER_SHARED_DATA, ENG_GPU },
{ TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ TURING_USERMODE_A, ENG_GPU },
{ VOLTA_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO },
{ VOLTA_USERMODE_A, ENG_GPU },
};
#define HALGB207_NUM_CLASS_DESCS (sizeof(halGB207ClassDescriptorList) / sizeof(CLASSDESCRIPTOR))
#define HALGB207_NUM_CLASSES 67
ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= HALGB207_NUM_CLASSES);
*pNumClassDescriptors = HALGB207_NUM_CLASS_DESCS;
return halGB207ClassDescriptorList;
}