525.60.11

This commit is contained in:
Andy Ritger
2022-11-28 13:39:27 -08:00
parent 758b4ee818
commit 5f40a5aee5
113 changed files with 1408 additions and 723 deletions

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@@ -260,6 +260,8 @@ typedef struct
NvU32 lp_threshold;
NvU32 minion_intr;
NvU32 surpress_link_errors_for_gpu_reset;
NvU32 block_code_mode;
NvU32 reference_clock_mode;
} NVSWITCH_REGKEY_TYPE;
//

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@@ -282,6 +282,9 @@ typedef struct FLCN
/*! HW arch that is enabled and running on corresponding uproc engine. */
NvU32 engArch;
/*! Flcn debug buffer object */
} FLCN, *PFLCN;
// hal functions
@@ -339,6 +342,10 @@ void flcnImemCopyTo_HAL (struct nvswitch_device
NvU32 flcnSetDmemAddr_HAL (struct nvswitch_device *, struct FLCN *, NvU32 dst);
NvU32 flcnRiscvRegRead_HAL (struct nvswitch_device *, PFLCN, NvU32 offset);
void flcnRiscvRegWrite_HAL (struct nvswitch_device *, PFLCN, NvU32 offset, NvU32 data);
NV_STATUS flcnDebugBufferInit_HAL (struct nvswitch_device *, struct FLCN *, NvU32 debugBufferMaxSize, NvU32 writeRegAddr, NvU32 readRegAddr);
NV_STATUS flcnDebugBufferDestroy_HAL (struct nvswitch_device *, struct FLCN *);
NV_STATUS flcnDebugBufferDisplay_HAL (struct nvswitch_device *, struct FLCN *);
NvBool flcnDebugBufferIsEmpty_HAL (struct nvswitch_device *, struct FLCN *);
// Falcon core revision / subversion definitions.
#define NV_FLCN_CORE_REV_3_0 0x30 // 3.0 - Core revision 3 subversion 0.

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@@ -91,6 +91,10 @@ typedef struct {
NvU32 (*setDmemAddr) (struct nvswitch_device *, struct FLCN *, NvU32 dst);
NvU32 (*riscvRegRead) (struct nvswitch_device *, struct FLCN *, NvU32 offset);
void (*riscvRegWrite) (struct nvswitch_device *, struct FLCN *, NvU32 offset, NvU32 data);
NV_STATUS (*debugBufferInit) (struct nvswitch_device *, struct FLCN *, NvU32 debugBufferMaxSize, NvU32 writeRegAddr, NvU32 readRegAddr);
NV_STATUS (*debugBufferDestroy) (struct nvswitch_device *, struct FLCN *);
NV_STATUS (*debugBufferDisplay) (struct nvswitch_device *, struct FLCN *);
NvBool (*debugBufferIsEmpty) (struct nvswitch_device *, struct FLCN *);
} flcn_hal;
void flcnQueueSetupHal(struct FLCN *pFlcn);

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@@ -589,4 +589,35 @@
#define NV_SWITCH_REGKEY_SURPRESS_LINK_ERRORS_FOR_GPU_RESET_DISABLE 0x0
#define NV_SWITCH_REGKEY_SURPRESS_LINK_ERRORS_FOR_GPU_RESET_ENABLE 0x1
/*
* NV_SWITCH_REGKEY_BLOCK_CODE_MODE - Indicates the Forward Error Correction Mode
*
* Forward Error Correction Mode (Pre-HS).
* DEFAULT = System Default
* OFF = 0x0
* ECC96_ENABLED = 0x1
* ECC88_ENABLED = 0x2
*/
#define NV_SWITCH_REGKEY_BLOCK_CODE_MODE "BlockCodeMode"
#define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_DEFAULT 0x0
#define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_OFF 0x0
#define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_ECC96_ENABLED 0x1
#define NV_SWITCH_REGKEY_BLOCK_CODE_MODE_ECC88_ENABLED 0x2
/*
* NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE - Indicates the reference clock mode for
* the system w.r.t. this link.
*
* DEFAULT = System Default
* COMMON = Common reference clock. Spread Spectrum (SS) may or may not be enabled.
* NON_COMMON_NO_SS = Non-common reference clock without SS enabled.
* NON_COMMON_SS = Non-common reference clock with SS enabled.
*/
#define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE "ReferenceClockMode"
#define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_DEFAULT 0x0
#define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_COMMON 0x0
#define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_RESERVED 0x1
#define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_NON_COMMON_NO_SS 0x2
#define NV_SWITCH_REGKEY_REFERENCE_CLOCK_MODE_NON_COMMON_SS 0x3
#endif //_REGKEY_NVSWITCH_H_