mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-24 00:43:57 +00:00
525.60.11
This commit is contained in:
@@ -235,7 +235,6 @@ void nvUpdateCurrentHardwareColorSpaceAndRangeEvo(
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NVEvoUpdateState *pUpdateState);
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NvBool nvAssignSOREvo(NVConnectorEvoPtr pConnectorEvo, NvU32 sorExcludeMask);
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void nvRestoreSORAssigmentsEvo(NVDevEvoRec *pDevEvo);
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void nvSetSwapBarrierNotifyEvo(NVDispEvoPtr pDispEvo,
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NvBool enable, NvBool isPre);
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@@ -307,6 +306,9 @@ NvBool nvNeedsTmoLut(NVDevEvoPtr pDevEvo,
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NvBool nvIsCscMatrixIdentity(const struct NvKmsCscMatrix *matrix);
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void nvSuspendDevEvo(NVDevEvoRec *pDevEvo);
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NvBool nvResumeDevEvo(NVDevEvoRec *pDevEvo);
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#ifdef __cplusplus
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};
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#endif
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@@ -926,11 +926,6 @@ typedef struct _NVEvoDevRec {
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NvU32 displayHandle;
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/*!
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* lastModesettingClient points to the pOpenDev of the client that
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* performed the last modeset.
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*/
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const struct NvKmsPerOpenDev *lastModesettingClient;
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/*!
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* modesetOwner points to the pOpenDev of the client that called
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@@ -938,6 +933,12 @@ typedef struct _NVEvoDevRec {
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*/
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const struct NvKmsPerOpenDev *modesetOwner;
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/*!
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* Indicates whether modeset ownership is changed since
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* last modeset.
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*/
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NvBool modesetOwnerChanged;
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/*!
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* NVEvoDevRec::numSubDevices is the number of GPUs in the SLI
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* device. This is the number of NVEvoSubDevPtrs in
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@@ -27,9 +27,11 @@
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#include "nvtypes.h"
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#include "nvkms-api.h"
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#define NVKMS_KAPI_MAX_EVENT_CHANNELS 3
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struct NvKmsKapiPrivAllocateChannelEventParams {
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NvU32 hClient;
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NvU32 hChannel;
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NvU32 hChannels[NVKMS_KAPI_MAX_EVENT_CHANNELS];
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};
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struct NvKmsKapiPrivSurfaceParams {
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@@ -39,7 +39,7 @@ struct NvKmsKapiChannelEvent {
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struct NvKmsKapiPrivAllocateChannelEventParams nvKmsParams;
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NvHandle hCallback;
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NvHandle hCallbacks[NVKMS_KAPI_MAX_EVENT_CHANNELS];
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NVOS10_EVENT_KERNEL_CALLBACK_EX rmCallback;
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};
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@@ -50,6 +50,34 @@ static void ChannelEventHandler(void *arg1, void *arg2, NvHandle hEvent,
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cb->proc(cb->data, 0);
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}
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void nvKmsKapiFreeChannelEvent
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(
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struct NvKmsKapiDevice *device,
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struct NvKmsKapiChannelEvent *cb
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)
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{
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int i;
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if (device == NULL || cb == NULL) {
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return;
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}
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for (i = 0; i < NVKMS_KAPI_MAX_EVENT_CHANNELS; ++i) {
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if (!cb->hCallbacks[i]) {
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continue;
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}
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nvRmApiFree(device->hRmClient,
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device->hRmClient,
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cb->hCallbacks[i]);
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nvFreeUnixRmHandle(&device->handleAllocator,
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cb->hCallbacks[i]);
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}
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nvKmsKapiFree(cb);
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}
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struct NvKmsKapiChannelEvent* nvKmsKapiAllocateChannelEvent
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(
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struct NvKmsKapiDevice *device,
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@@ -59,11 +87,8 @@ struct NvKmsKapiChannelEvent* nvKmsKapiAllocateChannelEvent
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NvU64 nvKmsParamsSize
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)
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{
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int status;
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NvU32 ret;
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int status, i;
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struct NvKmsKapiChannelEvent *cb = NULL;
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NV0005_ALLOC_PARAMETERS eventParams = { };
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if (device == NULL || proc == NULL) {
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goto fail;
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@@ -101,50 +126,45 @@ struct NvKmsKapiChannelEvent* nvKmsKapiAllocateChannelEvent
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cb->rmCallback.func = ChannelEventHandler;
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cb->rmCallback.arg = cb;
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cb->hCallback = nvGenerateUnixRmHandle(&device->handleAllocator);
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if (cb->hCallback == 0x0) {
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nvKmsKapiLogDeviceDebug(device,
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"Failed to allocate event callback handle");
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goto fail;
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}
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for (i = 0; i < NVKMS_KAPI_MAX_EVENT_CHANNELS; ++i) {
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NV0005_ALLOC_PARAMETERS eventParams = { };
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NvU32 ret;
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eventParams.hParentClient = cb->nvKmsParams.hClient;
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eventParams.hClass = NV01_EVENT_KERNEL_CALLBACK_EX;
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eventParams.notifyIndex = 0;
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eventParams.data = NV_PTR_TO_NvP64(&cb->rmCallback);
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if (!cb->nvKmsParams.hChannels[i]) {
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continue;
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}
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ret = nvRmApiAlloc(device->hRmClient,
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cb->nvKmsParams.hChannel,
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cb->hCallback,
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NV01_EVENT_KERNEL_CALLBACK_EX,
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&eventParams);
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if (ret != NVOS_STATUS_SUCCESS) {
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nvKmsKapiLogDeviceDebug(device, "Failed to allocate event callback");
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nvFreeUnixRmHandle(&device->handleAllocator, cb->hCallback);
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goto fail;
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cb->hCallbacks[i] = nvGenerateUnixRmHandle(&device->handleAllocator);
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if (cb->hCallbacks[i] == 0x0) {
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nvKmsKapiLogDeviceDebug(device,
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"Failed to allocate event callback handle for channel 0x%x",
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cb->nvKmsParams.hChannels[i]);
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goto fail;
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}
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eventParams.hParentClient = cb->nvKmsParams.hClient;
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eventParams.hClass = NV01_EVENT_KERNEL_CALLBACK_EX;
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eventParams.notifyIndex = 0;
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eventParams.data = NV_PTR_TO_NvP64(&cb->rmCallback);
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ret = nvRmApiAlloc(device->hRmClient,
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cb->nvKmsParams.hChannels[i],
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cb->hCallbacks[i],
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NV01_EVENT_KERNEL_CALLBACK_EX,
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&eventParams);
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if (ret != NVOS_STATUS_SUCCESS) {
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nvKmsKapiLogDeviceDebug(device,
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"Failed to allocate event callback for channel 0x%x",
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cb->nvKmsParams.hChannels[i]);
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nvFreeUnixRmHandle(&device->handleAllocator, cb->hCallbacks[i]);
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cb->hCallbacks[i] = 0;
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goto fail;
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}
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}
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return cb;
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fail:
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nvKmsKapiFree(cb);
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nvKmsKapiFreeChannelEvent(device, cb);
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return NULL;
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}
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void nvKmsKapiFreeChannelEvent
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(
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struct NvKmsKapiDevice *device,
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struct NvKmsKapiChannelEvent *cb
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)
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{
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if (device == NULL || cb == NULL) {
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return;
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}
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nvRmApiFree(device->hRmClient,
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device->hRmClient,
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cb->hCallback);
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nvFreeUnixRmHandle(&device->handleAllocator, cb->hCallback);
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nvKmsKapiFree(cb);
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}
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@@ -3627,8 +3627,6 @@ NvBool nvAllocCoreChannelEvo(NVDevEvoPtr pDevEvo)
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NvU32 dispIndex;
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NvU32 head;
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nvAssert(pDevEvo->lastModesettingClient == NULL);
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/* Do nothing if the display was already allocated */
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if (pDevEvo->displayHandle != 0) {
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return TRUE;
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@@ -3934,72 +3932,124 @@ NvBool nvAssignSOREvo(NVConnectorEvoPtr pConnectorEvo, NvU32 sorExcludeMask)
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return TRUE;
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}
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void nvRestoreSORAssigmentsEvo(NVDevEvoRec *pDevEvo)
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static void CacheSorAssignList(const NVDispEvoRec *pDispEvo,
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const NVConnectorEvoRec *sorAssignList[NV0073_CTRL_CMD_DFP_ASSIGN_SOR_MAX_SORS])
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{
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const NVConnectorEvoRec *pConnectorEvo;
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FOR_ALL_EVO_CONNECTORS(pConnectorEvo, pDispEvo) {
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NvU32 i;
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if (pConnectorEvo->or.type != NV0073_CTRL_SPECIFIC_OR_TYPE_SOR) {
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continue;
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}
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FOR_EACH_INDEX_IN_MASK(32, i, pConnectorEvo->or.mask) {
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/*
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* RM populates same sor index into more than one connectors if
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* they are are DCC partners, this checks make sure SOR
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* assignment happens only for a single connector. The sor
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* assignment call before modeset/dp-link-training makes sure
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* assignment happens for the correct connector.
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*/
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if (sorAssignList[i] != NULL) {
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continue;
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}
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sorAssignList[i] = pConnectorEvo;
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} FOR_EACH_INDEX_IN_MASK_END
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}
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}
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static void RestoreSorAssignList(NVDispEvoRec *pDispEvo,
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const NVConnectorEvoRec *sorAssignList[NV0073_CTRL_CMD_DFP_ASSIGN_SOR_MAX_SORS])
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{
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NVDevEvoRec *pDevEvo = pDispEvo->pDevEvo;
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NvU32 sorIndex;
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for (sorIndex = 0;
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sorIndex < NV0073_CTRL_CMD_DFP_ASSIGN_SOR_MAX_SORS; sorIndex++) {
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if (sorAssignList[sorIndex] == NULL) {
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continue;
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}
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NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS params = {
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.subDeviceInstance = pDispEvo->displayOwner,
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.displayId = nvDpyIdToNvU32(sorAssignList[sorIndex]->displayId),
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.sorExcludeMask = ~NVBIT(sorIndex),
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};
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NvU32 ret;
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ret = nvRmApiControl(nvEvoGlobal.clientHandle,
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pDevEvo->displayCommonHandle,
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NV0073_CTRL_CMD_DFP_ASSIGN_SOR,
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¶ms,
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sizeof(params));
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if (ret != NVOS_STATUS_SUCCESS) {
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nvEvoLogDispDebug(pDispEvo,
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EVO_LOG_ERROR,
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"Failed to restore SOR-%u -> %s assignment.",
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sorIndex, sorAssignList[sorIndex]->name);
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} else {
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RefreshSORAssignments(pDispEvo, ¶ms);
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}
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}
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}
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NvBool nvResumeDevEvo(NVDevEvoRec *pDevEvo)
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{
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struct {
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const NVConnectorEvoRec *
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sorAssignList[NV0073_CTRL_CMD_DFP_ASSIGN_SOR_MAX_SORS];
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} disp[NVKMS_MAX_SUBDEVICES] = { };
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NVDispEvoRec *pDispEvo;
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NvU32 dispIndex;
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if (!NV0073_CTRL_SYSTEM_GET_CAP(pDevEvo->commonCapsBits,
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if (NV0073_CTRL_SYSTEM_GET_CAP(pDevEvo->commonCapsBits,
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NV0073_CTRL_SYSTEM_CAPS_CROSS_BAR_SUPPORTED)) {
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return;
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}
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FOR_ALL_EVO_DISPLAYS(pDispEvo, dispIndex, pDevEvo) {
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const NVConnectorEvoRec *
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sorAssignList[NV0073_CTRL_CMD_DFP_ASSIGN_SOR_MAX_SORS] = { };
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const NVConnectorEvoRec *pConnectorEvo;
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NvU32 sorIndex;
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FOR_ALL_EVO_CONNECTORS(pConnectorEvo, pDispEvo) {
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NvU32 i;
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if (pConnectorEvo->or.type != NV0073_CTRL_SPECIFIC_OR_TYPE_SOR) {
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continue;
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}
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FOR_EACH_INDEX_IN_MASK(32, i, pConnectorEvo->or.mask) {
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/*
|
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* RM populates same sor index into more than one connectors if
|
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* they are are DCC partners, this checks make sure SOR
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* assignment happens only for a single connector. The sor
|
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* assignment call before modeset/dp-link-training makes sure
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* assignment happens for the correct connector.
|
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*/
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if (sorAssignList[i] != NULL) {
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continue;
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}
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sorAssignList[i] = pConnectorEvo;
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} FOR_EACH_INDEX_IN_MASK_END
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}
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for (sorIndex = 0; sorIndex < ARRAY_LEN(sorAssignList); sorIndex++) {
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if (sorAssignList[sorIndex] == NULL) {
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continue;
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}
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NV0073_CTRL_DFP_ASSIGN_SOR_PARAMS params = {
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.subDeviceInstance = pDispEvo->displayOwner,
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.displayId = nvDpyIdToNvU32(sorAssignList[sorIndex]->displayId),
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.sorExcludeMask = ~NVBIT(sorIndex),
|
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};
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NvU32 ret;
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|
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ret = nvRmApiControl(nvEvoGlobal.clientHandle,
|
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pDevEvo->displayCommonHandle,
|
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NV0073_CTRL_CMD_DFP_ASSIGN_SOR,
|
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¶ms,
|
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sizeof(params));
|
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|
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if (ret != NVOS_STATUS_SUCCESS) {
|
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nvEvoLogDispDebug(pDispEvo,
|
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EVO_LOG_ERROR,
|
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"Failed to restore SOR-%u -> %s assigment.",
|
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sorIndex, sorAssignList[sorIndex]->name);
|
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} else {
|
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RefreshSORAssignments(pDispEvo, ¶ms);
|
||||
}
|
||||
FOR_ALL_EVO_DISPLAYS(pDispEvo, dispIndex, pDevEvo) {
|
||||
CacheSorAssignList(pDispEvo, disp[dispIndex].sorAssignList);
|
||||
}
|
||||
}
|
||||
|
||||
if (!nvAllocCoreChannelEvo(pDevEvo)) {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/*
|
||||
* During the hibernate-resume cycle vbios or GOP driver programs
|
||||
* the display engine to lit up the boot display. In
|
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* hibernate-resume path, doing NV0073_CTRL_CMD_DFP_ASSIGN_SOR
|
||||
* rm-control call before the core channel allocation causes display
|
||||
* channel hang because at that stage RM is not aware of the boot
|
||||
* display actived by vbios and it ends up unrouting active SOR
|
||||
* assignments. Therefore restore the SOR assignment only after the
|
||||
* core channel allocation.
|
||||
*/
|
||||
|
||||
if (NV0073_CTRL_SYSTEM_GET_CAP(pDevEvo->commonCapsBits,
|
||||
NV0073_CTRL_SYSTEM_CAPS_CROSS_BAR_SUPPORTED)) {
|
||||
|
||||
/*
|
||||
* Shutdown all heads before restoring the SOR assignments because in
|
||||
* case of hibernate-resume the SOR, for which NVKMS is trying to
|
||||
* restore the assignment, might be in use by the boot display setup
|
||||
* by vbios/gop driver.
|
||||
*/
|
||||
nvShutDownHeads(pDevEvo, NULL /* pTestFunc, shut down all heads */);
|
||||
|
||||
FOR_ALL_EVO_DISPLAYS(pDispEvo, dispIndex, pDevEvo) {
|
||||
RestoreSorAssignList(pDispEvo, disp[dispIndex].sorAssignList);
|
||||
}
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
void nvSuspendDevEvo(NVDevEvoRec *pDevEvo)
|
||||
{
|
||||
nvFreeCoreChannelEvo(pDevEvo);
|
||||
}
|
||||
|
||||
static void ClearApiHeadState(NVDevEvoRec *pDevEvo)
|
||||
@@ -4088,8 +4138,6 @@ void nvFreeCoreChannelEvo(NVDevEvoPtr pDevEvo)
|
||||
|
||||
nvFree(pDevEvo->gpus);
|
||||
pDevEvo->gpus = NULL;
|
||||
|
||||
pDevEvo->lastModesettingClient = NULL;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -1078,15 +1078,12 @@ void nvHsConfigInitSwapGroup(
|
||||
}
|
||||
|
||||
/*
|
||||
*
|
||||
* If (pDevEvo->modesetOwner != NULL) but
|
||||
* (pDevEvo->lastModesettingClient != pDevEvo->modesetOwner) that
|
||||
* means the modeset ownership is grabbed by the external client
|
||||
* but it hasn't performed any modeset and the console is still
|
||||
* active.
|
||||
* pDevEvo->modesetOwnerChanged is TRUE, that means the modeset
|
||||
* ownership is grabbed by the external client but it hasn't
|
||||
* performed any modeset and the console is still active.
|
||||
*/
|
||||
if ((pDevEvo->modesetOwner != NULL) &&
|
||||
(pDevEvo->lastModesettingClient != pDevEvo->modesetOwner)) {
|
||||
if ((pDevEvo->modesetOwner != NULL) && pDevEvo->modesetOwnerChanged) {
|
||||
continue;
|
||||
}
|
||||
|
||||
|
||||
@@ -145,7 +145,7 @@ InheritPreviousModesetState(const NVDevEvoRec *pDevEvo,
|
||||
const struct NvKmsPerOpenDev *pCurrentModesetOpenDev)
|
||||
{
|
||||
return (pCurrentModesetOpenDev != pDevEvo->pNvKmsOpenDev) &&
|
||||
(pCurrentModesetOpenDev == pDevEvo->lastModesettingClient);
|
||||
!pDevEvo->modesetOwnerChanged;
|
||||
}
|
||||
|
||||
/*!
|
||||
@@ -2824,7 +2824,7 @@ NvBool nvSetDispModeEvo(NVDevEvoPtr pDevEvo,
|
||||
|
||||
pDevEvo->skipConsoleRestore = FALSE;
|
||||
|
||||
pDevEvo->lastModesettingClient = pOpenDev;
|
||||
pDevEvo->modesetOwnerChanged = FALSE;
|
||||
|
||||
FOR_ALL_EVO_DISPLAYS(pDispEvo, dispIndex, pDevEvo) {
|
||||
NvU32 head;
|
||||
|
||||
@@ -935,6 +935,7 @@ static NvBool GrabModesetOwnership(struct NvKmsPerOpenDev *pOpenDev)
|
||||
}
|
||||
|
||||
pDevEvo->modesetOwner = pOpenDev;
|
||||
pDevEvo->modesetOwnerChanged = TRUE;
|
||||
|
||||
AssignFullNvKmsFlipPermissions(pDevEvo, &pOpenDev->flipPermissions);
|
||||
AssignFullNvKmsModesetPermissions(pDevEvo, &pOpenDev->modesetPermissions);
|
||||
@@ -996,14 +997,6 @@ static void RevokePermissionsInternal(
|
||||
}
|
||||
}
|
||||
|
||||
static void ReallocCoreChannel(NVDevEvoRec *pDevEvo)
|
||||
{
|
||||
if (nvAllocCoreChannelEvo(pDevEvo)) {
|
||||
nvDPSetAllowMultiStreaming(pDevEvo, TRUE /* allowMST */);
|
||||
AllocSurfaceCtxDmasForAllOpens(pDevEvo);
|
||||
}
|
||||
}
|
||||
|
||||
static void RestoreConsole(NVDevEvoPtr pDevEvo)
|
||||
{
|
||||
// Try to issue a modeset and flip to the framebuffer console surface.
|
||||
@@ -1016,7 +1009,10 @@ static void RestoreConsole(NVDevEvoPtr pDevEvo)
|
||||
// Reallocate the core channel right after freeing it. This makes sure
|
||||
// that it's allocated and ready right away if another NVKMS client is
|
||||
// started.
|
||||
ReallocCoreChannel(pDevEvo);
|
||||
if (nvAllocCoreChannelEvo(pDevEvo)) {
|
||||
nvDPSetAllowMultiStreaming(pDevEvo, TRUE /* allowMST */);
|
||||
AllocSurfaceCtxDmasForAllOpens(pDevEvo);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1039,6 +1035,7 @@ static NvBool ReleaseModesetOwnership(struct NvKmsPerOpenDev *pOpenDev)
|
||||
FreeSwapGroups(pOpenDev);
|
||||
|
||||
pDevEvo->modesetOwner = NULL;
|
||||
pDevEvo->modesetOwnerChanged = TRUE;
|
||||
pDevEvo->handleConsoleHotplugs = TRUE;
|
||||
|
||||
RestoreConsole(pDevEvo);
|
||||
@@ -1489,7 +1486,6 @@ static void FreeDeviceReference(struct NvKmsPerOpen *pOpen,
|
||||
ReleaseModesetOwnership(pOpenDev);
|
||||
|
||||
nvAssert(pOpenDev->pDevEvo->modesetOwner != pOpenDev);
|
||||
nvAssert(pOpenDev->pDevEvo->lastModesettingClient != pOpenDev);
|
||||
}
|
||||
|
||||
nvFreePerOpenDev(pOpen, pOpenDev);
|
||||
@@ -5648,7 +5644,7 @@ void nvKmsSuspend(NvU32 gpuId)
|
||||
|
||||
FreeSurfaceCtxDmasForAllOpens(pDevEvo);
|
||||
|
||||
nvFreeCoreChannelEvo(pDevEvo);
|
||||
nvSuspendDevEvo(pDevEvo);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -5665,9 +5661,10 @@ void nvKmsResume(NvU32 gpuId)
|
||||
FOR_ALL_EVO_DEVS(pDevEvo) {
|
||||
nvEvoLogDevDebug(pDevEvo, EVO_LOG_INFO, "Resuming");
|
||||
|
||||
nvRestoreSORAssigmentsEvo(pDevEvo);
|
||||
|
||||
ReallocCoreChannel(pDevEvo);
|
||||
if (nvResumeDevEvo(pDevEvo)) {
|
||||
nvDPSetAllowMultiStreaming(pDevEvo, TRUE /* allowMST */);
|
||||
AllocSurfaceCtxDmasForAllOpens(pDevEvo);
|
||||
}
|
||||
|
||||
if (pDevEvo->modesetOwner == NULL) {
|
||||
// Hardware state was lost, so we need to force a console
|
||||
|
||||
Reference in New Issue
Block a user