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This commit is contained in:
Maneet Singh
2025-09-02 10:35:52 -07:00
parent 288f16e614
commit 6387af3092
67 changed files with 1665 additions and 838 deletions
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10
src/nvidia/generated/g_all_dcl_pb.h
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@@ -20,8 +20,8 @@ extern const PRB_MSG_DESC prb_messages_dcl[];
// Message maximum lengths
// Does not include repeated fields, strings and byte arrays.
#define DCL_ENGINES_LEN 142
#define DCL_DCLMSG_LEN 2262
#define DCL_ERRORBLOCK_LEN 2266
#define DCL_DCLMSG_LEN 2298
#define DCL_ERRORBLOCK_LEN 2302
extern const PRB_FIELD_DESC prb_fields_dcl_engines[];
@@ -58,8 +58,8 @@ extern const PRB_FIELD_DESC prb_fields_dcl_dclmsg[];
#define DCL_DCLMSG_ENGINE_LEN 145
#define DCL_DCLMSG_RC_DIAG_RECS_LEN 42
#define DCL_DCLMSG_CRASHCAT_REPORT_LEN 564
#define DCL_DCLMSG_GSP_RPCDEBUGINFO_LEN 245
#define DCL_DCLMSG_GSP_XIDREPORT_LEN 828
#define DCL_DCLMSG_GSP_RPCDEBUGINFO_LEN 263
#define DCL_DCLMSG_GSP_XIDREPORT_LEN 846
extern const PRB_FIELD_DESC prb_fields_dcl_errorblock[];
@@ -67,7 +67,7 @@ extern const PRB_FIELD_DESC prb_fields_dcl_errorblock[];
#define DCL_ERRORBLOCK_DATA (&prb_fields_dcl_errorblock[0])
// 'ErrorBlock' field lengths
#define DCL_ERRORBLOCK_DATA_LEN 2265
#define DCL_ERRORBLOCK_DATA_LEN 2301
extern const PRB_SERVICE_DESC prb_services_dcl[];

14
src/nvidia/generated/g_engines_pb.c
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@@ -380,6 +380,18 @@ const PRB_FIELD_DESC prb_fields_nvdebug_eng_kgsp_rpcinfo[] = {
PRB_MAYBE_FIELD_NAME("data1")
PRB_MAYBE_FIELD_DEFAULT(0)
},
{
6,
{
PRB_OPTIONAL,
PRB_UINT32,
0,
},
0,
0,
PRB_MAYBE_FIELD_NAME("sequence")
PRB_MAYBE_FIELD_DEFAULT(0)
},
};
// Message descriptors
@@ -415,7 +427,7 @@ const PRB_MSG_DESC prb_messages_nvdebug_eng[] = {
PRB_MAYBE_MESSAGE_NAME("NvDebug.Eng.Mc.PciBarInfo")
},
{
5,
6,
prb_fields_nvdebug_eng_kgsp_rpcinfo,
PRB_MAYBE_MESSAGE_NAME("NvDebug.Eng.KGsp.RpcInfo")
},

10
src/nvidia/generated/g_engines_pb.h
View File

@@ -21,10 +21,10 @@ extern const PRB_MSG_DESC prb_messages_nvdebug_eng[];
#define NVDEBUG_ENG_MC_LEN 72
#define NVDEBUG_ENG_GPU_LEN 62
#define NVDEBUG_ENG_NVD_LEN 30
#define NVDEBUG_ENG_KGSP_LEN 88
#define NVDEBUG_ENG_KGSP_LEN 100
#define NVDEBUG_ENG_MC_RMDATA_LEN 12
#define NVDEBUG_ENG_MC_PCIBARINFO_LEN 22
#define NVDEBUG_ENG_KGSP_RPCINFO_LEN 40
#define NVDEBUG_ENG_KGSP_RPCINFO_LEN 46
extern const PRB_FIELD_DESC prb_fields_nvdebug_eng_mc[];
@@ -85,8 +85,8 @@ extern const PRB_FIELD_DESC prb_fields_nvdebug_eng_kgsp[];
#define NVDEBUG_ENG_KGSP_EVENT_HISTORY (&prb_fields_nvdebug_eng_kgsp[1])
// 'KGsp' field lengths
#define NVDEBUG_ENG_KGSP_RPC_HISTORY_LEN 43
#define NVDEBUG_ENG_KGSP_EVENT_HISTORY_LEN 43
#define NVDEBUG_ENG_KGSP_RPC_HISTORY_LEN 49
#define NVDEBUG_ENG_KGSP_EVENT_HISTORY_LEN 49
extern const PRB_FIELD_DESC prb_fields_nvdebug_eng_mc_rmdata[];
@@ -116,6 +116,7 @@ extern const PRB_FIELD_DESC prb_fields_nvdebug_eng_kgsp_rpcinfo[];
#define NVDEBUG_ENG_KGSP_RPCINFO_TS_END (&prb_fields_nvdebug_eng_kgsp_rpcinfo[2])
#define NVDEBUG_ENG_KGSP_RPCINFO_DATA0 (&prb_fields_nvdebug_eng_kgsp_rpcinfo[3])
#define NVDEBUG_ENG_KGSP_RPCINFO_DATA1 (&prb_fields_nvdebug_eng_kgsp_rpcinfo[4])
#define NVDEBUG_ENG_KGSP_RPCINFO_SEQUENCE (&prb_fields_nvdebug_eng_kgsp_rpcinfo[5])
// 'RpcInfo' field lengths
#define NVDEBUG_ENG_KGSP_RPCINFO_FUNCTION_LEN 5
@@ -123,6 +124,7 @@ extern const PRB_FIELD_DESC prb_fields_nvdebug_eng_kgsp_rpcinfo[];
#define NVDEBUG_ENG_KGSP_RPCINFO_TS_END_LEN 10
#define NVDEBUG_ENG_KGSP_RPCINFO_DATA0_LEN 5
#define NVDEBUG_ENG_KGSP_RPCINFO_DATA1_LEN 5
#define NVDEBUG_ENG_KGSP_RPCINFO_SEQUENCE_LEN 5
extern const PRB_SERVICE_DESC prb_services_nvdebug_eng[];

14
src/nvidia/generated/g_gsp_pb.c
View File

@@ -104,6 +104,18 @@ const PRB_FIELD_DESC prb_fields_gsp_rpcentry[] = {
PRB_MAYBE_FIELD_NAME("duration")
PRB_MAYBE_FIELD_DEFAULT(0)
},
{
9,
{
PRB_OPTIONAL,
PRB_UINT32,
0,
},
0,
0,
PRB_MAYBE_FIELD_NAME("sequence")
PRB_MAYBE_FIELD_DEFAULT(0)
},
};
// 'RpcHistoryCpuToGsp' field defaults
@@ -253,7 +265,7 @@ const PRB_FIELD_DESC prb_fields_gsp_xidreport[] = {
// Message descriptors
const PRB_MSG_DESC prb_messages_gsp[] = {
{
8,
9,
prb_fields_gsp_rpcentry,
PRB_MAYBE_MESSAGE_NAME("Gsp.RpcEntry")
},

24
src/nvidia/generated/g_gsp_pb.h
View File

@@ -16,11 +16,11 @@ extern const PRB_MSG_DESC prb_messages_gsp[];
// Message maximum lengths
// Does not include repeated fields, strings and byte arrays.
#define GSP_RPCENTRY_LEN 74
#define GSP_RPCHISTORYCPUTOGSP_LEN 78
#define GSP_RPCHISTORYGSPTOCPU_LEN 78
#define GSP_RPCDEBUGINFO_LEN 242
#define GSP_XIDREPORT_LEN 825
#define GSP_RPCENTRY_LEN 80
#define GSP_RPCHISTORYCPUTOGSP_LEN 84
#define GSP_RPCHISTORYGSPTOCPU_LEN 84
#define GSP_RPCDEBUGINFO_LEN 260
#define GSP_XIDREPORT_LEN 843
extern const PRB_FIELD_DESC prb_fields_gsp_rpcentry[];
@@ -33,6 +33,7 @@ extern const PRB_FIELD_DESC prb_fields_gsp_rpcentry[];
#define GSP_RPCENTRY_STARTTIMESTAMP (&prb_fields_gsp_rpcentry[5])
#define GSP_RPCENTRY_ENDTIMESTAMP (&prb_fields_gsp_rpcentry[6])
#define GSP_RPCENTRY_DURATION (&prb_fields_gsp_rpcentry[7])
#define GSP_RPCENTRY_SEQUENCE (&prb_fields_gsp_rpcentry[8])
// 'RpcEntry' field lengths
#define GSP_RPCENTRY_HISTORYINDEX_LEN 5
@@ -43,6 +44,7 @@ extern const PRB_FIELD_DESC prb_fields_gsp_rpcentry[];
#define GSP_RPCENTRY_STARTTIMESTAMP_LEN 10
#define GSP_RPCENTRY_ENDTIMESTAMP_LEN 10
#define GSP_RPCENTRY_DURATION_LEN 10
#define GSP_RPCENTRY_SEQUENCE_LEN 5
extern const PRB_FIELD_DESC prb_fields_gsp_rpchistorycputogsp[];
@@ -50,7 +52,7 @@ extern const PRB_FIELD_DESC prb_fields_gsp_rpchistorycputogsp[];
#define GSP_RPCHISTORYCPUTOGSP_RPCENTRY (&prb_fields_gsp_rpchistorycputogsp[0])
// 'RpcHistoryCpuToGsp' field lengths
#define GSP_RPCHISTORYCPUTOGSP_RPCENTRY_LEN 77
#define GSP_RPCHISTORYCPUTOGSP_RPCENTRY_LEN 83
extern const PRB_FIELD_DESC prb_fields_gsp_rpchistorygsptocpu[];
@@ -58,7 +60,7 @@ extern const PRB_FIELD_DESC prb_fields_gsp_rpchistorygsptocpu[];
#define GSP_RPCHISTORYGSPTOCPU_RPCENTRY (&prb_fields_gsp_rpchistorygsptocpu[0])
// 'RpcHistoryGspToCpu' field lengths
#define GSP_RPCHISTORYGSPTOCPU_RPCENTRY_LEN 77
#define GSP_RPCHISTORYGSPTOCPU_RPCENTRY_LEN 83
extern const PRB_FIELD_DESC prb_fields_gsp_rpcdebuginfo[];
@@ -68,9 +70,9 @@ extern const PRB_FIELD_DESC prb_fields_gsp_rpcdebuginfo[];
#define GSP_RPCDEBUGINFO_RPCHISTORYGSPTOCPU (&prb_fields_gsp_rpcdebuginfo[2])
// 'RpcDebugInfo' field lengths
#define GSP_RPCDEBUGINFO_ACTIVERPC_LEN 77
#define GSP_RPCDEBUGINFO_RPCHISTORYCPUTOGSP_LEN 81
#define GSP_RPCDEBUGINFO_RPCHISTORYGSPTOCPU_LEN 81
#define GSP_RPCDEBUGINFO_ACTIVERPC_LEN 83
#define GSP_RPCDEBUGINFO_RPCHISTORYCPUTOGSP_LEN 87
#define GSP_RPCDEBUGINFO_RPCHISTORYGSPTOCPU_LEN 87
extern const PRB_FIELD_DESC prb_fields_gsp_xidreport[];
@@ -86,7 +88,7 @@ extern const PRB_FIELD_DESC prb_fields_gsp_xidreport[];
#define GSP_XIDREPORT_GPUINSTANCE_LEN 5
#define GSP_XIDREPORT_BUILDID_LEN 1
#define GSP_XIDREPORT_CRASHCATREPORT_LEN 564
#define GSP_XIDREPORT_RPCDEBUGINFO_LEN 245
#define GSP_XIDREPORT_RPCDEBUGINFO_LEN 263
extern const PRB_SERVICE_DESC prb_services_gsp[];

13
src/nvidia/generated/g_kern_bus_nvoc.h
View File

@@ -116,6 +116,14 @@ typedef enum
#define BUS_MAP_FB_FLAGS_PRE_INIT NVBIT(7)
#define BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG NVBIT(8)
#define BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA NVBIT(9)
#define BUS_MAP_FB_FLAGS_PAGE_SIZE_4K NVBIT(10)
#define BUS_MAP_FB_FLAGS_PAGE_SIZE_64K NVBIT(11)
#define BUS_MAP_FB_FLAGS_PAGE_SIZE_2M NVBIT(12)
#define BUS_MAP_FB_FLAGS_PAGE_SIZE_512M NVBIT(13)
// Reserve 3 bits for future expansion of page size.
#define BUS_MAP_FB_FLAGS_PAGE_SIZE_RESERVED_2 NVBIT(14)
#define BUS_MAP_FB_FLAGS_PAGE_SIZE_RESERVED_3 NVBIT(15)
#define BUS_MAP_FB_FLAGS_PAGE_SIZE_RESERVED_4 NVBIT(16)
#define BUS_MAP_FB_FLAGS_ALL_FLAGS \
(BUS_MAP_FB_FLAGS_MAP_RSVD_BAR1 |\
@@ -127,6 +135,10 @@ typedef enum
BUS_MAP_FB_FLAGS_MAP_OFFSET_FIXED |\
BUS_MAP_FB_FLAGS_PRE_INIT |\
BUS_MAP_FB_FLAGS_ALLOW_DISCONTIG |\
BUS_MAP_FB_FLAGS_PAGE_SIZE_4K |\
BUS_MAP_FB_FLAGS_PAGE_SIZE_64K |\
BUS_MAP_FB_FLAGS_PAGE_SIZE_2M |\
BUS_MAP_FB_FLAGS_PAGE_SIZE_512M |\
BUS_MAP_FB_FLAGS_UNMANAGED_MEM_AREA)
#define BUS_MAP_FB_FLAGS_FERMI_INVALID ((~BUS_MAP_FB_FLAGS_ALL_FLAGS) | BUS_MAP_FB_FLAGS_MAP_RSVD_BAR1)
@@ -233,6 +245,7 @@ typedef struct Bar1VaInfo
NvU64 apertureLength; // Aperture length that is visible to CPU
NvU64 mappableLength; // Total mappable aperture length after WARs
struct OBJVASPACE *pVAS;
NvU64 vasFreeSize; // Cached value of the BAR1 VAS's free size used by PMA
NvU64 instBlockBase;
MEMORY_DESCRIPTOR *pInstBlkMemDesc;
ReuseMappingDb reuseDb;

26
src/nvidia/generated/g_nv_name_released.h
View File

@@ -5214,6 +5214,7 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2236, 0x1482, 0x10de, "NVIDIA A10" },
{ 0x2237, 0x152f, 0x10de, "NVIDIA A10G" },
{ 0x2238, 0x1677, 0x10de, "NVIDIA A10M" },
{ 0x230E, 0x20df, 0x10de, "NVIDIA H20 NVL16" },
{ 0x2321, 0x1839, 0x10de, "NVIDIA H100 NVL" },
{ 0x2322, 0x17a4, 0x10de, "NVIDIA H800 PCIe" },
{ 0x2324, 0x17a6, 0x10de, "NVIDIA H800" },
@@ -5414,9 +5415,10 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2941, 0x20d5, 0x10de, "NVIDIA GB200" },
{ 0x2941, 0x21c9, 0x10de, "NVIDIA GB200" },
{ 0x2941, 0x21ca, 0x10de, "NVIDIA GB200" },
{ 0x29BB, 0x207c, 0x10de, "NVIDIA DRIVE P2021" },
{ 0x2B85, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090" },
{ 0x2B87, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 D" },
{ 0x2B8C, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 D V2" },
{ 0x2B8C, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 D v2" },
{ 0x2BB1, 0x204b, 0x1028, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" },
{ 0x2BB1, 0x204b, 0x103c, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" },
{ 0x2BB1, 0x204b, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" },
@@ -5430,6 +5432,7 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2BB4, 0x204c, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition" },
{ 0x2BB4, 0x204c, 0x17aa, "NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition" },
{ 0x2BB5, 0x204e, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Server Edition" },
{ 0x2BB9, 0x2091, 0x10de, "NVIDIA RTX 6000D" },
{ 0x2C02, 0x0000, 0x0000, "NVIDIA GeForce RTX 5080" },
{ 0x2C05, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti" },
{ 0x2C18, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 Laptop GPU" },
@@ -5470,6 +5473,8 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2F18, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti Laptop GPU" },
{ 0x2F38, 0x0000, 0x0000, "NVIDIA RTX PRO 3000 Blackwell Generation Laptop GPU" },
{ 0x2F58, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti Laptop GPU" },
{ 0x3182, 0x20e6, 0x10de, "NVIDIA B300 SXM6 AC" },
{ 0x31C2, 0x21f1, 0x10de, "NVIDIA GB300" },
{ 0x13BD, 0x11cc, 0x10DE, "GRID M10-0B" },
{ 0x13BD, 0x11cd, 0x10DE, "GRID M10-1B" },
{ 0x13BD, 0x11ce, 0x10DE, "GRID M10-0Q" },
@@ -6070,6 +6075,25 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2238, 0x16b9, 0x10DE, "NVIDIA A10M-20C" },
{ 0x2238, 0x16e6, 0x10DE, "NVIDIA A10M-1" },
{ 0x2238, 0x2208, 0x10DE, "NVIDIA A10M-3B" },
{ 0x230E, 0x20f5, 0x10DE, "NVIDIA H20L-1-15CME" },
{ 0x230E, 0x20f6, 0x10DE, "NVIDIA H20L-1-15C" },
{ 0x230E, 0x20f7, 0x10DE, "NVIDIA H20L-1-30C" },
{ 0x230E, 0x20f8, 0x10DE, "NVIDIA H20L-2-30C" },
{ 0x230E, 0x20f9, 0x10DE, "NVIDIA H20L-3-60C" },
{ 0x230E, 0x20fa, 0x10DE, "NVIDIA H20L-4-60C" },
{ 0x230E, 0x20fb, 0x10DE, "NVIDIA H20L-7-120C" },
{ 0x230E, 0x20fc, 0x10DE, "NVIDIA H20L-4C" },
{ 0x230E, 0x20fd, 0x10DE, "NVIDIA H20L-5C" },
{ 0x230E, 0x20fe, 0x10DE, "NVIDIA H20L-6C" },
{ 0x230E, 0x20ff, 0x10DE, "NVIDIA H20L-8C" },
{ 0x230E, 0x2100, 0x10DE, "NVIDIA H20L-10C" },
{ 0x230E, 0x2101, 0x10DE, "NVIDIA H20L-12C" },
{ 0x230E, 0x2102, 0x10DE, "NVIDIA H20L-15C" },
{ 0x230E, 0x2103, 0x10DE, "NVIDIA H20L-20C" },
{ 0x230E, 0x2104, 0x10DE, "NVIDIA H20L-30C" },
{ 0x230E, 0x2105, 0x10DE, "NVIDIA H20L-40C" },
{ 0x230E, 0x2106, 0x10DE, "NVIDIA H20L-60C" },
{ 0x230E, 0x2107, 0x10DE, "NVIDIA H20L-120C" },
{ 0x2321, 0x1853, 0x10DE, "NVIDIA H100L-1-12CME" },
{ 0x2321, 0x1854, 0x10DE, "NVIDIA H100L-1-12C" },
{ 0x2321, 0x1855, 0x10DE, "NVIDIA H100L-1-24C" },

10
src/nvidia/generated/g_nvdebug_pb.h
View File

@@ -42,8 +42,8 @@ extern const PRB_MSG_DESC prb_messages_nvdebug[];
// Message maximum lengths
// Does not include repeated fields, strings and byte arrays.
#define NVDEBUG_SYSTEMINFO_LEN 354
#define NVDEBUG_GPUINFO_LEN 268
#define NVDEBUG_NVDUMP_LEN 3265
#define NVDEBUG_GPUINFO_LEN 280
#define NVDEBUG_NVDUMP_LEN 3313
#define NVDEBUG_SYSTEMINFO_NORTHBRIDGEINFO_LEN 12
#define NVDEBUG_SYSTEMINFO_SOCINFO_LEN 12
#define NVDEBUG_SYSTEMINFO_CPUINFO_LEN 24
@@ -101,7 +101,7 @@ extern const PRB_FIELD_DESC prb_fields_nvdebug_gpuinfo[];
#define NVDEBUG_GPUINFO_ENG_GPU_LEN 65
#define NVDEBUG_GPUINFO_ENG_MC_LEN 75
#define NVDEBUG_GPUINFO_ENG_NVD_LEN 33
#define NVDEBUG_GPUINFO_ENG_KGSP_LEN 91
#define NVDEBUG_GPUINFO_ENG_KGSP_LEN 103
extern const PRB_FIELD_DESC prb_fields_nvdebug_nvdump[];
@@ -114,8 +114,8 @@ extern const PRB_FIELD_DESC prb_fields_nvdebug_nvdump[];
// 'NvDump' field lengths
#define NVDEBUG_NVDUMP_SYSTEM_INFO_LEN 357
#define NVDEBUG_NVDUMP_DCL_MSG_LEN 2265
#define NVDEBUG_NVDUMP_GPU_INFO_LEN 271
#define NVDEBUG_NVDUMP_DCL_MSG_LEN 2301
#define NVDEBUG_NVDUMP_GPU_INFO_LEN 283
#define NVDEBUG_NVDUMP_EXCEPTION_ADDRESS_LEN 10
#define NVDEBUG_NVDUMP_SYSTEM_INFO_GSPRM_LEN 357

12
src/nvidia/generated/g_rpc_hal.h
View File

@@ -16,8 +16,8 @@
typedef NV_STATUS RpcConstruct(POBJGPU, POBJRPC);
typedef void RpcDestroy(POBJGPU, POBJRPC);
typedef NV_STATUS RpcSendMessage(POBJGPU, POBJRPC);
typedef NV_STATUS RpcRecvPoll(POBJGPU, POBJRPC, NvU32);
typedef NV_STATUS RpcSendMessage(POBJGPU, POBJRPC, NvU32 *);
typedef NV_STATUS RpcRecvPoll(POBJGPU, POBJRPC, NvU32, NvU32);
//
@@ -42,10 +42,10 @@ typedef struct RPC_OBJ_IFACES {
(_pRpc)->obj.__rpcConstruct__(_pGpu, _pRpc)
#define rpcDestroy(_pGpu, _pRpc) \
(_pRpc)->obj.__rpcDestroy__(_pGpu, _pRpc)
#define rpcSendMessage(_pGpu, _pRpc) \
(_pRpc)->obj.__rpcSendMessage__(_pGpu, _pRpc)
#define rpcRecvPoll(_pGpu, _pRpc, _arg0) \
(_pRpc)->obj.__rpcRecvPoll__(_pGpu, _pRpc, _arg0)
#define rpcSendMessage(_pGpu, _pRpc, _pArg0) \
(_pRpc)->obj.__rpcSendMessage__(_pGpu, _pRpc, _pArg0)
#define rpcRecvPoll(_pGpu, _pRpc, _arg0, _arg1) \
(_pRpc)->obj.__rpcRecvPoll__(_pGpu, _pRpc, _arg0, _arg1)
//