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This commit is contained in:
Andy Ritger
2022-11-10 08:39:33 -08:00
parent 7c345b838b
commit 758b4ee818
1323 changed files with 262135 additions and 60754 deletions
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422
src/common/nvswitch/interface/ctrl_dev_nvswitch.h
View File

@@ -960,7 +960,14 @@ typedef enum nvswitch_err_type
NVSWITCH_ERR_HW_NPORT_ROUTE_NVS_ECC_LIMIT_ERR = 15011,
NVSWITCH_ERR_HW_NPORT_ROUTE_NVS_ECC_DBE_ERR = 15012,
NVSWITCH_ERR_HW_NPORT_ROUTE_CDTPARERR = 15013,
NVSWITCH_ERR_HW_NPORT_ROUTE_LAST = 15021, /* NOTE: Must be last */
NVSWITCH_ERR_HW_NPORT_ROUTE_MCRID_ECC_LIMIT_ERR = 15014,
NVSWITCH_ERR_HW_NPORT_ROUTE_MCRID_ECC_DBE_ERR = 15015,
NVSWITCH_ERR_HW_NPORT_ROUTE_EXTMCRID_ECC_LIMIT_ERR = 15016,
NVSWITCH_ERR_HW_NPORT_ROUTE_EXTMCRID_ECC_DBE_ERR = 15017,
NVSWITCH_ERR_HW_NPORT_ROUTE_RAM_ECC_LIMIT_ERR = 15018,
NVSWITCH_ERR_HW_NPORT_ROUTE_RAM_ECC_DBE_ERR = 15019,
NVSWITCH_ERR_HW_NPORT_ROUTE_INVALID_MCRID_ERR = 15020,
NVSWITCH_ERR_HW_NPORT_ROUTE_LAST, /* NOTE: Must be last */
/* NPORT: Nport errors */
NVSWITCH_ERR_HW_NPORT = 16000,
@@ -1212,6 +1219,7 @@ typedef enum nvswitch_err_type
NVSWITCH_ERR_HW_NVLIPT_LNK_SLEEPWHILEACTIVELINK = 25007,
NVSWITCH_ERR_HW_NVLIPT_LNK_RSTSEQ_PHYCTL_TIMEOUT = 25008,
NVSWITCH_ERR_HW_NVLIPT_LNK_RSTSEQ_CLKCTL_TIMEOUT = 25009,
NVSWITCH_ERR_HW_NVLIPT_LNK_ALI_TRAINING_FAIL = 25010,
NVSWITCH_ERR_HW_NVLIPT_LNK_LAST, /* Note: Must be last */
/* SOE errors */
@@ -1226,6 +1234,26 @@ typedef enum nvswitch_err_type
NVSWITCH_ERR_HW_SOE_WATCHDOG = 26008,
NVSWITCH_ERR_HW_SOE_LAST, /* Note: Must be last */
/* NPORT: Multicast Tstate errors */
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE = 28000,
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_TAGPOOL_ECC_LIMIT_ERR = 28001,
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_TAGPOOL_ECC_DBE_ERR = 28002,
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_CRUMBSTORE_ECC_LIMIT_ERR = 28003,
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_CRUMBSTORE_ECC_DBE_ERR = 28004,
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_CRUMBSTORE_BUF_OVERWRITE_ERR = 28005,
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_CRUMBSTORE_MCTO_ERR = 28006,
NVSWITCH_ERR_HW_NPORT_MULTICASTTSTATE_LAST, /* Note: Must be last */
/* NPORT: Reduction Tstate errors */
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE = 29000,
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_TAGPOOL_ECC_LIMIT_ERR = 29001,
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_TAGPOOL_ECC_DBE_ERR = 29002,
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_CRUMBSTORE_ECC_LIMIT_ERR = 29003,
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_CRUMBSTORE_ECC_DBE_ERR = 29004,
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_CRUMBSTORE_BUF_OVERWRITE_ERR = 29005,
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_CRUMBSTORE_RTO_ERR = 29006,
NVSWITCH_ERR_HW_NPORT_REDUCTIONTSTATE_LAST, /* Note: Must be last */
/* Please update nvswitch_translate_hw_errors with a newly added error class. */
NVSWITCH_ERR_LAST
/* See enum modification guidelines at the top of this file */
@@ -1829,10 +1857,12 @@ typedef struct
/* NVLink link states */
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_INIT (0x00000000)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_HWPCFG (0x0000000c)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_HWCFG (0x00000001)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_SWCFG (0x00000002)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_ACTIVE (0x00000003)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_FAULT (0x00000004)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_SLEEP (0x00000005)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_RECOVERY (0x00000006)
#define NVSWITCH_NVLINK_STATUS_LINK_STATE_INVALID (0xFFFFFFFF)
@@ -2057,6 +2087,21 @@ typedef struct nvswitch_get_bios_info
NvU64 version;
} NVSWITCH_GET_BIOS_INFO_PARAMS;
#define NVSWITCH_INFOROM_VERSION_LEN 16
/*
* CTRL_NVSWITCH_GET_INFOROM_VERSION
*
* Control call to get INFOROM information.
*
* Parameters:
* version [OUT]
* Inforom version in char value.
*/
typedef struct nvswitch_get_inforom_version
{
NvU8 version[NVSWITCH_INFOROM_VERSION_LEN];
} NVSWITCH_GET_INFOROM_VERSION_PARAMS;
/*
* CTRL_NVSWITCH_BLACKLIST_DEVICE
*
@@ -2166,8 +2211,9 @@ typedef struct nvswitch_set_training_error_info
#define NVSWITCH_DEVICE_EVENT_NONFATAL 1
#define NVSWITCH_DEVICE_EVENT_PORT_UP 2
#define NVSWITCH_DEVICE_EVENT_PORT_DOWN 3
#define NVSWITCH_DEVICE_EVENT_INBAND_DATA 4
#define NVSWITCH_DEVICE_EVENT_COUNT 5
#define NVSWITCH_DEVICE_EVENT_FABRIC_STATE 4
#define NVSWITCH_DEVICE_EVENT_INBAND_DATA 5
#define NVSWITCH_DEVICE_EVENT_COUNT 6
#define NVSWITCH_REGISTER_EVENTS_MAX_EVENT_IDS (500)
/*
@@ -2248,6 +2294,158 @@ typedef struct nvswitch_get_fatal_error_scope_params
NvBool port[NVSWITCH_MAX_PORTS];
} NVSWITCH_GET_FATAL_ERROR_SCOPE_PARAMS;
/*
* CTRL_NVSWITCH_SET_MC_RID_TABLE
*
* Control for programming an ingress multicast RID table entry.
* This interface is only supported on LS10 architecture. All others will
* return an error. Architecture can be queried using _GET_INFO_INDEX_ARCH.
*
* Parameters:
* portNum [IN]
* A valid port number present in the port masks returned by
* NVSWITCH_GET_INFO
* index [IN]
* Index within the multicast RID table to be programmed. This is
* equivalent to MCID.
* extendedTable [IN]
* boolean: Set the requested entry in the extended table
* else set the requested entry in the main table
* ports [IN]
* The list of ports. For each multicast request, the address hash
* selects the multicast port string, and hardware multicasts to ports
* in that string.
* vcHop [IN]
* Array of VC hop values for each port.
* mcSize [IN]
* Number of ports in the multicast group (must be a nonzero value).
* Must be the number of ports in the main table, plus the extended table
* if that is used.
* Must be the same for all spray groups.
* Caller is responsible for ensuring the above conditions, as the driver
* provides only minimal range checking.
* numSprayGroups [IN]
* Number of groups to spray over. This must be a nonzero value.
* portsPerSprayGroup [IN]
* Array, number of ports contained in each spray group.
* Note these must all be the same size unless an extended entry
* is used,
* _and_ numSprayGroups is the same for both the main entry and extended
* entry,
* _and_ the sum of ports in the main and extended groups equals
* mcSize for each spray group.
* FM is responsible for providing the correct value. Driver provides only
* minimal range checking.
* replicaOffset [IN]
* Array, offsets within each spray group to the primary replica port for the group.
* The caller should specify mcSize primaryReplicas.
* replicaValid [IN]
* boolean: Array, set the primary replica according to the replicaOffset array.
* else let hardware choose a default primary replica port
* extendedPtr [IN]
* pointer to the extended table to append to the multicast table entry
* can only be valid in the main table entries
* extendedValid [IN]
* boolean: Use the extended index to append to the main table string.
* else the main string specifies the complete operation for its MCID
* noDynRsp [IN]
* boolean: no dynamic alt selection on MC responses. This field has no meaning in
* the extended table
* entryValid
* boolean: flag this entry in the MC RID table as valid
*/
#define NVSWITCH_MC_MAX_PORTS 64
#define NVSWITCH_MC_MAX_SPRAYGROUPS 16
#define NVSWITCH_MC_VCHOP_PASS 0
#define NVSWITCH_MC_VCHOP_INVERT 1
#define NVSWITCH_MC_VCHOP_FORCE0 2
#define NVSWITCH_MC_VCHOP_FORCE1 3
typedef struct nvswitch_set_mc_rid_table_params
{
NvU32 portNum;
NvU32 index;
NvBool extendedTable;
NvU32 ports[NVSWITCH_MC_MAX_PORTS];
NvU8 vcHop[NVSWITCH_MC_MAX_PORTS];
NvU32 mcSize;
NvU32 numSprayGroups;
NvU32 portsPerSprayGroup[NVSWITCH_MC_MAX_SPRAYGROUPS];
NvU32 replicaOffset[NVSWITCH_MC_MAX_SPRAYGROUPS];
NvBool replicaValid[NVSWITCH_MC_MAX_SPRAYGROUPS];
NvU32 extendedPtr;
NvBool extendedValid;
NvBool noDynRsp;
NvBool entryValid;
} NVSWITCH_SET_MC_RID_TABLE_PARAMS;
/*
* CTRL_NVSWITCH_GET_MC_RID_TABLE
*
* Control for reading an ingress multicast RID table entry.
* This interface is only supported on LS10 architecture. All others will
* return an error. Architecture can be queried using _GET_INFO_INDEX_ARCH.
*
* Parameters:
* portNum [IN]
* A valid port number present in the port masks returned by
* NVSWITCH_GET_INFO
* index [IN]
* Index within the multicast RID table to be retrieved. This is
* equivalent to MCID.
* extendedTable [IN]
* boolean: Get the requested entry from the extended table.
* Else get the requested entry from the main table.
* ports [OUT]
* The list of ports. Port order within spray groups is not guaranteed
* to be preserved.
* vcHop [OUT]
* Array containing VC hop values for each entry in the ports array.
* mcSize [OUT]
* Number of ports in the multicast group.
* numSprayGroups [OUT]
* Number of groups to spray over.
* portsPerSprayGroup [OUT]
* Array, each element contains the number of ports within each corresponding
* spray group.
* replicaOffset [OUT]
* Array, offsets within each spray group to the primary replica port
* for the group.
* replicaValid [OUT]
* boolean: Array, specifies whether each entry in the replicaOffset
* array is valid.
* extendedPtr [OUT]
* Pointer to the extended table appended to the main table entry.
* Only valid for main table entries.
* extendedValid [OUT]
* boolean: Whether the extendedPtr is valid.
* noDynRsp [IN]
* boolean: no dynamic alt selection on MC responses.
* This field has no meaning in the extended table.
* entryValid
* boolean: Whether this entry in the MC RID table is valid
*/
typedef struct nvswitch_get_mc_rid_table_params
{
NvU32 portNum;
NvU32 index;
NvBool extendedTable;
NvU32 ports[NVSWITCH_MC_MAX_PORTS];
NvU8 vcHop[NVSWITCH_MC_MAX_PORTS];
NvU32 mcSize;
NvU32 numSprayGroups;
NvU32 portsPerSprayGroup[NVSWITCH_MC_MAX_SPRAYGROUPS];
NvU32 replicaOffset[NVSWITCH_MC_MAX_SPRAYGROUPS];
NvBool replicaValid[NVSWITCH_MC_MAX_SPRAYGROUPS];
NvU32 extendedPtr;
NvBool extendedValid;
NvBool noDynRsp;
NvBool entryValid;
} NVSWITCH_GET_MC_RID_TABLE_PARAMS;
#define NVSWITCH_I2C_SMBUS_CMD_QUICK 0
#define NVSWITCH_I2C_SMBUS_CMD_BYTE 1
#define NVSWITCH_I2C_SMBUS_CMD_BYTE_DATA 2
@@ -2875,7 +3073,7 @@ typedef struct nvswitch_get_rd_stall_busy
typedef struct nvswitch_get_multicast_id_error_vector
{
NvU32 link;
NvU32 error_vector[NVSWITCH_MC_ID_ERROR_VECTOR_COUNT / sizeof(NvU32)];
NvU32 error_vector[NVSWITCH_MC_ID_ERROR_VECTOR_COUNT / 32];
} NVSWITCH_GET_MULTICAST_ID_ERROR_VECTOR;
/*
@@ -2894,9 +3092,104 @@ typedef struct nvswitch_get_multicast_id_error_vector
typedef struct nvswitch_clear_multicast_id_error_vector
{
NvU32 link;
NvU32 error_vector[NVSWITCH_MC_ID_ERROR_VECTOR_COUNT / sizeof(NvU32)];
NvU32 error_vector[NVSWITCH_MC_ID_ERROR_VECTOR_COUNT / 32];
} NVSWITCH_CLEAR_MULTICAST_ID_ERROR_VECTOR;
/*
* NVSWITCH_NVLINK_ERR_INFO
* Error information per link
*
* Parameters:
* TLErrlog
* Returns the error mask for NVLINK TL errors
* Used in Pascal
*
* TLIntrEn
* Returns the intr enable mask for NVLINK TL errors
* Used in Pascal
*
* TLCTxErrStatus0
* Returns the TLC Tx Error Mask 0
* Used in Volta
*
* TLCRxErrStatus0
* Returns the TLC Rx Error Mask 0
* Used in Volta
*
* TLCRxErrStatus1
* Returns the TLC Rx Error Mask 1
* Used in Volta
*
* TLCTxErrLogEn0
* Returns the TLC Tx Error Log En 0
* Used in Volta
*
* TLCRxErrLogEn0
* Returns the TLC Rx Error Log En 0
* Used in Volta
*
* TLCRxErrLogEn1
* Returns the TLC Rx Error Log En 1
* Used in Volta
*
* MIFTxErrStatus0
* Returns the MIF Rx Error Mask 0
* Used in Volta
*
* MIFRxErrStatus0
* Returns the MIF Tx Error Mask 0
* Used in Volta
*
* DLSpeedStatusTx
* Returns the NVLINK DL speed status for sublink Tx
*
* DLSpeedStatusRx
* Returns the NVLINK DL speed status for sublink Rx
*
* bExcessErrorDL
* Returns true for excessive error rate interrupt from DL
*/
typedef struct
{
NvU32 TLErrlog;
NvU32 TLIntrEn;
NvU32 TLCTxErrStatus0;
NvU32 TLCRxErrStatus0;
NvU32 TLCRxErrStatus1;
NvU32 TLCTxErrLogEn0;
NvU32 TLCRxErrLogEn0;
NvU32 TLCRxErrLogEn1;
NvU32 MIFTxErrStatus0;
NvU32 MIFRxErrStatus0;
NvU32 DLSpeedStatusTx;
NvU32 DLSpeedStatusRx;
NvBool bExcessErrorDL;
} NVSWITCH_NVLINK_ERR_INFO;
/*
* CTRL_NVSWITCH_GET_ERR_INFO
* This command is used to query the NVLINK error information
*
* Possible status values returned are:
* NV_OK
* NV_ERR_NOT_SUPPORTED
*/
/*
* NVSWITCH_NVLINK_GET_ERR_INFO_PARAMS
*
* linkMask
* Returns the mask of links enabled
*
* linkErrInfo
* Returns the error information for all the links
*/
typedef struct
{
NV_DECLARE_ALIGNED(NvU64 linkMask, 8);
NVSWITCH_NVLINK_ERR_INFO linkErrInfo[NVSWITCH_NVLINK_MAX_LINKS];
} NVSWITCH_NVLINK_GET_ERR_INFO_PARAMS;
#define NVSWITCH_INBAND_DATA_SIZE 4096
/*
@@ -3006,6 +3299,29 @@ typedef struct nvswitch_get_sw_info_params
NvU32 info[NVSWITCH_GET_SW_INFO_COUNT_MAX];
} NVSWITCH_GET_SW_INFO_PARAMS;
/*
* CTRL_NVSWITCH_CLEAR_COUNTERS
* This command clears/resets the counters for the specified types.
*
* [in] linkMask
* This parameter specifies for which links we want to clear the
* counters.
*
* [in] counterMask
* This parameter specifies the input mask for desired counters to be
* cleared. Note that all counters cannot be cleared.
*
* NOTE: Bug# 2098529: On Turing all DL errors and LP counters are cleared
* together. They cannot be cleared individually per error type. RM
* would possibly move to a new API on Ampere and beyond
*/
typedef struct
{
NV_DECLARE_ALIGNED(NvU64 linkMask, 8);
NvU32 counterMask;
} NVSWITCH_NVLINK_CLEAR_COUNTERS_PARAMS;
/*
* NVSWITCH_CTRL_I2C_DEVICE_INFO
*
@@ -3246,6 +3562,88 @@ typedef struct
NvU8 message[NVSWITCH_CTRL_I2C_MESSAGE_LENGTH_MAX];
} NVSWITCH_CTRL_I2C_INDEXED_PARAMS;
/*
* Structure to store register values required to debug ALI training failures
*
* dlstatMn00
* DLSTAT MN00 register value (subcode and code)
* dlstatUc01
* DLSTAT UC01 register value
* dlstatLinkIntr
* NV_MINION_NVLINK_LINK_INTR (subcode, code and state)
*/
typedef struct nvswitch_minion_ali_debug_registers
{
NvU32 dlstatMn00;
NvU32 dlstatUc01;
NvU32 dlstatLinkIntr;
} NVSWITCH_MINION_ALI_DEBUG_REGISTERS;
/*
* CTRL_NVSWITCH_REGISTER_READ/WRITE
*
* This provides direct access to the MMIO space.
*/
typedef struct
{
NvU32 engine; // REGISTER_RW_ENGINE_*
NvU32 instance; // engine instance
NvU32 offset; // Register offset within device/instance
NvU32 val; // out: register value read
} NVSWITCH_REGISTER_READ;
typedef struct
{
NvU32 engine; // REGISTER_RW_ENGINE_*
NvU32 instance; // engine instance
NvBool bcast; // Unicast or broadcast
NvU32 offset; // Register offset within engine/instance
NvU32 val; // in: register value to write
} NVSWITCH_REGISTER_WRITE;
#define REGISTER_RW_ENGINE_RAW 0x00
#define REGISTER_RW_ENGINE_CLKS 0x10
#define REGISTER_RW_ENGINE_FUSE 0x11
#define REGISTER_RW_ENGINE_JTAG 0x12
#define REGISTER_RW_ENGINE_PMGR 0x13
#define REGISTER_RW_ENGINE_SAW 0x14
#define REGISTER_RW_ENGINE_XP3G 0x15
#define REGISTER_RW_ENGINE_XVE 0x16
#define REGISTER_RW_ENGINE_SOE 0x17
#define REGISTER_RW_ENGINE_SMR 0x18
#define REGISTER_RW_ENGINE_SE 0x19
#define REGISTER_RW_ENGINE_CLKS_SYS 0x1A
#define REGISTER_RW_ENGINE_CLKS_SYSB 0x1B
#define REGISTER_RW_ENGINE_CLKS_P0 0x1C
#define REGISTER_RW_ENGINE_XPL 0x1D
#define REGISTER_RW_ENGINE_XTL 0x1E
#define REGISTER_RW_ENGINE_SIOCTRL 0x20
#define REGISTER_RW_ENGINE_MINION 0x21
#define REGISTER_RW_ENGINE_NVLIPT 0x22
#define REGISTER_RW_ENGINE_NVLTLC 0x23
#define REGISTER_RW_ENGINE_NVLTLC_MULTICAST 0x24
#define REGISTER_RW_ENGINE_DLPL 0x25
#define REGISTER_RW_ENGINE_NVLW 0x26
#define REGISTER_RW_ENGINE_NVLIPT_LNK 0x27
#define REGISTER_RW_ENGINE_NVLIPT_LNK_MULTICAST 0x28
#define REGISTER_RW_ENGINE_NVLDL 0x29
#define REGISTER_RW_ENGINE_NVLDL_MULTICAST 0x2a
#define REGISTER_RW_ENGINE_PLL 0x2b
#define REGISTER_RW_ENGINE_NPG 0x30
#define REGISTER_RW_ENGINE_NPORT 0x31
#define REGISTER_RW_ENGINE_NPORT_MULTICAST 0x32
#define REGISTER_RW_ENGINE_SWX 0x40
#define REGISTER_RW_ENGINE_AFS 0x41
#define REGISTER_RW_ENGINE_NXBAR 0x42
#define REGISTER_RW_ENGINE_TILE 0x43
#define REGISTER_RW_ENGINE_TILE_MULTICAST 0x44
#define REGISTER_RW_ENGINE_TILEOUT 0x45
#define REGISTER_RW_ENGINE_TILEOUT_MULTICAST 0x46
/*
* CTRL call command list.
@@ -3294,6 +3692,8 @@ typedef struct
#define CTRL_NVSWITCH_UNREGISTER_EVENTS 0x25
#define CTRL_NVSWITCH_SET_TRAINING_ERROR_INFO 0x26
#define CTRL_NVSWITCH_GET_FATAL_ERROR_SCOPE 0x27
#define CTRL_NVSWITCH_SET_MC_RID_TABLE 0x28
#define CTRL_NVSWITCH_GET_MC_RID_TABLE 0x29
#define CTRL_NVSWITCH_GET_COUNTERS 0x2A
#define CTRL_NVSWITCH_GET_NVLINK_ECC_ERRORS 0x2B
#define CTRL_NVSWITCH_I2C_SMBUS_COMMAND 0x2C
@@ -3322,10 +3722,14 @@ typedef struct
#define CTRL_NVSWITCH_GET_SW_INFO 0x47
#define CTRL_NVSWITCH_RESERVED_6 0x48
#define CTRL_NVSWITCH_RESERVED_7 0x49
/*
* DO NOT ADD CODE AFTER THIS LINE.
* If the command hits 0xA0, see ctrl_dev_internal_nvswitch.h to adjust the internal range.
*/
#define CTRL_NVSWITCH_RESERVED_8 0x4A
#define CTRL_NVSWITCH_RESERVED_9 0x4B
#define CTRL_NVSWITCH_RESERVED_10 0x4C
#define CTRL_NVSWITCH_REGISTER_READ 0x4D
#define CTRL_NVSWITCH_REGISTER_WRITE 0x4E
#define CTRL_NVSWITCH_GET_INFOROM_VERSION 0x4F
#define CTRL_NVSWITCH_GET_ERR_INFO 0x50
#define CTRL_NVSWITCH_CLEAR_COUNTERS 0x51
#ifdef __cplusplus
}

6
src/common/nvswitch/interface/export_nvswitch.h
View File

@@ -642,6 +642,12 @@ nvswitch_os_get_platform_time
void
);
NvU64
nvswitch_os_get_platform_time_epoch
(
void
);
#define NVSWITCH_PRINT_ATTRIB(str, arg1) \
__attribute__ ((format (printf, (str), (arg1))))