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This commit is contained in:
Andy Ritger
2022-11-10 08:39:33 -08:00
parent 7c345b838b
commit 758b4ee818
1323 changed files with 262135 additions and 60754 deletions
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52
src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dfp.h
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@@ -1137,6 +1137,10 @@ typedef struct NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS {
* Major version number of DSC decoder on Panel.
* dscDecoderVersionMinor
* Minor version number of DSC decoder on Panel.
* dscUseCustomPPS
* Flag to indicate if Panel uses custom PPS values which deviate from standard values.
* dscCustomPPSData
* 32 bytes of custom PPS data required by Panel.
* dscEncoderCaps
* Capabilities of DSC encoder in SoC.
*
@@ -1148,31 +1152,35 @@ typedef struct NV0073_CTRL_CMD_DFP_GET_DISP_MUX_STATUS_PARAMS {
#define NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING (0x731166U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DFP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS_MESSAGE_ID" */
#define NV0073_CTRL_CMD_DFP_DSI_CUSTOM_PPS_DATA_COUNT 32U
#define NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS_MESSAGE_ID (0x66U)
typedef struct NV0073_CTRL_CMD_DFP_GET_DSI_MODE_TIMING_PARAMS {
NvU32 subDeviceInstance;
NvU32 displayId;
NvU32 hActive;
NvU32 vActive;
NvU32 hFrontPorch;
NvU32 vFrontPorch;
NvU32 hBackPorch;
NvU32 vBackPorch;
NvU32 hSyncWidth;
NvU32 vSyncWidth;
NvU32 bpp;
NvU32 refresh;
NvU32 pclkHz;
NvU32 numLanes;
NvU32 dscEnable;
NvU32 dscBpp;
NvU32 dscNumSlices;
NvU32 dscDualDsc;
NvU32 dscSliceHeight;
NvU32 dscBlockPrediction;
NvU32 dscDecoderVersionMajor;
NvU32 dscDecoderVersionMinor;
NvU32 subDeviceInstance;
NvU32 displayId;
NvU32 hActive;
NvU32 vActive;
NvU32 hFrontPorch;
NvU32 vFrontPorch;
NvU32 hBackPorch;
NvU32 vBackPorch;
NvU32 hSyncWidth;
NvU32 vSyncWidth;
NvU32 bpp;
NvU32 refresh;
NvU32 pclkHz;
NvU32 numLanes;
NvU32 dscEnable;
NvU32 dscBpp;
NvU32 dscNumSlices;
NvU32 dscDualDsc;
NvU32 dscSliceHeight;
NvU32 dscBlockPrediction;
NvU32 dscDecoderVersionMajor;
NvU32 dscDecoderVersionMinor;
NvBool dscUseCustomPPS;
NvU32 dscCustomPPSData[NV0073_CTRL_CMD_DFP_DSI_CUSTOM_PPS_DATA_COUNT];
struct {
NvBool bDscSupported;

22
src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073dp.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2005-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2005-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -1738,8 +1738,8 @@ typedef struct NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS {
* should be set to zero for default behavior.
* sorIndex
* Specifies the SOR index.
* bIsDp12Supported
* Returns NV_TRUE if DP1.2 is supported by the GPU else NV_FALSE
* dpVersionsSupported
* Specified the DP versions supported by the GPU
* bIsMultistreamSupported
* Returns NV_TRUE if MST is supported by the GPU else NV_FALSE
* bIsSCEnabled
@@ -1788,6 +1788,7 @@ typedef struct NV0073_CTRL_CMD_DP_SEND_ACT_PARAMS {
* NV_ERR_NOT_SUPPORTED
*
*/
#define NV0073_CTRL_CMD_DP_GET_CAPS (0x731369U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_DP_INTERFACE_ID << 8) | NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS_MESSAGE_ID" */
#define NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS_MESSAGE_ID (0x69U)
@@ -1796,8 +1797,7 @@ typedef struct NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS {
NvU32 subDeviceInstance;
NvU32 sorIndex;
NvU32 maxLinkRate;
NvBool bIsDp12Supported;
NvBool bIsDp14Supported;
NvU32 dpVersionsSupported;
NvBool bIsMultistreamSupported;
NvBool bIsSCEnabled;
NvBool bHasIncreasedWatermarkLimits;
@@ -1818,6 +1818,15 @@ typedef struct NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS {
} DSC;
} NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS;
#define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2 0:0
#define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_NO (0x00000000U)
#define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_2_YES (0x00000001U)
#define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4 1:1
#define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_NO (0x00000000U)
#define NV0073_CTRL_CMD_DP_GET_CAPS_DP_VERSIONS_SUPPORTED_DP1_4_YES (0x00000001U)
#define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE 2:0
#define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_NONE (0x00000000U)
#define NV0073_CTRL_CMD_DP_GET_CAPS_MAX_LINK_RATE_1_62 (0x00000001U)
@@ -2705,7 +2714,7 @@ typedef struct NV0073_CTRL_CMD_DP_AUXCH_OD_CTRL_PARAMS {
#define NV0073_CTRL_CMD_DP_AUXCH_OD_CTL_SET_ENABLE_OD 0x00000003
/*
* NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2
* NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES
*
* This command returns the following info
*
@@ -2755,5 +2764,4 @@ typedef struct NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS {
NvBool bDebugValues;
NV0073_CTRL_DP_MSA_PROPERTIES_VALUES featureDebugValues;
} NV0073_CTRL_CMD_DP_SET_MSA_PROPERTIES_V2_PARAMS;
/* _ctrl0073dp_h_ */

74
src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073specific.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -574,7 +574,48 @@ typedef struct NV0073_CTRL_SPECIFIC_ACPI_ID_MAPPING {
NvU32 dodIndex;
} NV0073_CTRL_SPECIFIC_ACPI_ID_MAPPING;
/*
* NV0073_CTRL_CMD_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT
*
* This call will return the Display Port Attachment value
* per displayID as defined by Nvidia that is directly
* associated with the ACPI 3.0 _DOD entry's Display Port
* Attachment field. This should help clients map the
* _DOD ACPI ID to each displayID. Note, that some systems
* do not have a standard in place for this field. On those
* systems, the RM will return NV_ERR_NOT_SUPPORTED.
*
* Note that this "Display Port" attachment field has nothing
* to do with DisplayPort/DP. It's an unfortunate name inside
* the ACPI 3.0 spec that coincides with the name of DisplayPort.
*
*
* Possible status values returned are:
* NV_OK
* NV_ERR_INVALID_PARAM_STRUCT
* NV_ERR_NOT_SUPPORTED
*
*/
#define NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS_MESSAGE_ID (0x85U)
typedef struct NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS {
NvU32 subDeviceInstance;
NvU32 displayId;
NvU32 dispPortAttachment;
} NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS;
#define NV0073_CTRL_CMD_SPECIFIC_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT (0x730285U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SPECIFIC_INTERFACE_ID << 8) | NV0073_CTRL_GET_ACPI_DOD_DISPLAY_PORT_ATTACHMENT_PARAMS_MESSAGE_ID" */
// defines for dispPortAttachment
#define NV0073_DISPLAY_PORT_ATTACHMENT_ANALOG (0x00000000U)
#define NV0073_DISPLAY_PORT_ATTACHMENT_LVDS (0x00000001U)
#define NV0073_DISPLAY_PORT_ATTACHMENT_DP_A (0x00000002U)
#define NV0073_DISPLAY_PORT_ATTACHMENT_DP_B (0x00000003U)
#define NV0073_DISPLAY_PORT_ATTACHMENT_DP_C (0x00000004U)
#define NV0073_DISPLAY_PORT_ATTACHMENT_DP_D (0x00000005U)
#define NV0073_DISPLAY_PORT_ATTACHMENT_UNKNOWN (0xFFFFFFFFU)
/*
* NV0073_CTRL_CMD_SPECIFIC_SET_ACPI_ID_MAPPING
@@ -1835,7 +1876,34 @@ typedef struct NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS {
NvU8 writeBuffer[NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_BUF_LEN];
} NV0073_CTRL_SPECIFIC_DISP_I2C_READ_WRITE_PARAMS;
#define NV0073_CTRL_SPECIFIC_DISP_I2C_READ_MODE (0x00000001)
#define NV0073_CTRL_SPECIFIC_DISP_I2C_WRITE_MODE (0x00000000)
#define NV0073_CTRL_SPECIFIC_DISP_I2C_READ_MODE (0x00000001)
#define NV0073_CTRL_SPECIFIC_DISP_I2C_WRITE_MODE (0x00000000)
/*
* NV0073_CTRL_CMD_GET_VALID_HEAD_WINDOW_ASSIGNMENT
*
* This command returns the valid window head assignment mask
*
* windowHeadMask [out]
* This out parameter is an array which holds the head mask for
* each window. The Nth element in the array would be a bitmask
* of which heads can possibly drive window N.
*
* Possible status values returned are:
* NV_OK
* NV_ERR_INVALID_ARGUMENT
* NV_ERR_GENERIC
*/
#define NV0073_CTRL_CMD_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT (0x7302ad) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SPECIFIC_INTERFACE_ID << 8) | NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS_MESSAGE_ID" */
#define NV0073_CTRL_SPECIFIC_MAX_WINDOWS 32U
#define NV0073_CTRL_SPECIFIC_FLEXIBLE_HEAD_WINDOW_ASSIGNMENT (0xFFU)
#define NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS_MESSAGE_ID (0xADU)
typedef struct NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS {
NvU32 subDeviceInstance;
NvU8 windowHeadMask[NV0073_CTRL_SPECIFIC_MAX_WINDOWS];
} NV0073_CTRL_SPECIFIC_GET_VALID_HEAD_WINDOW_ASSIGNMENT_PARAMS;
/* _ctrl0073specific_h_ */

408
src/common/sdk/nvidia/inc/ctrl/ctrl0073/ctrl0073system.h
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@@ -603,6 +603,122 @@ typedef struct NV0073_CTRL_SYSTEM_GET_ACTIVE_PARAMS {
/*
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP
*
* This structure defines the mapping between the RM's displayId and the
* defined ACPI IDs for each display.
* displayId
* This parameter is a handle to a single display output path from the
* GPU pins to the display connector. Each display ID is defined by one bit.
* A zero in this parameter indicates a skip entry.
* acpiId
* This parameter defines the corresponding ACPI ID of the displayId.
* flags
* This parameter specifies optional flags that describe the association
* between the display ID and the ACPI ID.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN
* This field describes where the ACPI was found.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN_RM
* The ACPI ID was generated by RM code.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN_DOD
* The ACPI ID was found via the ACPI _DOD call.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN_CLIENT
* The ACPI ID was generated by RM Client and sent to RM. Note this
* must be set on a NV0073_CTRL_CMD_SYSTEM_SET_ACPI_ID_MAP call.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_UNDOCKED
* This flag explains that the ACPI ID is only valid when the system
* is undocked. If this flag is not set, the ACPI ID is valid always.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_DOCKED
* This flag explains that the ACPI ID is only valid when the system
* is docked. If this flag is not set, the ACPI ID is valid always.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_BIOS_DETECT
* This flag is set only if the _DOD returns that the device can be
* detected by the system BIOS. This flag is copied directly from
* the ACPI spec.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_NON_VGA_OUTPUT
* This flag is set only if the _DOD returns that the device is
* a non-VGA device whose power is related to the VGA device.
* i.e. TV tuner, DVD decoder, Video capture. This flag is copied
* directly from the ACPI spec.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_MULTIHEAD_ID
* This value is set only if the _DOD returns it. The number
* indicates the head output of a multi-head device. This has no
* relation to the term, Head, currently used in the RM today.
* This is strictly a copy of the value directly from the ACPI spec.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_SCHEME
* This flag is set only if the _DOD returns that the acpiID follows
* the ACPI 3.0 spec. This flag is copied directly from
* the ACPI spec.
*
*/
typedef struct NV0073_CTRL_SYSTEM_ACPI_ID_MAP_PARAMS {
NvU32 displayId;
NvU32 acpiId;
NvU32 flags;
} NV0073_CTRL_SYSTEM_ACPI_ID_MAP_PARAMS;
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN 1:0
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN_RM 0x00000000U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN_DOD 0x00000001U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_ORIGIN_CLIENT 0x00000002U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_UNDOCKED 2:2
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_UNDOCKED_FALSE 0x00000000U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_UNDOCKED_TRUE 0x00000001U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_DOCKED 3:3
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_DOCKED_FALSE 0x00000000U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_SNAG_DOCKED_TRUE 0x00000001U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_BIOS_DETECT 16:16
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_BIOS_DETECT_FALSE 0x00000000U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_BIOS_DETECT_TRUE 0x00000001U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_NON_VGA_OUTPUT 17:17
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_NON_VGA_OUTPUT_FALSE 0x00000000U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_NON_VGA_OUTPUT_TRUE 0x00000001U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_MULTIHEAD_ID 20:18
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_SCHEME 31:31
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_SCHEME_VENDOR 0x00000000U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_DOD_SCHEME_30 0x00000001U
#define NV0073_CTRL_SYSTEM_ACPI_ID_MAP_MAX_DISPLAYS (16U)
/*
* NV0073_CTRL_CMD_SYSTEM_GET_ACPI_ID_MAP
*
* This command retrieves the mapping between the RM's displayId and the
* defined ACPI IDs for each display.
*
* subDeviceInstance
* This parameter specifies the subdevice instance within the
* NV04_DISPLAY_COMMON parent device to which the operation should be
* directed. This parameter must specify a value between zero and
* the total number of subdevices within the parent device. It should
* be set to zero for default behavior.
* NV0073_CTRL_SYSTEM_ACPI_ID_MAP_PARAMS
* An array of display ID to ACPI ids with flags for each description.
*
* Possible status values returned are:
* NV_OK
* NV_ERR_INVALID_ARGUMENT
* Only returned if subdeviceInstance was not valid.
*/
#define NV0073_CTRL_CMD_SYSTEM_GET_ACPI_ID_MAP (0x73015aU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID" */
#define NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS_MESSAGE_ID (0x5AU)
typedef struct NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS {
NvU32 subDeviceInstance;
NV0073_CTRL_SYSTEM_ACPI_ID_MAP_PARAMS acpiIdMap[NV0073_CTRL_SYSTEM_ACPI_ID_MAP_MAX_DISPLAYS];
} NV0073_CTRL_SYSTEM_GET_ACPI_ID_MAP_PARAMS;
/*
* NV0073_CTRL_CMD_SYSTEM_GET_INTERNAL_DISPLAYS
*
@@ -670,6 +786,265 @@ typedef struct NV0073_CTRL_SYSTEM_GET_BOOT_DISPLAYS_PARAMS {
/*
* NV0073_CTRL_CMD_SYSTEM_EXECUTE_ACPI_METHOD
*
* This command is used to execute general MXM ACPI methods.
*
* method
* This parameter identifies the MXM ACPI API to be invoked.
* Valid values for this parameter are:
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXMI
* This value specifies that the MXMI API is to invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXMS
* This value specifies that the MXMS API is to invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXMX
* This value specifies that the MXMX API is to invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_GPUON
* This value specifies that the Hybrid GPU ON API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_GPUOFF
* This value specifies that the Hybrid GPU OFF API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_GPUSTA
* This value specifies that the Hybrid GPU STA API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXDS
* This value specifies that the Hybrid GPU MXDS API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NVHG_MXMX
* This value specifies that the Hybrid GPU MXMX API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DOS
* This value specifies that the Hybrid GPU DOS API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_ROM
* This value specifies that the Hybrid GPU ROM API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DOD
* This value specifies that the Hybrid GPU DOD API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_SUPPORT
* This value specifies that the Hybrid GPU DSM subfunction SUPPORT
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HYBRIDCAPS
* This value specifies that the Hybrid GPU DSM subfunction SUPPORT
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_POLICYSELECT
* This value specifies that the Hybrid GPU DSM subfunction POLICYSELECT
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_POWERCONTROL
* This value specifies that the Hybrid GPU DSM subfunction POWERCONTROL
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_PLATPOLICY
* This value specifies that the Hybrid GPU DSM subfunction PLATPOLICY
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_DISPLAYSTATUS
* This value specifies that the Hybrid GPU DSM subfunction DISPLAYSTATUS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MDTL
* This value specifies that the Hybrid GPU DSM subfunction MDTL
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCSMBLIST
* This value specifies that the Hybrid GPU DSM subfunction HCSMBLIST
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCSMBADDR
* This value specifies that the Hybrid GPU DSM subfunction HCSMBADDR
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCREADBYTE
* This value specifies that the Hybrid GPU DSM subfunction HCREADBYTE
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCSENDBYTE
* This value specifies that the Hybrid GPU DSM subfunction HCSENDBYTES
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCGETSTATUS
* This value specifies that the Hybrid GPU DSM subfunction HCGETSTATUS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCTRIGDDC
* This value specifies that the Hybrid GPU DSM subfunction HCTRIGDDC
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCGETDDC
* This value specifies that the Hybrid GPU DSM subfunction HCGETDDC
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DCS
* This value specifies that the Hybrid GPU DCS API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXSS
* This value specifies that the DSM MXM subfunction MXSS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXMI
* This value specifies that the DSM MXM subfunction MXMI
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXMS
* This value specifies that the DSM MXM subfunction MXMS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXPP
* This value specifies that the DSM MXM subfunction MXPP
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXDP
* This value specifies that the DSM MXM subfunction MXDP
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MDTL
* This value specifies that the DSM MXM subfunction MDTL
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXCB
* This value specifies that the DSM MXM subfunction MXCB
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_CTL_REMAPFUNC
* This value specifies the DSM generic remapping should return function
* and subfunction when this API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_HYBRIDCAPS
* This value specifies that the generic DSM subfunction HYBRIDCAPS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_POLICYSELECT
* This value specifies that the generic DSM subfunction POLICYSELECT
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_PLATPOLICY
* This value specifies that the generic DSM subfunction PLATPOLICY
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_DISPLAYSTATUS
* This value specifies that the generic DSM subfunction DISPLAYSTATUS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_MDTL
* This value specifies that the generic DSM subfunction MDTL
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETOBJBYTYPE
* This value specifies that the generic DSM subfunction GETOBJBYTYPE
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETALLOBJS
* This value specifies that the generic DSM subfunction GETALLOBJS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETEVENTLIST
* This value specifies that the generic DSM subfunction GETEVENTLIST
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETBACKLIGHT
* This value specifies that the generic DSM subfunction GETBACKLIGHT
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_CTL_TESTSUBFUNCENABLED
* This value specifies the testIfDsmSubFunctionEnabled test should
* be done for the func/subfunction when this API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_CTL_GETSUPPORTEDFUNC
* This value specifies the list of supported generic dsm functions
* should be returned.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NVOP_OPTIMUSCAPS
* This value specifies that the DSM NVOP subfunction OPTIMUSCAPS
* API is to be invoked.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NVOP_OPTIMUSFLAG
* This value specifies that the DSM NVOP subfunction OPTIMUSFLAG
* API is to be invoked. This API will set a Flag in sbios to Indicate
* that HD Audio Controller is disable/Enabled from GPU Config space.
* This flag will be used by sbios to restore Audio state after resuming
* from s3/s4.
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_WMMX_NVOP_GPUON
* This value specifies that the WMMX (WMI-ACPI) GPON methods has to be invoked
* this call should happen below DPC level from any client.
* inData
* This parameter specifies the method-specific input buffer. Data is
* passed to the specified API using this buffer. For display related
* APIs the associated display mask can be found at a byte offset within
* the inData buffer using the following method-specific values:
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXMX_DISP_MASK_OFFSET
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXDS_DISP_MASK_OFFSET
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NVHG_MXMX_DISP_MASK_OFFSET
* NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DOS_DISP_MASK_OFFSET
* inDataSize
* This parameter specifies the size of the inData buffer in bytes.
* outStatus
* This parameter returns the status code from the associated ACPI call.
* outData
* This parameter specifies the method-specific output buffer. Data
* is returned by the specified API using this buffer.
* outDataSize
* This parameter specifies the size of the outData buffer in bytes.
*
* Possible status values returned are:
* NV_OK
* NV_ERR_INVALID_PARAM_STRUCT
* NV_ERR_INVALID_ARGUMENT
*/
#define NV0073_CTRL_CMD_SYSTEM_EXECUTE_ACPI_METHOD (0x730168U) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID" */
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS_MESSAGE_ID (0x68U)
typedef struct NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS {
NvU32 method;
NV_DECLARE_ALIGNED(NvP64 inData, 8);
NvU16 inDataSize;
NvU32 outStatus;
NV_DECLARE_ALIGNED(NvP64 outData, 8);
NvU16 outDataSize;
} NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_PARAMS;
/* valid method parameter values */
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXMX (0x00000002U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXMX_DISP_MASK_OFFSET (0x00000001U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_GPUON (0x00000003U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_GPUOFF (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_GPUSTA (0x00000005U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXDS (0x00000006U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NVHG_MXMX (0x00000007U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DOS (0x00000008U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_ROM (0x00000009U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DOD (0x0000000aU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_SUPPORT (0x0000000bU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HYBRIDCAPS (0x0000000cU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_POLICYSELECT (0x0000000dU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_POWERCONTROL (0x0000000eU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_PLATPOLICY (0x0000000fU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_DISPLAYSTATUS (0x00000010U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MDTL (0x00000011U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCSMBLIST (0x00000012U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCSMBADDR (0x00000013U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCREADBYTE (0x00000014U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCSENDBYTE (0x00000015U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCGETSTATUS (0x00000016U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCTRIGDDC (0x00000017U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_HCGETDDC (0x00000018U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DCS (0x00000019U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXSS (0x0000001aU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXMI (0x0000001bU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXMS (0x0000001cU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXPP (0x0000001dU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXDP (0x0000001eU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MDTL (0x0000001fU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_MXCB (0x00000020U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_MXM_GETEVENTLIST (0x00000021U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GETMEMTABLE (0x00000022U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GETMEMCFG (0x00000023U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GETOBJBYTYPE (0x00000024U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GETALLOBJS (0x00000025U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_CTL_REMAPFUNC (0x00000026U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_DISPLAYSTATUS (0x0000002aU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_MDTL (0x0000002bU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETOBJBYTYPE (0x0000002cU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETALLOBJS (0x0000002dU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETEVENTLIST (0x0000002eU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETBACKLIGHT (0x0000002fU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_CTL_TESTSUBFUNCENABLED (0x00000030U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_CTL_GETSUPPORTEDFUNC (0x00000031U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NVOP_OPTIMUSCAPS (0x00000032U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_WMMX_NVOP_GPUON (0x00000033U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NVOP_OPTIMUSFLAG (0x00000034U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_GETCALLBACKS (0x00000036U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NBCI_SUPPORTFUNCS (0x00000037U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NBCI_PLATCAPS (0x00000038U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NBCI_PLATPOLICY (0x00000039U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_GENERIC_MSTL (0x0000003aU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DSM_NVGPS_FUNC_SUPPORT (0x0000003bU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_MXDS (0x0000003cU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_MXDM (0x0000003dU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_MXID (0x0000003eU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_LRST (0x0000003fU)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DDC_EDID (0x00000040U)
/* valid input buffer offset values */
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_MXDS_DISP_MASK_OFFSET (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NVHG_MXMX_DISP_MASK_OFFSET (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DOS_DISP_MASK_OFFSET (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_MXDS_DISP_MASK_OFFSET (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_MXDM_DISP_MASK_OFFSET (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_MXID_DISP_MASK_OFFSET (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_NBCI_LRST_DISP_MASK_OFFSET (0x00000004U)
#define NV0073_CTRL_SYSTEM_EXECUTE_ACPI_METHOD_DDC_EDID_DISP_MASK_OFFSET (0x00000004U)
/*
* NV0073_CTRL_CMD_SYSTEM_GET_HOTPLUG_UNPLUG_STATE
*
@@ -1068,5 +1443,38 @@ typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS {
NvBool bIsSidebandI2cSupported;
} NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_I2C_SUPPORT_PARAMS;
/*
* NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT
*
* This command is used to query if SIDEBAND SR can be used with the
* given display device. If PSR API is supported on the system,
* then sideband SR support is set to false.
*
* subDeviceInstance (in)
* This parameter specifies the subdevice instance within the
* NV04_DISPLAY_COMMON parent device to which the operation
* should be directed.
* displayId (in)
* This parameter inputs the displayId of the active display. A value
* of zero indicates no display is active.
* bIsSidebandSrSupported
* If it is true, it means that sideband is supported and not PSR API.
*
* Possible status values returned are:
* NV_OK
* NV_ERR_INVALID_PARAM_STRUCT
* NV_ERR_INVALID_ARGUMENT
* NV_ERR_NOT_SUPPORTED
*/
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT (0x73019dU) /* finn: Evaluated from "(FINN_NV04_DISPLAY_COMMON_SYSTEM_INTERFACE_ID << 8) | NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID" */
#define NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS_MESSAGE_ID (0x9DU)
typedef struct NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS {
NvU32 subDeviceInstance;
NvU32 displayId;
NvBool bIsSidebandSrSupported;
} NV0073_CTRL_CMD_SYSTEM_CHECK_SIDEBAND_SR_SUPPORT_PARAMS;
/* _ctrl0073system_h_ */