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This commit is contained in:
Andy Ritger
2022-11-10 08:39:33 -08:00
parent 7c345b838b
commit 758b4ee818
1323 changed files with 262135 additions and 60754 deletions
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42
src/nvidia/inc/kernel/rmapi/control.h
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@@ -34,6 +34,18 @@
struct NVOC_EXPORTED_METHOD_DEF;
typedef RS_RES_CONTROL_PARAMS_INTERNAL RmCtrlParams;
// RMCTRL_API_COPPY_FLAGS is used to specify control api copy behavior.
#define RMCTRL_API_COPY_FLAGS_NONE 0x00000000
// skip memory copy in api copy in
#define RMCTRL_API_COPY_FLAGS_SKIP_COPYIN NVBIT(0)
// set control cache on api copy out
#define RMCTRL_API_COPY_FLAGS_SET_CONTROL_CACHE NVBIT(1)
// skip copy out even for controls with RMCTRL_FLAGS_COPYOUT_ON_ERROR
#define RMCTRL_API_COPY_FLAGS_FORCE_SKIP_COPYOUT_ON_ERROR NVBIT(2)
//
// RmCtrlExecuteCookie
//
@@ -49,6 +61,9 @@ struct RS_CONTROL_COOKIE
// Rmctrl Flags
NvU32 ctrlFlags;
// API Copy Flags
NvU32 apiCopyFlags;
// Required Access Rights for this command
const RS_ACCESS_MASK rightsRequired;
@@ -248,6 +263,33 @@ NV_STATUS embeddedParamCopyOut(RMAPI_PARAM_COPY *pParamCopy, RmCtrlParams *pRmC
// ??
#define RMCTRL_FLAGS_ALLOW_WITHOUT_SYSMEM_ACCESS 0x000010000
//
// This flag specifies that the control can be run by an admin privileged
// client running in a full SRIOV, vGPU-GSP-ENABLED hypervisor environment.
// Overrides regular privilege level flags.
//
#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_VGPU_GSP 0x000020000
//
// This flag specifies that the control can be run by an admin privileged
// client running in a full SRIOV, vGPU-GSP-DISABLED hypervisor environment.
// Overrides regular privilege level flags.
//
#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_SRIOV 0x000040000
//
// This flag specifies that the control can be run by an admin privileged
// client running in a non-SRIOV or SRIOV-Heavy hypervisor environment.
// Overrides regular privilege level flags.
//
#define RMCTRL_FLAGS_CPU_PLUGIN_FOR_LEGACY 0x000080000
//
// This flag specifies that the control can be run by an unprivileged
// client running in GSP-RM when SRIOV and vGPU-GSP are ENABLED.
// Overrides regular privilege level flags.
//
#define RMCTRL_FLAGS_GSP_PLUGIN_FOR_VGPU_GSP 0x000100000
//
// 'ACCESS_RIGHTS' Attribute

3
src/nvidia/inc/kernel/rmapi/exports.h
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@@ -56,7 +56,6 @@ void Nv04VidHeapControl (NVOS32_PARAMETERS*);
void Nv04IdleChannels (NVOS30_PARAMETERS*);
void Nv04MapMemory (NVOS33_PARAMETERS*);
void Nv04UnmapMemory (NVOS34_PARAMETERS*);
void Nv04UpdateContextDma (NVOS37_PARAMETERS*);
void Nv04I2CAccess (NVOS_I2C_ACCESS_PARAMS*);
void Nv04AllocContextDma (NVOS39_PARAMETERS*);
void Nv04BindContextDma (NVOS49_PARAMETERS*);
@@ -77,7 +76,6 @@ void Nv04VidHeapControlUser (NVOS32_PARAMETERS*);
void Nv04IdleChannelsUser (NVOS30_PARAMETERS*);
void Nv04MapMemoryUser (NVOS33_PARAMETERS*);
void Nv04UnmapMemoryUser (NVOS34_PARAMETERS*);
void Nv04UpdateContextDmaUser (NVOS37_PARAMETERS*);
void Nv04I2CAccessUser (NVOS_I2C_ACCESS_PARAMS*);
void Nv04AllocContextDmaUser (NVOS39_PARAMETERS*);
void Nv04BindContextDmaUser (NVOS49_PARAMETERS*);
@@ -98,7 +96,6 @@ void Nv04VidHeapControlKernel (NVOS32_PARAMETERS*);
void Nv04IdleChannelsKernel (NVOS30_PARAMETERS*);
void Nv04MapMemoryKernel (NVOS33_PARAMETERS*);
void Nv04UnmapMemoryKernel (NVOS34_PARAMETERS*);
void Nv04UpdateContextDmaKernel (NVOS37_PARAMETERS*);
void Nv04I2CAccessKernel (NVOS_I2C_ACCESS_PARAMS*);
void Nv04AllocContextDmaKernel (NVOS39_PARAMETERS*);
void Nv04BindContextDmaKernel (NVOS49_PARAMETERS*);

5
src/nvidia/inc/kernel/rmapi/mapping_list.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -29,7 +29,6 @@
#include "os/os.h"
#include "rmapi/resource.h"
struct P2PApi;
typedef struct VirtualMemory VirtualMemory;
typedef struct Memory Memory;
@@ -59,7 +58,7 @@ struct _def_client_dma_mapping_info
NvU64 FbApertureLen[NV_MAX_SUBDEVICES]; // GPU aperture mapped lengths
MEMORY_DESCRIPTOR *pMemDesc; // Subregion to be mapped
NvU32 Flags;
struct P2PApi *pP2PInfo;
NvBool bP2P;
NvU32 gpuMask;
ADDRESS_TRANSLATION addressTranslation;
MEMORY_DESCRIPTOR *pBar1P2PVirtMemDesc; // The peer GPU mapped BAR1 region

21
src/nvidia/inc/kernel/rmapi/rmapi.h
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@@ -262,16 +262,21 @@ NV_STATUS RmConfigSetEx (NvHandle, NvHandle, NvU32, NvP64, NvU32, NvBool);
/**
* Control cache API.
* Every function except rmapiControlCacheInit and rmapiControlCacheFree is thread safe.
*/
void rmapiControlCacheInit(void);
NvBool rmapiControlIsCacheable(NvU32 flags, NvBool isGSPClient);
void* rmapiControlCacheGet(NvHandle hClient, NvHandle hObject, NvU32 cmd);
NV_STATUS rmapiControlCacheInit(void);
NvBool rmapiControlIsCacheable(NvU32 flags, NvU32 accessRight, NvBool bAllowInternal);
NvBool rmapiCmdIsCacheable(NvU32 cmd, NvBool bAllowInternal);
NV_STATUS rmapiControlCacheGet(NvHandle hClient, NvHandle hObject, NvU32 cmd,
void* params, NvU32 paramsSize);
NV_STATUS rmapiControlCacheSet(NvHandle hClient, NvHandle hObject, NvU32 cmd,
void* params, NvU32 paramsSize);
const void* params, NvU32 paramsSize);
NV_STATUS rmapiControlCacheSetGpuInstForObject(NvHandle hClient, NvHandle hObject, NvU32 gpuInst);
void rmapiControlCacheFreeAllCacheForGpu(NvU32 gpuInst);
void rmapiControlCacheSetMode(NvU32 mode);
NvU32 rmapiControlCacheGetMode(void);
void rmapiControlCacheFree(void);
void rmapiControlCacheFreeClient(NvHandle hClient);
void rmapiControlCacheFreeObject(NvHandle hClient, NvHandle hObject);
void rmapiControlCacheFreeClientEntry(NvHandle hClient);
void rmapiControlCacheFreeObjectEntry(NvHandle hClient, NvHandle hObject);
typedef struct _RM_API_CONTEXT {
NvU32 gpuMask;
@@ -362,7 +367,7 @@ rmapiInitLockInfo
#define RM_LOCK_MODULES_TMR RM_LOCK_MODULE_VAL(0x000800, 0x04)
#define RM_LOCK_MODULES_I2C RM_LOCK_MODULE_VAL(0x001000, 0x00)
#define RM_LOCK_MODULES_GPS RM_LOCK_MODULE_VAL(0x001000, 0x01)
#define RM_LOCK_MODULES_PFM_REQ_HNDLR RM_LOCK_MODULE_VAL(0x001000, 0x01)
#define RM_LOCK_MODULES_SEC2 RM_LOCK_MODULE_VAL(0x001000, 0x02)
#define RM_LOCK_MODULES_THERM RM_LOCK_MODULE_VAL(0x001000, 0x03)
#define RM_LOCK_MODULES_INFOROM RM_LOCK_MODULE_VAL(0x001000, 0x04)

5
src/nvidia/inc/kernel/rmapi/rmapi_utils.h
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@@ -55,4 +55,9 @@ rmapiutilFreeClientAndDeviceHandles
//
NvBool rmapiutilIsExternalClassIdInternalOnly(NvU32 externalClassId);
//
// Return the flags and access right associated with this RM control command
//
NV_STATUS rmapiutilGetControlInfo(NvU32 cmd, NvU32 *pFlags, NvU32 *pAccessRight);
#endif /* RMAPI_UTILS_H */