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This commit is contained in:
Andy Ritger
2023-01-19 10:41:59 -08:00
parent dac2350c7f
commit 811073c51e
90 changed files with 1937 additions and 668 deletions
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65
src/nvidia/arch/nvalloc/unix/include/efi-console.h
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@@ -1,65 +0,0 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef EFI_CONSOLE_H
#define EFI_CONSOLE_H
#include "gpu/disp/kern_disp_max.h"
struct OBJGPU;
typedef struct
{
NvBool isDispStateSave;
NvU32 activeDisplayId[OBJ_MAX_HEADS];
struct
{
NvU32 displayId;
struct {
NvU32 index;
NvU32 subLinkMask;
} sorXBar;
struct {
NvU32 linkBw;
NvU32 laneCount;
NvU32 linkCtl;
} displayPort;
} activeDfpState[OBJ_MAX_DFPS];
NvU32 numDfps;
struct
{
NvU32 coreChannelClass;
NvU32 cacheSize;
NvU32 *pCache;
} display;
} nv_efi_t;
void RmSaveEFIDisplayState (OBJGPU *pGpu);
void RmRestoreEFIDisplayState (OBJGPU *pGpu);
#endif // EFI_CONSOLE_H

4
src/nvidia/arch/nvalloc/unix/include/nv-priv.h
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@@ -30,8 +30,6 @@
#include <gpu/disp/kern_disp_max.h>
#include <gpu/disp/kern_disp_type.h>
#include <efi-console.h>
#define NV_PRIV_REG_WR08(b,o,d) (*((volatile NvV8*)&(b)->Reg008[(o)/1])=(NvV8)(d))
#define NV_PRIV_REG_WR16(b,o,d) (*((volatile NvV16*)&(b)->Reg016[(o)/2])=(NvV16)(d))
#define NV_PRIV_REG_WR32(b,o,d) (*((volatile NvV32*)&(b)->Reg032[(o)/4])=(NvV32)(d))
@@ -331,8 +329,6 @@ typedef struct
nv_vga_t vga;
nv_efi_t efi;
NvU32 flags;
NvU32 status;

14
src/nvidia/arch/nvalloc/unix/src/os.c
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@@ -88,12 +88,12 @@ struct OS_RM_CAPS
nv_cap_t **caps;
};
NvBool osIsRaisedIRQL()
NvBool osIsRaisedIRQL(void)
{
return (!os_semaphore_may_sleep());
}
NvBool osIsISR()
NvBool osIsISR(void)
{
return os_is_isr();
}
@@ -1783,7 +1783,7 @@ NV_STATUS osPackageRegistry(
return RmPackageRegistry(nv, pRegTable, pSize);
}
NvU32 osGetCpuCount()
NvU32 osGetCpuCount(void)
{
return os_get_cpu_count(); // Total number of logical CPUs.
}
@@ -1834,7 +1834,7 @@ void osGetTimeoutParams(OBJGPU *pGpu, NvU32 *pTimeoutUs, NvU32 *pScale, NvU32 *p
return;
}
void osFlushLog()
void osFlushLog(void)
{
// Not implemented
}
@@ -2671,7 +2671,7 @@ NV_STATUS osGpuLocksQueueRelease(OBJGPU *pGpu, NvU32 dpcGpuLocksRelease)
return NV_SEMA_RELEASE_FAILED;
}
void osSyncWithRmDestroy()
void osSyncWithRmDestroy(void)
{
}
@@ -3511,7 +3511,7 @@ osGetGpuRailVoltageInfo
* @return pointer to the security token.
*/
PSECURITY_TOKEN
osGetSecurityToken()
osGetSecurityToken(void)
{
NV_STATUS rmStatus;
TOKEN_USER *pTokenUser;
@@ -4177,7 +4177,7 @@ osWaitForIbmnpuRsync
}
NvU32
osGetPageSize()
osGetPageSize(void)
{
return os_page_size;
}

7
src/nvidia/arch/nvalloc/unix/src/osinit.c
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@@ -1213,8 +1213,6 @@ void RmClearPrivateState(
void *pVbiosCopy = NULL;
void *pRegistryCopy = NULL;
NvU32 vbiosSize;
NvU32 *pEfiDisplayCache;
NvU32 efiDisplayCacheSize;
nv_i2c_adapter_entry_t i2c_adapters[MAX_I2C_ADAPTERS];
nv_dynamic_power_t dynamicPowerCopy;
NvU32 x = 0;
@@ -1234,8 +1232,6 @@ void RmClearPrivateState(
pVbiosCopy = nvp->pVbiosCopy;
vbiosSize = nvp->vbiosSize;
pRegistryCopy = nvp->pRegistry;
pEfiDisplayCache = nvp->efi.display.pCache;
efiDisplayCacheSize = nvp->efi.display.cacheSize;
dynamicPowerCopy = nvp->dynamic_power;
pmc_boot_0 = nvp->pmc_boot_0;
pmc_boot_42 = nvp->pmc_boot_42;
@@ -1251,8 +1247,6 @@ void RmClearPrivateState(
nvp->pVbiosCopy = pVbiosCopy;
nvp->vbiosSize = vbiosSize;
nvp->pRegistry = pRegistryCopy;
nvp->efi.display.pCache = pEfiDisplayCache;
nvp->efi.display.cacheSize = efiDisplayCacheSize;
nvp->dynamic_power = dynamicPowerCopy;
nvp->pmc_boot_0 = pmc_boot_0;
nvp->pmc_boot_42 = pmc_boot_42;
@@ -1280,7 +1274,6 @@ void RmFreePrivateState(
if (nvp != NULL)
{
portMemFree(nvp->pVbiosCopy);
portMemFree(nvp->efi.display.pCache);
os_free_mem(nvp);
}