535.230.02

This commit is contained in:
Bernhard Stoeckner
2025-01-16 17:34:27 +01:00
parent 8845de1ce4
commit 855c3c9d3c
42 changed files with 472 additions and 94 deletions

View File

@@ -122,6 +122,18 @@ const PRB_FIELD_DESC prb_fields_dcl_dclmsg[] = {
PRB_MAYBE_FIELD_NAME("engine")
PRB_MAYBE_FIELD_DEFAULT(0)
},
{
331,
{
PRB_OPTIONAL,
PRB_MESSAGE,
0,
},
RC_RCDIAGRECORD,
0,
PRB_MAYBE_FIELD_NAME("rc_diag_recs")
PRB_MAYBE_FIELD_DEFAULT(0)
},
};
// 'ErrorBlock' field defaults
@@ -150,7 +162,7 @@ const PRB_MSG_DESC prb_messages_dcl[] = {
PRB_MAYBE_MESSAGE_NAME("Dcl.Engines")
},
{
7,
8,
prb_fields_dcl_dclmsg,
PRB_MAYBE_MESSAGE_NAME("Dcl.DclMsg")
},

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@@ -18,8 +18,8 @@ extern const PRB_MSG_DESC prb_messages_dcl[];
// Message maximum lengths
// Does not include repeated fields, strings and byte arrays.
#define DCL_ENGINES_LEN 130
#define DCL_DCLMSG_LEN 567
#define DCL_ERRORBLOCK_LEN 571
#define DCL_DCLMSG_LEN 610
#define DCL_ERRORBLOCK_LEN 614
extern const PRB_FIELD_DESC prb_fields_dcl_engines[];
@@ -41,6 +41,7 @@ extern const PRB_FIELD_DESC prb_fields_dcl_dclmsg[];
#define DCL_DCLMSG_JOURNAL_BUGCHECK (&prb_fields_dcl_dclmsg[4])
#define DCL_DCLMSG_RCCOUNTER (&prb_fields_dcl_dclmsg[5])
#define DCL_DCLMSG_ENGINE (&prb_fields_dcl_dclmsg[6])
#define DCL_DCLMSG_RC_DIAG_RECS (&prb_fields_dcl_dclmsg[7])
// 'DclMsg' field lengths
#define DCL_DCLMSG_COMMON_LEN 42
@@ -50,6 +51,7 @@ extern const PRB_FIELD_DESC prb_fields_dcl_dclmsg[];
#define DCL_DCLMSG_JOURNAL_BUGCHECK_LEN 69
#define DCL_DCLMSG_RCCOUNTER_LEN 64
#define DCL_DCLMSG_ENGINE_LEN 133
#define DCL_DCLMSG_RC_DIAG_RECS_LEN 42
extern const PRB_FIELD_DESC prb_fields_dcl_errorblock[];
@@ -57,7 +59,7 @@ extern const PRB_FIELD_DESC prb_fields_dcl_errorblock[];
#define DCL_ERRORBLOCK_DATA (&prb_fields_dcl_errorblock[0])
// 'ErrorBlock' field lengths
#define DCL_ERRORBLOCK_DATA_LEN 570
#define DCL_ERRORBLOCK_DATA_LEN 613
extern const PRB_SERVICE_DESC prb_services_dcl[];

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@@ -7,7 +7,7 @@ extern "C" {
#endif
/*
* SPDX-FileCopyrightText: Copyright (c) 2006-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 2006-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -96,6 +96,11 @@ MAKE_VECTOR(InterruptTable, INTR_TABLE_ENTRY);
// Default value for intrStuckThreshold
#define INTR_STUCK_THRESHOLD 1000
// Minimum length of interrupt to log as long-running
#define LONG_INTR_LOG_LENGTH_NS (1000000LLU) // 1ms
// Maximum frequency of long-running interrupt print, per engine
#define LONG_INTR_LOG_RATELIMIT_NS (10000000000LLU) // 10s
#define INTR_TABLE_INIT_KERNEL (1 << 0)
#define INTR_TABLE_INIT_PHYSICAL (1 << 1)
@@ -194,6 +199,13 @@ typedef struct Device Device;
#else
#define PRIVATE_FIELD(x) NVOC_PRIVATE_FIELD(x)
#endif
struct __nvoc_inner_struc_Intr_1__ {
NvU32 intrCount;
NvU64 intrLength;
NvU64 lastPrintTime;
};
struct Intr {
const struct NVOC_RTTI *__nvoc_rtti;
struct OBJENGSTATE __nvoc_base_OBJENGSTATE;
@@ -262,6 +274,7 @@ struct Intr {
NvU32 intrEn0Orig;
NvBool halIntrEnabled;
NvU32 saveIntrEn0;
struct __nvoc_inner_struc_Intr_1__ longIntrStats[167];
};
#ifndef __NVOC_CLASS_Intr_TYPEDEF__

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@@ -40,7 +40,7 @@ extern const PRB_MSG_DESC prb_messages_nvdebug[];
// Does not include repeated fields, strings and byte arrays.
#define NVDEBUG_SYSTEMINFO_LEN 275
#define NVDEBUG_GPUINFO_LEN 164
#define NVDEBUG_NVDUMP_LEN 1308
#define NVDEBUG_NVDUMP_LEN 1351
#define NVDEBUG_SYSTEMINFO_NORTHBRIDGEINFO_LEN 12
#define NVDEBUG_SYSTEMINFO_SOCINFO_LEN 12
#define NVDEBUG_SYSTEMINFO_CPUINFO_LEN 24
@@ -104,7 +104,7 @@ extern const PRB_FIELD_DESC prb_fields_nvdebug_nvdump[];
// 'NvDump' field lengths
#define NVDEBUG_NVDUMP_SYSTEM_INFO_LEN 278
#define NVDEBUG_NVDUMP_DCL_MSG_LEN 570
#define NVDEBUG_NVDUMP_DCL_MSG_LEN 613
#define NVDEBUG_NVDUMP_GPU_INFO_LEN 167
#define NVDEBUG_NVDUMP_EXCEPTION_ADDRESS_LEN 10
#define NVDEBUG_NVDUMP_SYSTEM_INFO_GSPRM_LEN 278

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@@ -81,15 +81,16 @@ typedef struct RsSession RsSession;
*/
struct RS_LOCK_INFO
{
struct RsClient *pClient; ///< Pointer to client that was locked (if any)
struct RsClient *pSecondClient; ///< Pointer to second client, for dual-client locking
RsResourceRef *pContextRef; ///< User-defined reference
struct RsSession *pSession; ///< Session object to be locked, if any
NvU32 flags; ///< RS_LOCK_FLAGS_*
NvU32 state; ///< RS_LOCK_STATE_*
struct RsClient *pClient; ///< Pointer to client that was locked (if any)
struct RsClient *pSecondClient; ///< Pointer to second client, for dual-client locking
RsResourceRef *pContextRef; ///< User-defined reference
RsResourceRef *pResRefToBackRef; ///< Resource from which to infer indirect GPU dependencies
struct RsSession *pSession; ///< Session object to be locked, if any
NvU32 flags; ///< RS_LOCK_FLAGS_*
NvU32 state; ///< RS_LOCK_STATE_*
NvU32 gpuMask;
NvU8 traceOp; ///< RS_LOCK_TRACE_* operation for lock-metering
NvU32 traceClassId; ///< Class of initial resource that was locked for lock metering
NvU8 traceOp; ///< RS_LOCK_TRACE_* operation for lock-metering
NvU32 traceClassId; ///< Class of initial resource that was locked for lock metering
};
struct RS_RES_ALLOC_PARAMS_INTERNAL