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https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-21 23:43:59 +00:00
520.61.05
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@@ -1,5 +1,5 @@
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/*******************************************************************************
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Copyright (c) 2015-2021 NVIDIA Corporation
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Copyright (c) 2015-2022 NVIDIA Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to
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@@ -43,16 +43,9 @@ static NvU32 get_push_end_size(uvm_channel_t *channel)
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if (uvm_channel_is_ce(channel))
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return UVM_PUSH_CE_END_SIZE;
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return 0;
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}
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static NV_STATUS test_push_end_size(uvm_va_space_t *va_space)
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{
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NV_STATUS status = NV_OK;
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@@ -66,10 +59,6 @@ static NV_STATUS test_push_end_size(uvm_va_space_t *va_space)
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NvU32 push_end_size;
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uvm_channel_type_t type = i;
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status = uvm_push_begin(gpu->channel_manager, type, &push, "type %u\n", (unsigned)type);
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TEST_CHECK_GOTO(status == NV_OK, done);
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@@ -302,7 +291,7 @@ static NV_STATUS test_push_interleaving_on_gpu(uvm_gpu_t* gpu)
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// single thread.
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uvm_thread_context_lock_disable_tracking();
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status = uvm_rm_mem_alloc_and_map_cpu(gpu, UVM_RM_MEM_TYPE_SYS, size, &mem);
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status = uvm_rm_mem_alloc_and_map_cpu(gpu, UVM_RM_MEM_TYPE_SYS, size, 0, &mem);
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TEST_CHECK_GOTO(status == NV_OK, done);
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host_va = (NvU32*)uvm_rm_mem_get_cpu_va(mem);
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gpu_va = uvm_rm_mem_get_gpu_va(mem, gpu, uvm_channel_is_proxy(channel));
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@@ -559,10 +548,6 @@ done:
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static NV_STATUS test_max_pushes_on_gpu(uvm_gpu_t *gpu)
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{
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TEST_NV_CHECK_RET(test_max_pushes_on_gpu_and_channel_type(gpu, UVM_CHANNEL_TYPE_GPU_INTERNAL));
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return NV_OK;
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