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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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550.40.07
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@@ -76,7 +76,7 @@ void uvm_hal_volta_fault_buffer_write_get(uvm_parent_gpu_t *parent_gpu, NvU32 in
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// the HW replayable fault buffer, because UVM does not write to the actual
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// GET register; GSP-RM is responsible for clearing the bits in the real
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// GET register.
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if (!uvm_parent_gpu_replayable_fault_buffer_is_uvm_owned(parent_gpu))
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if (g_uvm_global.conf_computing_enabled)
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return;
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// Clear the GETPTR_CORRUPTED and OVERFLOW bits.
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@@ -253,7 +253,7 @@ static UvmFaultMetadataPacket *get_fault_buffer_entry_metadata(uvm_parent_gpu_t
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UvmFaultMetadataPacket *fault_entry_metadata;
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UVM_ASSERT(index < parent_gpu->fault_buffer_info.replayable.max_faults);
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UVM_ASSERT(!uvm_parent_gpu_replayable_fault_buffer_is_uvm_owned(parent_gpu));
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UVM_ASSERT(g_uvm_global.conf_computing_enabled);
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fault_entry_metadata = parent_gpu->fault_buffer_info.rm_info.replayable.bufferMetadata;
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UVM_ASSERT(fault_entry_metadata != NULL);
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@@ -354,7 +354,7 @@ NV_STATUS uvm_hal_volta_fault_buffer_parse_replayable_entry(uvm_parent_gpu_t *pa
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// When Confidential Computing is enabled, faults are encrypted by RM, so
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// they need to be decrypted before they can be parsed
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if (!uvm_parent_gpu_replayable_fault_buffer_is_uvm_owned(parent_gpu)) {
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if (g_uvm_global.conf_computing_enabled) {
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NV_STATUS status;
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UvmFaultMetadataPacket *fault_entry_metadata = get_fault_buffer_entry_metadata(parent_gpu, index);
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