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This commit is contained in:
Bernhard Stoeckner
2024-01-24 17:51:53 +01:00
parent bb2dac1f20
commit 91676d6628
1411 changed files with 261367 additions and 145959 deletions
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18
src/common/displayport/inc/dp_configcaps.h
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@@ -229,15 +229,15 @@ namespace DisplayPort
// Physical layer feature set
//
virtual NvU64 getMaxLinkRate() = 0; // Maximum byte-block in Hz
virtual unsigned getMaxLaneCount() = 0; // DPCD offset 2
virtual unsigned getMaxLaneCount() = 0; // DPCD offset 0x0002h
virtual unsigned getMaxLaneCountSupportedAtLinkRate(LinkRate linkRate) = 0;
virtual bool getEnhancedFraming() = 0;
virtual bool getSupportsNoHandshakeTraining() = 0;
virtual bool getMsaTimingparIgnored() = 0;
virtual bool getDownstreamPort(NvU8 *portType) = 0; // DPCD offset 5
virtual bool getSupportsMultistream() = 0; // DPCD offset 21h
virtual bool getNoLinkTraining() = 0; // DPCD offset 330h
virtual unsigned getPhyRepeaterCount() = 0; // DPCD offset F0002h
virtual bool getDownstreamPort(NvU8 *portType) = 0; // DPCD offset 0x0005h
virtual bool getSupportsMultistream() = 0; // DPCD offset 0x0021h
virtual bool getNoLinkTraining() = 0; // DPCD offset 0x0330h
virtual unsigned getPhyRepeaterCount() = 0; // DPCD offset 0xF0002h
};
class OUI
@@ -306,7 +306,7 @@ namespace DisplayPort
virtual bool getSDPExtnForColorimetry() = 0;
virtual bool getRootAsyncSDPSupported() = 0;
bool isAtLeastVersion(unsigned major, unsigned minor)
bool isAtLeastVersion(unsigned major, unsigned minor)
{
if (getRevisionMajor() > major)
return true;
@@ -317,7 +317,7 @@ namespace DisplayPort
return getRevisionMinor() >= minor;
}
bool isVersion(unsigned major, unsigned minor)
bool isVersion(unsigned major, unsigned minor)
{
if ((getRevisionMajor() == major) &&
(getRevisionMinor() == minor))
@@ -326,7 +326,7 @@ namespace DisplayPort
return false;
}
bool lttprIsAtLeastVersion(unsigned major, unsigned minor)
bool lttprIsAtLeastVersion(unsigned major, unsigned minor)
{
if (lttprGetRevisionMajor() > major)
return true;
@@ -337,7 +337,7 @@ namespace DisplayPort
return lttprGetRevisionMinor() >= minor;
}
bool lttprIsVersion(unsigned major, unsigned minor)
bool lttprIsVersion(unsigned major, unsigned minor)
{
if ((lttprGetRevisionMajor() == major) &&
(lttprGetRevisionMinor() == minor))

13
src/common/displayport/inc/dp_connector.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
* SPDX-License-Identifier: MIT
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -48,7 +48,10 @@
namespace DisplayPort
{
class EvoInterface;
#define SET_DP_IMP_ERROR(pErrorCode, errorCode) \
if (pErrorCode && *pErrorCode == DP_IMP_ERROR_NONE) *pErrorCode = errorCode;
typedef enum
{
DP_IMP_ERROR_NONE,
@@ -497,8 +500,8 @@ namespace DisplayPort
virtual bool compoundQueryAttach(Group * target,
const DpModesetParams &modesetParams, // Modeset info
DscParams *pDscParams, // DSC parameters
DP_IMP_ERROR *errorStatus = NULL) = 0; // Error Status code
DscParams *pDscParams, // DSC parameters
DP_IMP_ERROR *errorStatus = NULL) = 0; // Error Status code
virtual bool endCompoundQuery() = 0;
@@ -729,7 +732,7 @@ namespace DisplayPort
virtual bool readPsrErrorStatus(vesaPsrErrorStatus *psrErr) = 0;
virtual bool writePsrEvtIndicator(vesaPsrEventIndicator psrErr) = 0;
virtual bool readPsrEvtIndicator(vesaPsrEventIndicator *psrErr) = 0;
virtual bool updatePsrLinkState(bool bTrainLink) = 0;
virtual bool updatePsrLinkState(bool bTurnOnLink) = 0;
virtual bool readPrSinkDebugInfo(panelReplaySinkDebugInfo *prDbgInfo) = 0;

20
src/common/displayport/inc/dp_connectorimpl.h
View File

@@ -194,7 +194,9 @@ namespace DisplayPort
unsigned compoundQueryLocalLinkPBN;
bool compoundQueryForceEnableFEC;
unsigned freeSlots, maximumSlots;
unsigned freeSlots;
unsigned maximumSlots;
int firstFreeSlot;
// Multistream messaging
MessageManager * messageManager;
@@ -346,12 +348,22 @@ namespace DisplayPort
//
bool bPowerDownPhyBeforeD3;
//
// Reset the MSTM_CTRL registers on branch device irrespective of
// IRQ VECTOR register having stale message. Certain branch devices
// need to reset the topology before issuing new discovery commands
// as there can be case where previous is still in process and a
// possibility that clearPendingMessage() might not be able to catch
// the stale messages from previous discovery.
//
bool bForceClearPendingMsg;
Group *perHeadAttachedGroup[NV_MAX_HEADS];
NvU32 inTransitionHeadMask;
void sharedInit();
ConnectorImpl(MainLink * main, AuxBus * auxBus, Timer * timer, Connector::EventSink * sink);
void setPolicyModesetOrderMitigation(bool enabled);
void setPolicyForceLTAtNAB(bool enabled);
void setPolicyAssessLinkSafely(bool enabled);
@@ -599,6 +611,8 @@ namespace DisplayPort
bool beforeAddStreamMST(GroupImpl * group, bool force = false, bool forFlushMode = false);
virtual bool checkIsModePossibleMST(GroupImpl * group);
bool deleteAllVirtualChannels();
void clearTimeslices();
bool allocateTimeslice(GroupImpl * targetGroup);
@@ -664,7 +678,7 @@ namespace DisplayPort
virtual bool writePsrEvtIndicator(vesaPsrEventIndicator psrErr);
virtual bool readPsrEvtIndicator(vesaPsrEventIndicator *psrErr);
virtual bool readPsrState(vesaPsrState *psrState);
virtual bool updatePsrLinkState(bool bTrainLink);
virtual bool updatePsrLinkState(bool bTurnOnLink);
virtual bool readPrSinkDebugInfo(panelReplaySinkDebugInfo *prDbgInfo);

2
src/common/displayport/inc/dp_deviceimpl.h
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@@ -449,6 +449,8 @@ namespace DisplayPort
NvBool getDSCSupport();
bool getFECSupport();
NvBool isDSCPassThroughSupported();
NvBool isDynamicPPSSupported();
NvBool isDynamicDscToggleSupported();
NvBool isDSCSupported();
NvBool isDSCDecompressionSupported();
NvBool isDSCPossible();

27
src/common/displayport/inc/dp_evoadapter.h
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@@ -39,6 +39,8 @@
#include "dp_regkeydatabase.h"
#include <nvos.h>
#include <ctrl/ctrl0073/ctrl0073dfp.h>
#include <ctrl/ctrl0073/ctrl0073dp.h>
#define HDCP_DUMMY_CN (0x1)
#define HDCP_DUMMY_CKSV (0xFFFFF)
@@ -131,10 +133,7 @@ namespace DisplayPort
class EvoMainLink : public MainLink
{
EvoInterface * provider;
Timer * timer;
NvU32 displayId;
NvU32 subdeviceIndex;
private:
NvU32 _maxLinkRateSupportedGpu;
NvU32 _maxLinkRateSupportedDfp;
unsigned allHeadMask;
@@ -160,6 +159,7 @@ namespace DisplayPort
bool _enableMSAOverrideOverMST;
bool _isLTPhyRepeaterSupported;
bool _isMSTPCONCapsReadDisabled;
//
// LTTPR count reported by RM, it might not be the same with DPLib probe
// For example, some Intel LTTPR might not be ready to response 0xF0000 probe
@@ -178,11 +178,19 @@ namespace DisplayPort
unsigned maxNumHztSlices;
unsigned lineBufferBitDepth;
}_DSC;
private:
void initializeRegkeyDatabase();
void applyRegkeyOverrides();
protected:
EvoInterface * provider;
Timer * timer;
NvU32 displayId;
NvU32 subdeviceIndex;
NV0073_CTRL_DFP_GET_INFO_PARAMS dfpParams;
NV0073_CTRL_CMD_DP_GET_CAPS_PARAMS dpParams;
public:
EvoMainLink(EvoInterface * provider, Timer * timer);
@@ -379,8 +387,8 @@ namespace DisplayPort
bool isActive();
bool isEDP();
bool skipPowerdownEdpPanelWhenHeadDetach();
bool isMSTPCONCapsReadDisabled();
bool supportMSAOverMST();
bool queryAndUpdateDfpParams();
bool controlRateGoverning(NvU32 head, bool enable, bool updateNow);
bool getDpTestPattern(NV0073_CTRL_DP_TESTPATTERN *testPattern);
@@ -393,14 +401,15 @@ namespace DisplayPort
NvU32 monitorDenylistInfo(NvU32 ManufacturerID, NvU32 ProductID, DpMonitorDenylistData *pDenylistData);
NvU32 allocDisplayId();
bool freeDisplayId(NvU32 displayId);
void queryGPUCapability();
virtual bool queryAndUpdateDfpParams();
virtual bool queryGPUCapability();
bool getEdpPowerData(bool *panelPowerOn, bool *dpcdPowerStateD0);
virtual bool vrrRunEnablementStage(unsigned stage, NvU32 *status);
void configureTriggerSelect(NvU32 head,
DP_SINGLE_HEAD_MULTI_STREAM_PIPELINE_ID streamIdentifier = DP_SINGLE_HEAD_MULTI_STREAM_PIPELINE_ID_PRIMARY);
void configureTriggerAll(NvU32 head, bool enable);
bool configureLinkRateTable(const NvU16 *pLinkRateTable, LinkRates *pLinkRates);
virtual bool configureLinkRateTable(const NvU16 *pLinkRateTable, LinkRates *pLinkRates);
bool configureFec(const bool bEnableFec);
};

122
src/common/displayport/inc/dp_linkconfig.h
View File

@@ -242,7 +242,6 @@ namespace DisplayPort
bool disablePostLTRequest;
bool bEnableFEC;
bool bDisableLTTPR;
//
// The counter to record how many times link training happens.
// Client can reset the counter by calling setLTCounter(0)
@@ -252,7 +251,8 @@ namespace DisplayPort
LinkConfiguration() :
lanes(0), peakRatePossible(0), peakRate(0), minRate(0),
enhancedFraming(false), multistream(false), disablePostLTRequest(false),
bEnableFEC(false), bDisableLTTPR(false), linkTrainCounter(0) {};
bEnableFEC(false), bDisableLTTPR(false),
linkTrainCounter(0) {};
LinkConfiguration(LinkPolicy * p, unsigned lanes, LinkRate peakRate,
bool enhancedFraming, bool MST, bool disablePostLTRequest = false,
@@ -316,42 +316,113 @@ namespace DisplayPort
bDisableLTTPR(false),
linkTrainCounter(0)
{
//
// Reverse engineer a link configuration from Total TotalLinkPBN
// Note that HBR2 twice HBR. The table below treats HBR2x1 and HBRx2, etc.
//
// BW Effective Lanes Total TotalLinkPBN
// 165 1 195.5555556
// 165 2 391.1111111
// 165 4 782.2222222
// 270 1 320
// 270 2 640
// 270 4 1280
// 270 8 2560
// PBN Calculation
// Definition of PBN is "54/64 MBps".
// Note this is the "data" actually transmitted in the main link.
// So we need to take channel coding into consideration.
// Formula: PBN = Lane Count * Link Rate (Gbps) * 1000 * (1/8) * ChannelCoding Efficiency * (64 / 54)
// Example:
// 1. 4 * HBR2: 4 * 5.4 * 1000 * (1/8) * (8/10) * (64/54) = 2560
// 2. 2 * UHBR10: 2 * 10 * 1000 * (1/8) * (128/132) * (64/54) = 2873
//
// Full list:
//
// BW (Gbps) Lanes TotalLinkPBN
// 1.62 1 192
// 1.62 2 384
// 1.62 4 768
// 2.70 1 320
// 2.70 2 640
// 2.70 4 1280
// 5.40 1 640
// 5.40 2 1280
// 5.40 4 2560
// 8.10 1 960
// 8.10 2 1920
// 8.10 4 3840
// 10.00 1 1436
// 10.00 2 2873
// 10.00 4 5746
// 13.50 1 1939
// 13.50 2 3878
// 13.50 4 7757
// 20.00 1 2873
// 20.00 2 5746
// 20.00 4 11492
//
if (TotalLinkPBN <= 90)
peakRatePossible = peakRate = RBR, minRate = linkOverhead(RBR), lanes=0; // FAIL
if (TotalLinkPBN <= 195)
peakRatePossible = peakRate = RBR, minRate = linkOverhead(RBR), lanes=1;
{
peakRatePossible = peakRate = RBR;
minRate = linkOverhead(RBR);
lanes = 0; // FAIL
}
if (TotalLinkPBN <= 192)
{
peakRatePossible = peakRate = RBR;
minRate = linkOverhead(RBR);
lanes = 1;
}
else if (TotalLinkPBN <= 320)
peakRatePossible = peakRate = HBR, minRate=linkOverhead(HBR), lanes = 1;
else if (TotalLinkPBN <= 391)
peakRatePossible = peakRate = RBR, minRate=linkOverhead(RBR), lanes = 2;
{
peakRatePossible = peakRate = HBR;
minRate = linkOverhead(HBR);
lanes = 1;
}
else if (TotalLinkPBN <= 384)
{
peakRatePossible = peakRate = RBR;
minRate = linkOverhead(RBR);
lanes = 2;
}
else if (TotalLinkPBN <= 640)
peakRatePossible = peakRate = HBR, minRate=linkOverhead(HBR), lanes = 2; // could be HBR2x1, but TotalLinkPBN works out same
else if (TotalLinkPBN <= 782)
peakRatePossible = peakRate = RBR, minRate=linkOverhead(RBR), lanes = 4;
{
// could be HBR2 x 1, but TotalLinkPBN works out same
peakRatePossible = peakRate = HBR;
minRate = linkOverhead(HBR);
lanes = 2;
}
else if (TotalLinkPBN <= 768)
{
peakRatePossible = peakRate = RBR;
minRate = linkOverhead(RBR);
lanes = 4;
}
else if (TotalLinkPBN <= 960)
peakRatePossible = peakRate = HBR3, minRate=linkOverhead(HBR3), lanes = 1;
{
peakRatePossible = peakRate = HBR3;
minRate = linkOverhead(HBR3);
lanes = 1;
}
else if (TotalLinkPBN <= 1280)
peakRatePossible = peakRate = HBR, minRate=linkOverhead(HBR), lanes = 4; // could be HBR2x2
{
// could be HBR2 x 2
peakRatePossible = peakRate = HBR;
minRate = linkOverhead(HBR);
lanes = 4;
}
else if (TotalLinkPBN <= 1920)
peakRatePossible = peakRate = HBR3, minRate=linkOverhead(HBR3), lanes = 2; // could be HBR2x
{
peakRatePossible = peakRate = HBR3;
minRate = linkOverhead(HBR3);
lanes = 2;
}
else if (TotalLinkPBN <= 2560)
peakRatePossible = peakRate = HBR2, minRate=linkOverhead(HBR2), lanes = 4;
{
peakRatePossible = peakRate = HBR2;
minRate = linkOverhead(HBR2);
lanes = 4;
}
else if (TotalLinkPBN <= 3840)
peakRatePossible = peakRate = HBR3, minRate=linkOverhead(HBR3), lanes = 4;
{
peakRatePossible = peakRate = HBR3;
minRate = linkOverhead(HBR3);
lanes = 4;
}
else {
peakRatePossible = peakRate = RBR, minRate = linkOverhead(RBR), lanes = 0; // FAIL
DP_ASSERT(0 && "Unknown configuration");
@@ -412,7 +483,6 @@ namespace DisplayPort
}
minRate = linkOverhead(peakRate);
return lanes != laneCount_0;
}

5
src/common/displayport/inc/dp_mainlink.h
View File

@@ -144,6 +144,9 @@ namespace DisplayPort
// Check if we should skip power down eDP when head detached.
virtual bool skipPowerdownEdpPanelWhenHeadDetach() = 0;
// Check if we should skip reading PCON Caps in MST case.
virtual bool isMSTPCONCapsReadDisabled() = 0;
// Get GPU DSC capabilities
virtual void getDscCaps(bool *pbDscSupported = NULL,
unsigned *pEncoderColorFormatMask = NULL,
@@ -242,7 +245,7 @@ namespace DisplayPort
virtual NvU32 getRootDisplayId() = 0;
virtual NvU32 allocDisplayId() = 0;
virtual bool freeDisplayId(NvU32 displayId) = 0;
virtual void queryGPUCapability() = 0;
virtual bool queryGPUCapability() {return false;}
virtual bool queryAndUpdateDfpParams() = 0;
virtual bool getEdpPowerData(bool *panelPowerOn, bool *bDPCDPowerStateD0) = 0;
virtual bool vrrRunEnablementStage(unsigned stage, NvU32 *status) = 0;

8
src/common/displayport/inc/dp_regkeydatabase.h
View File

@@ -63,7 +63,7 @@
#define NV_DP_REGKEY_POWER_DOWN_PHY "DP_POWER_DOWN_PHY"
//
// Regkey to re-assess max link if the first assessed link config
// Regkey to re-assess max link if the first assessed link config
// is lower than the panel max
//
#define NV_DP_REGKEY_REASSESS_MAX_LINK "DP_REASSESS_MAX_LINK"
@@ -74,6 +74,11 @@
//
#define NV_DP_DSC_MST_CAP_BUG_3143315 "DP_DSC_MST_CAP_BUG_3143315"
//
// Bug 4388987 : This regkey will disable reading PCON caps for MST.
//
#define NV_DP_REGKEY_MST_PCON_CAPS_READ_DISABLED "DP_BUG_4388987_WAR"
//
// Data Base used to store all the regkey values.
// The actual data base is declared statically in dp_evoadapter.cpp.
@@ -107,6 +112,7 @@ struct DP_REGKEY_DATABASE
bool bDscMstCapBug3143315;
bool bPowerDownPhyBeforeD3;
bool bReassessMaxLink;
bool bMSTPCONCapsReadDisabled;
};
#endif //INCLUDED_DP_REGKEYDATABASE_H

1
src/common/displayport/inc/dp_timer.h
View File

@@ -65,7 +65,6 @@ namespace DisplayPort
private:
RawTimer * raw;
NvU64 nextTimestamp;
List pending;
struct PendingCallback : ListElement
{

42
src/common/displayport/inc/dp_watermark.h
View File

@@ -38,13 +38,13 @@ namespace DisplayPort
{
class LinkConfiguration;
struct ModesetInfo
struct ModesetInfo
{
unsigned twoChannelAudioHz; // if you need 192khz stereo specify 192000 here
unsigned eightChannelAudioHz; // Same setting for multi channel audio.
// DisplayPort encodes 3-8 channel streams as 8 channel
NvU64 pixelClockHz; // Requested pixel clock for the mode
unsigned rasterWidth;
unsigned rasterWidth;
unsigned rasterHeight;
unsigned surfaceWidth; // RasterBlankStartX - newRasterBlankEndX
unsigned surfaceHeight; // Active region height
@@ -56,35 +56,35 @@ namespace DisplayPort
DSC_MODE mode; // DSC Mode
bool bEnablePassThroughForPCON;
ModesetInfo(): twoChannelAudioHz(0),
eightChannelAudioHz(0),
pixelClockHz(0),
rasterWidth(0),
rasterHeight(0),
surfaceWidth(0),
ModesetInfo(): twoChannelAudioHz(0),
eightChannelAudioHz(0),
pixelClockHz(0),
rasterWidth(0),
rasterHeight(0),
surfaceWidth(0),
surfaceHeight(0),
depth(0),
rasterBlankStartX(0),
rasterBlankStartX(0),
rasterBlankEndX(0),
bitsPerComponent(0),
bEnableDsc(false),
mode(DSC_SINGLE),
bEnablePassThroughForPCON(false) {}
ModesetInfo(unsigned newTwoChannelAudioHz, unsigned newEightChannelAudioHz, NvU64 newPixelClockHz,
unsigned newRasterWidth, unsigned newRasterHeight,
ModesetInfo(unsigned newTwoChannelAudioHz, unsigned newEightChannelAudioHz, NvU64 newPixelClockHz,
unsigned newRasterWidth, unsigned newRasterHeight,
unsigned newSurfaceWidth, unsigned newSurfaceHeight, unsigned newDepth,
unsigned newRasterBlankStartX=0, unsigned newRasterBlankEndX=0, bool newBEnableDsc = false,
DSC_MODE newMode = DSC_SINGLE, bool newBEnablePassThroughForPCON = false):
twoChannelAudioHz(newTwoChannelAudioHz),
eightChannelAudioHz(newEightChannelAudioHz),
pixelClockHz(newPixelClockHz),
rasterWidth(newRasterWidth),
twoChannelAudioHz(newTwoChannelAudioHz),
eightChannelAudioHz(newEightChannelAudioHz),
pixelClockHz(newPixelClockHz),
rasterWidth(newRasterWidth),
rasterHeight(newRasterHeight),
surfaceWidth(newSurfaceWidth),
surfaceHeight(newSurfaceHeight),
depth(newDepth),
rasterBlankStartX(newRasterBlankStartX),
rasterBlankStartX(newRasterBlankStartX),
rasterBlankEndX(newRasterBlankEndX),
bitsPerComponent(0),
bEnableDsc(newBEnableDsc),
@@ -98,6 +98,7 @@ namespace DisplayPort
unsigned tuSize;
unsigned hBlankSym;
unsigned vBlankSym;
NvU32 effectiveBpp;
};
bool isModePossibleSST
@@ -130,6 +131,13 @@ namespace DisplayPort
Watermark * dpInfo
);
bool dp2xIsModePossibleMSTWithFEC
(
const LinkConfiguration & linkConfig,
const ModesetInfo & modesetInfo,
Watermark * dpInfo
);
// Return Payload Bandwidth Number(PBN)for requested mode
unsigned pbnForMode(const ModesetInfo & modesetInfo);
}