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This commit is contained in:
Andy Ritger
2022-06-28 08:00:06 -07:00
parent 965db98552
commit 94eaea9726
37 changed files with 556 additions and 353 deletions
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7
src/nvidia/generated/g_kernel_rc_nvoc.h
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@@ -88,6 +88,7 @@ struct KernelRc {
NvBool bRobustChannelsEnabled;
NvBool bBreakOnRc;
NvBool bLogEvents;
struct KernelChannel *pPreviousChannelInError;
NvBool bGpuUuidLoggedOnce;
KernelWatchdog watchdog;
KernelWatchdogPersistent watchdogPersistent;
@@ -195,9 +196,7 @@ static inline void krcGetMigAttributionForError(struct KernelRc *pKernelRc, NvU3
#define krcGetMigAttributionForError_HAL(pKernelRc, exceptType, pGpuPartitionId, pComputeInstanceId) krcGetMigAttributionForError(pKernelRc, exceptType, pGpuPartitionId, pComputeInstanceId)
static inline struct KernelChannel *krcGetChannelInError_9e2234(struct KernelRc *pKernelRc) {
return ((void *)0);
}
struct KernelChannel *krcGetChannelInError_FWCLIENT(struct KernelRc *pKernelRc);
#ifdef __nvoc_kernel_rc_h_disabled
static inline struct KernelChannel *krcGetChannelInError(struct KernelRc *pKernelRc) {
@@ -205,7 +204,7 @@ static inline struct KernelChannel *krcGetChannelInError(struct KernelRc *pKerne
return NULL;
}
#else //__nvoc_kernel_rc_h_disabled
#define krcGetChannelInError(pKernelRc) krcGetChannelInError_9e2234(pKernelRc)
#define krcGetChannelInError(pKernelRc) krcGetChannelInError_FWCLIENT(pKernelRc)
#endif //__nvoc_kernel_rc_h_disabled
#define krcGetChannelInError_HAL(pKernelRc) krcGetChannelInError(pKernelRc)

7
src/nvidia/generated/g_nv_name_released.h
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@@ -664,6 +664,7 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x1F76, 0x2800, 0x102b, "Matrox D-Series D2450" },
{ 0x1F76, 0x2900, 0x102b, "Matrox D-Series D2480" },
{ 0x1F82, 0x0000, 0x0000, "NVIDIA GeForce GTX 1650" },
{ 0x1F83, 0x0000, 0x0000, "NVIDIA GeForce GTX 1630" },
{ 0x1F91, 0x0000, 0x0000, "NVIDIA GeForce GTX 1650" },
{ 0x1F91, 0x863e, 0x103c, "NVIDIA GeForce GTX 1650 with Max-Q Design" },
{ 0x1F91, 0x86e7, 0x103c, "NVIDIA GeForce GTX 1650 with Max-Q Design" },
@@ -867,8 +868,6 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2233, 0x165a, 0x10de, "NVIDIA RTX A5500" },
{ 0x2233, 0x165a, 0x17aa, "NVIDIA RTX A5500" },
{ 0x2235, 0x145a, 0x10de, "NVIDIA A40" },
{ 0x2236, 0x1482, 0x10de, "NVIDIA A10" },
{ 0x2237, 0x152f, 0x10de, "NVIDIA A10G" },
{ 0x2238, 0x1677, 0x10de, "NVIDIA A10M" },
{ 0x2414, 0x0000, 0x0000, "NVIDIA GeForce RTX 3060 Ti" },
{ 0x2420, 0x0000, 0x0000, "NVIDIA GeForce RTX 3080 Ti Laptop GPU" },
@@ -1410,6 +1409,7 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2235, 0x1686, 0x10DE, "NVIDIA A40-4" },
{ 0x2235, 0x1687, 0x10DE, "NVIDIA A40-6" },
{ 0x2235, 0x1688, 0x10DE, "NVIDIA A40-8" },
{ 0x2235, 0x16e7, 0x10DE, "NVIDIA A40-1" },
{ 0x2236, 0x14b6, 0x10DE, "NVIDIA A10-1B" },
{ 0x2236, 0x14b7, 0x10DE, "NVIDIA A10-2B" },
{ 0x2236, 0x14b8, 0x10DE, "NVIDIA A10-1Q" },
@@ -1432,6 +1432,8 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2236, 0x167e, 0x10DE, "NVIDIA A10-2" },
{ 0x2236, 0x167f, 0x10DE, "NVIDIA A10-3" },
{ 0x2236, 0x1680, 0x10DE, "NVIDIA A10-4" },
{ 0x2236, 0x16e8, 0x10DE, "NVIDIA A10-1" },
{ 0x2237, 0x155a, 0x10DE, "NVIDIA A10G-1" },
{ 0x2237, 0x155b, 0x10DE, "NVIDIA A10G-2" },
{ 0x2237, 0x155c, 0x10DE, "NVIDIA A10G-3" },
{ 0x2237, 0x155d, 0x10DE, "NVIDIA A10G-4" },
@@ -1466,6 +1468,7 @@ static const CHIPS_RELEASED sChipsReleased[] = {
{ 0x2238, 0x16b7, 0x10DE, "NVIDIA A10M-5C" },
{ 0x2238, 0x16b8, 0x10DE, "NVIDIA A10M-10C" },
{ 0x2238, 0x16b9, 0x10DE, "NVIDIA A10M-20C" },
{ 0x2238, 0x16e6, 0x10DE, "NVIDIA A10M-1" },
{ 0x25B6, 0x159d, 0x10DE, "NVIDIA A16-1B" },
{ 0x25B6, 0x159e, 0x10DE, "NVIDIA A16-2B" },
{ 0x25B6, 0x159f, 0x10DE, "NVIDIA A16-1Q" },

12
src/nvidia/generated/g_rpc-structures.h
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@@ -278,6 +278,8 @@ typedef rpc_rc_triggered_v17_02 rpc_rc_triggered_v;
typedef struct rpc_os_error_log_v17_00
{
NvU32 exceptType;
NvU32 runlistId;
NvU32 chid;
char errString[0x100];
} rpc_os_error_log_v17_00;
@@ -1314,6 +1316,16 @@ static vmiopd_fdesc_t vmiopd_fdesc_t_rpc_os_error_log_v17_00[] = {
.offset = NV_OFFSETOF(rpc_os_error_log_v17_00, exceptType),
.name = "exceptType"
},
{
.vtype = vtype_NvU32,
.offset = NV_OFFSETOF(rpc_os_error_log_v17_00, runlistId),
.name = "runlistId"
},
{
.vtype = vtype_NvU32,
.offset = NV_OFFSETOF(rpc_os_error_log_v17_00, chid),
.name = "chid"
},
{
.vtype = vtype_char_array,
.offset = NV_OFFSETOF(rpc_os_error_log_v17_00, errString),

455
src/nvidia/generated/g_subdevice_nvoc.c
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File diff suppressed because it is too large Load Diff

8
src/nvidia/generated/g_subdevice_nvoc.h
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@@ -528,6 +528,7 @@ struct Subdevice {
NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr__)(struct Subdevice *);
NV_STATUS (*__subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr__)(struct Subdevice *, NV2080_CTRL_INTERNAL_NVLINK_GET_SET_NVSWITCH_FABRIC_ADDR_PARAMS *);
NV_STATUS (*__subdeviceCtrlCmdInternalGetPcieP2pCaps__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GET_PCIE_P2P_CAPS_PARAMS *);
NV_STATUS (*__subdeviceCtrlCmdInternalGetCoherentFbApertureSize__)(struct Subdevice *, NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS *);
NV_STATUS (*__subdeviceCtrlCmdGetAvailableHshubMask__)(struct Subdevice *, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *);
NvBool (*__subdeviceShareCallback__)(struct Subdevice *, struct RsClient *, struct RsResourceRef *, RS_SHARE_POLICY *);
NV_STATUS (*__subdeviceMapTo__)(struct Subdevice *, RS_RES_MAP_TO_PARAMS *);
@@ -1008,6 +1009,7 @@ NV_STATUS __nvoc_objCreate_Subdevice(Subdevice**, Dynamic*, NvU32, struct CALL_C
#define subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr(pSubdevice) subdeviceCtrlCmdInternalNvlinkEnableComputePeerAddr_DISPATCH(pSubdevice)
#define subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr(pSubdevice, pParams) subdeviceCtrlCmdInternalNvlinkGetSetNvswitchFabricAddr_DISPATCH(pSubdevice, pParams)
#define subdeviceCtrlCmdInternalGetPcieP2pCaps(pSubdevice, pParams) subdeviceCtrlCmdInternalGetPcieP2pCaps_DISPATCH(pSubdevice, pParams)
#define subdeviceCtrlCmdInternalGetCoherentFbApertureSize(pSubdevice, pParams) subdeviceCtrlCmdInternalGetCoherentFbApertureSize_DISPATCH(pSubdevice, pParams)
#define subdeviceCtrlCmdGetAvailableHshubMask(pSubdevice, pParams) subdeviceCtrlCmdGetAvailableHshubMask_DISPATCH(pSubdevice, pParams)
#define subdeviceShareCallback(pGpuResource, pInvokingClient, pParentRef, pSharePolicy) subdeviceShareCallback_DISPATCH(pGpuResource, pInvokingClient, pParentRef, pSharePolicy)
#define subdeviceMapTo(pResource, pParams) subdeviceMapTo_DISPATCH(pResource, pParams)
@@ -3447,6 +3449,12 @@ static inline NV_STATUS subdeviceCtrlCmdInternalGetPcieP2pCaps_DISPATCH(struct S
return pSubdevice->__subdeviceCtrlCmdInternalGetPcieP2pCaps__(pSubdevice, pParams);
}
NV_STATUS subdeviceCtrlCmdInternalGetCoherentFbApertureSize_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS *pParams);
static inline NV_STATUS subdeviceCtrlCmdInternalGetCoherentFbApertureSize_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_INTERNAL_GET_COHERENT_FB_APERTURE_SIZE_PARAMS *pParams) {
return pSubdevice->__subdeviceCtrlCmdInternalGetCoherentFbApertureSize__(pSubdevice, pParams);
}
NV_STATUS subdeviceCtrlCmdGetAvailableHshubMask_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *pParams);
static inline NV_STATUS subdeviceCtrlCmdGetAvailableHshubMask_DISPATCH(struct Subdevice *pSubdevice, NV2080_CTRL_CMD_HSHUB_GET_AVAILABLE_MASK_PARAMS *pParams) {