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515.48.07

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This commit is contained in:
Andy Ritger
2022-05-27 16:40:24 -07:00
parent af26e1ea89
commit 965db98552
114 changed files with 18493 additions and 22785 deletions
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23
src/common/modeset/timing/nvt_dsc_pps.c
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@@ -84,6 +84,7 @@
#define MAX_BITS_PER_PIXEL 32
// Max HBlank pixel count
#define MAX_HBLANK_PIXELS 7680
#define MHZ_TO_HZ 1000000
/* ------------------------ Datatypes -------------------------------------- */
@@ -1570,12 +1571,26 @@ _validateInput
return NVT_STATUS_INVALID_PARAMETER;
}
if ((pDscInfo->branchCaps.overallThroughputMode0 != 0) &&
(pModesetInfo->pixelClockHz > pDscInfo->branchCaps.overallThroughputMode0 * MHZ_TO_HZ))
{
DSC_Print("ERROR - Pixel clock cannot be greater than Branch DSC Overall Throughput Mode 0");
return NVT_STATUS_INVALID_PARAMETER;
}
if (pModesetInfo->activeWidth == 0)
{
DSC_Print("ERROR - Invalid active width for mode.");
return NVT_STATUS_INVALID_PARAMETER;
}
if (pDscInfo->branchCaps.maxLineBufferWidth != 0 &&
pModesetInfo->activeWidth > pDscInfo->branchCaps.maxLineBufferWidth)
{
DSC_Print("ERROR - Active width cannot be greater than DSC Decompressor max line buffer width");
return NVT_STATUS_INVALID_PARAMETER;
}
if (pModesetInfo->activeHeight == 0)
{
DSC_Print("ERROR - Invalid active height for mode.");
@@ -1919,7 +1934,13 @@ DSC_GeneratePPS
if (*pBitsPerPixelX16 != 0)
{
*pBitsPerPixelX16 = DSC_AlignDownForBppPrecision(*pBitsPerPixelX16, pDscInfo->sinkCaps.bitsPerPixelPrecision);
if (*pBitsPerPixelX16 > in->bits_per_pixel)
// The calculation of in->bits_per_pixel here in PPSlib, which is the maximum bpp that is allowed by available bandwidth,
// which is applicable to DP alone and not to HDMI FRL.
// Before calling PPS lib to generate PPS data, HDMI library has done calculation according to HDMI2.1 spec
// to determine if FRL rate is sufficient for the requested bpp. So restricting the condition to DP alone.
if ((pWARData && (pWARData->connectorType == DSC_DP)) &&
(*pBitsPerPixelX16 > in->bits_per_pixel))
{
DSC_Print("ERROR - Invalid bits per pixel value specified.");
ret = NVT_STATUS_INVALID_PARAMETER;

7
src/common/modeset/timing/nvt_dsc_pps.h
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@@ -196,6 +196,13 @@ typedef struct
NvU32 maxBitsPerPixelX16;
}sinkCaps;
struct BRANCH_DSC_CAPS
{
NvU32 overallThroughputMode0;
NvU32 overallThroughputMode1;
NvU32 maxLineBufferWidth;
}branchCaps;
struct GPU_DSC_CAPS
{
// Mask of all color formats for which encoding supported by GPU

2
src/common/modeset/timing/nvt_edid.c
View File

@@ -2410,7 +2410,7 @@ NvU32 NvTiming_CalculateCommonEDIDCRC32(NvU8* pEDIDBuffer, NvU32 edidVersion)
CommonEDIDBuffer[0x7F] = 0;
CommonEDIDBuffer[0xFF] = 0;
// We also need to zero out any "EDID Other Monitor Descriptors" (http://en.wikipedia.org/wiki/Extended_display_identification_data)
// We also need to zero out any "EDID Other Monitor Descriptors" (https://en.wikipedia.org/wiki/Extended_display_identification_data)
for (edidBufferIndex = 54; edidBufferIndex <= 108; edidBufferIndex += 18)
{
if (CommonEDIDBuffer[edidBufferIndex] == 0 && CommonEDIDBuffer[edidBufferIndex+1] == 0)