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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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590.44.01
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@@ -73,31 +73,22 @@ extern NvBool nvos_is_chipset_io_coherent(void);
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#define NV_PGPROT_UNCACHED_DEVICE(old_prot) pgprot_noncached(old_prot)
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#if defined(NVCPU_AARCH64)
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#define NV_PROT_WRITE_COMBINED_DEVICE (PROT_DEFAULT | PTE_PXN | PTE_UXN | \
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PTE_ATTRINDX(MT_DEVICE_nGnRE))
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#define NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot) \
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__pgprot_modify(old_prot, PTE_ATTRINDX_MASK, NV_PROT_WRITE_COMBINED_DEVICE)
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#define NV_PGPROT_WRITE_COMBINED(old_prot) NV_PGPROT_UNCACHED(old_prot)
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#define NV_PGPROT_READ_ONLY(old_prot) \
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__pgprot_modify(old_prot, 0, PTE_RDONLY)
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#elif defined(NVCPU_X86_64)
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#define NV_PGPROT_UNCACHED_WEAK(old_prot) pgprot_noncached_weak(old_prot)
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#define NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot) \
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pgprot_modify_writecombine(old_prot)
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#define NV_PGPROT_WRITE_COMBINED(old_prot) \
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NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot)
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pgprot_modify_writecombine(old_prot)
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#define NV_PGPROT_READ_ONLY(old_prot) \
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__pgprot(pgprot_val((old_prot)) & ~_PAGE_RW)
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#elif defined(NVCPU_RISCV64)
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#define NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot) \
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#define NV_PGPROT_WRITE_COMBINED(old_prot) \
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pgprot_writecombine(old_prot)
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/* Don't attempt to mark sysmem pages as write combined on riscv */
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#define NV_PGPROT_WRITE_COMBINED(old_prot) old_prot
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#define NV_PGPROT_READ_ONLY(old_prot) \
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__pgprot(pgprot_val((old_prot)) & ~_PAGE_WRITE)
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#else
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/* Writecombine is not supported */
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#undef NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot)
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#undef NV_PGPROT_WRITE_COMBINED(old_prot)
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#define NV_PGPROT_READ_ONLY(old_prot)
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#endif
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