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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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590.44.01
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@@ -146,12 +146,20 @@ static NV_STATUS verify_mapping_info(uvm_va_space_t *va_space,
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// Add the physical offset for peer mappings
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if (uvm_aperture_is_peer(aperture)) {
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if (uvm_parent_gpus_are_direct_connected(memory_mapping_gpu->parent, memory_owning_gpu->parent))
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if (uvm_parent_gpus_are_nvlink_direct_connected(memory_mapping_gpu->parent, memory_owning_gpu->parent))
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phys_offset += memory_owning_gpu->parent->peer_address_info.peer_gpa_memory_window_start;
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else if (uvm_parent_gpus_are_nvswitch_connected(memory_mapping_gpu->parent, memory_owning_gpu->parent))
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phys_offset += memory_owning_gpu->parent->nvswitch_info.fabric_memory_window_start;
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}
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// Add DMA offset for bar1 p2p.
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if (uvm_aperture_is_sys(aperture) && !memory_info->sysmem) {
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uvm_gpu_phys_address_t phys_address = uvm_gpu_peer_phys_address(memory_owning_gpu, memory_info->physAddr, memory_mapping_gpu);
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UVM_ASSERT(uvm_aperture_is_sys(phys_address.aperture));
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phys_offset += (phys_address.address - memory_info->physAddr);
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}
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for (index = 0; index < ext_mapping_info->numWrittenPtes; index++) {
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pte = hal->make_pte(aperture,
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@@ -159,6 +167,16 @@ static NV_STATUS verify_mapping_info(uvm_va_space_t *va_space,
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prot,
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pte_flags);
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if (pte != ext_mapping_info->pteBuffer[index * skip]) {
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UVM_ERR_PRINT("PTE mismatch for %s->%s at %d (aperture: %s) %llx vs. %llx (address: %llx)\n",
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uvm_parent_gpu_name(memory_mapping_gpu->parent),
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uvm_parent_gpu_name(memory_owning_gpu->parent),
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index,
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uvm_aperture_string(aperture),
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pte,
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ext_mapping_info->pteBuffer[index * skip],
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memory_info->physAddr);
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}
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TEST_CHECK_RET(pte == ext_mapping_info->pteBuffer[index * skip]);
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phys_offset += page_size;
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