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https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-02 22:47:25 +00:00
590.44.01
This commit is contained in:
@@ -126,15 +126,15 @@ static uvm_access_counter_buffer_t *parent_gpu_access_counter_buffer_get(uvm_par
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{
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UVM_ASSERT(parent_gpu->access_counters_supported);
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UVM_ASSERT(notif_buf_index < parent_gpu->rm_info.accessCntrBufferCount);
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UVM_ASSERT(parent_gpu->access_counter_buffer);
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UVM_ASSERT(parent_gpu->access_counters.buffer);
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return &parent_gpu->access_counter_buffer[notif_buf_index];
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return &parent_gpu->access_counters.buffer[notif_buf_index];
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}
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static uvm_access_counter_buffer_t *parent_gpu_access_counter_buffer_get_or_null(uvm_parent_gpu_t *parent_gpu,
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NvU32 notif_buf_index)
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{
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if (parent_gpu->access_counter_buffer)
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if (parent_gpu->access_counters.buffer)
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return parent_gpu_access_counter_buffer_get(parent_gpu, notif_buf_index);
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return NULL;
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}
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@@ -221,9 +221,70 @@ static NV_STATUS parent_gpu_clear_tracker_wait(uvm_parent_gpu_t *parent_gpu)
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{
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NV_STATUS status;
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uvm_mutex_lock(&parent_gpu->access_counters_clear_tracker_lock);
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status = uvm_tracker_wait(&parent_gpu->access_counters_clear_tracker);
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uvm_mutex_unlock(&parent_gpu->access_counters_clear_tracker_lock);
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uvm_mutex_lock(&parent_gpu->access_counters.clear_tracker_lock);
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status = uvm_tracker_wait(&parent_gpu->access_counters.clear_tracker);
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uvm_mutex_unlock(&parent_gpu->access_counters.clear_tracker_lock);
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return status;
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}
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static NV_STATUS access_counters_push_begin(uvm_gpu_t *gpu, uvm_push_t *push, uvm_access_counter_clear_op_t clear_op)
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{
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NV_STATUS status;
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uvm_tracker_t *pending_clear_op_tracker = NULL;
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static const char *push_info_msg[2] = { "Clear access counter: batch",
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"Clear access counter: all" };
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if (gpu->parent->access_counters_serialize_clear_ops_by_type) {
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// The following logic only works when we have 2 clear_op options.
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// Otherwise, we must select the pending clear op tracker.
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BUILD_BUG_ON(UVM_ACCESS_COUNTER_CLEAR_OP_COUNT != 2);
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pending_clear_op_tracker = &gpu->parent->access_counters.serialize_clear_tracker[!clear_op];
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// On push_begin (below) success, this lock is released in
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// access_counters_push_end();
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uvm_mutex_lock(&gpu->parent->access_counters.serialize_clear_lock);
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}
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// uvm_push_begin_acquire() is converted to uvm_push_begin() when
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// pending_clear_op_tracker is NULL. Otherwise, it adds a semaphore acquire
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// at the push prologue. The semaphore acquire waits until all pending clear
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// ops are finished before processing the different type clear op. The wait
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// could be none, if there is no pending clear ops in flight.
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status = uvm_push_begin_acquire(gpu->channel_manager,
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UVM_CHANNEL_TYPE_MEMOPS,
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pending_clear_op_tracker,
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push,
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push_info_msg[clear_op]);
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if (status != NV_OK && gpu->parent->access_counters_serialize_clear_ops_by_type)
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uvm_mutex_unlock(&gpu->parent->access_counters.serialize_clear_lock);
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return status;
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}
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static NV_STATUS access_counters_push_end(uvm_push_t *push, uvm_access_counter_clear_op_t clear_op)
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{
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NV_STATUS status = NV_OK;
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uvm_push_end(push);
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if (push->gpu->parent->access_counters_serialize_clear_ops_by_type) {
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uvm_tracker_t *tracker = &push->gpu->parent->access_counters.serialize_clear_tracker[clear_op];
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uvm_tracker_remove_completed(tracker);
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status = uvm_tracker_add_push_safe(tracker, push);
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// This lock is acquired in access_counters_push_begin();
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uvm_mutex_unlock(&push->gpu->parent->access_counters.serialize_clear_lock);
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if (status != NV_OK)
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return status;
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}
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uvm_mutex_lock(&push->gpu->parent->access_counters.clear_tracker_lock);
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uvm_tracker_remove_completed(&push->gpu->parent->access_counters.clear_tracker);
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status = uvm_tracker_add_push_safe(&push->gpu->parent->access_counters.clear_tracker, push);
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uvm_mutex_unlock(&push->gpu->parent->access_counters.clear_tracker_lock);
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return status;
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}
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@@ -235,28 +296,19 @@ static NV_STATUS access_counter_clear_all(uvm_gpu_t *gpu, uvm_access_counter_buf
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NV_STATUS status;
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uvm_push_t push;
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status = uvm_push_begin(gpu->channel_manager,
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UVM_CHANNEL_TYPE_MEMOPS,
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&push,
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"Clear access counter: all");
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status = access_counters_push_begin(gpu, &push, UVM_ACCESS_COUNTER_CLEAR_OP_ALL);
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if (status != NV_OK) {
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UVM_ERR_PRINT("Error creating push to clear access counters: %s, GPU %s, notif buf index %u\n",
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nvstatusToString(status),
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uvm_gpu_name(gpu),
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access_counters->index);
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return status;
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}
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gpu->parent->host_hal->access_counter_clear_all(&push);
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uvm_push_end(&push);
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uvm_mutex_lock(&gpu->parent->access_counters_clear_tracker_lock);
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uvm_tracker_remove_completed(&gpu->parent->access_counters_clear_tracker);
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status = uvm_tracker_add_push_safe(&gpu->parent->access_counters_clear_tracker, &push);
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uvm_mutex_unlock(&gpu->parent->access_counters_clear_tracker_lock);
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return status;
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return access_counters_push_end(&push, UVM_ACCESS_COUNTER_CLEAR_OP_ALL);
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}
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// Clear the access counter notifications and add it to the per-GPU clear
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@@ -277,26 +329,20 @@ static NV_STATUS access_counter_clear_notifications(uvm_gpu_t *gpu,
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UVM_ASSERT(clear_op == UVM_ACCESS_COUNTER_CLEAR_OP_TARGETED);
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status = uvm_push_begin(gpu->channel_manager, UVM_CHANNEL_TYPE_MEMOPS, &push, "Clear access counter batch");
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status = access_counters_push_begin(gpu, &push, UVM_ACCESS_COUNTER_CLEAR_OP_TARGETED);
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if (status != NV_OK) {
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UVM_ERR_PRINT("Error creating push to clear access counters: %s, GPU %s, notif buf index %u\n",
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nvstatusToString(status),
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uvm_gpu_name(gpu),
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access_counters->index);
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return status;
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}
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for (i = 0; i < num_notifications; i++)
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gpu->parent->host_hal->access_counter_clear_targeted(&push, notification_start[i]);
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uvm_push_end(&push);
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uvm_mutex_lock(&gpu->parent->access_counters_clear_tracker_lock);
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uvm_tracker_remove_completed(&gpu->parent->access_counters_clear_tracker);
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status = uvm_tracker_add_push_safe(&gpu->parent->access_counters_clear_tracker, &push);
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uvm_mutex_unlock(&gpu->parent->access_counters_clear_tracker_lock);
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return status;
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return access_counters_push_end(&push, UVM_ACCESS_COUNTER_CLEAR_OP_TARGETED);
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}
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bool uvm_parent_gpu_access_counters_pending(uvm_parent_gpu_t *parent_gpu, NvU32 index)
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@@ -603,7 +649,7 @@ NV_STATUS uvm_gpu_access_counters_enable(uvm_gpu_t *gpu, uvm_va_space_t *va_spac
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UVM_ASSERT(gpu->parent->access_counters_supported);
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uvm_mutex_lock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_lock(&gpu->parent->access_counters.enablement_lock);
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if (uvm_parent_processor_mask_test(&va_space->access_counters_enabled_processors, gpu->parent->id)) {
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status = NV_OK;
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@@ -631,7 +677,7 @@ NV_STATUS uvm_gpu_access_counters_enable(uvm_gpu_t *gpu, uvm_va_space_t *va_spac
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uvm_parent_processor_mask_set_atomic(&va_space->access_counters_enabled_processors, gpu->parent->id);
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}
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uvm_mutex_unlock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_unlock(&gpu->parent->access_counters.enablement_lock);
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return status;
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@@ -646,7 +692,7 @@ cleanup:
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uvm_access_counters_isr_unlock(access_counters);
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}
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uvm_mutex_unlock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_unlock(&gpu->parent->access_counters.enablement_lock);
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return status;
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}
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@@ -703,7 +749,7 @@ void uvm_gpu_access_counters_disable(uvm_gpu_t *gpu, uvm_va_space_t *va_space)
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UVM_ASSERT(gpu->parent->access_counters_supported);
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uvm_mutex_lock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_lock(&gpu->parent->access_counters.enablement_lock);
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if (uvm_parent_processor_mask_test_and_clear_atomic(&va_space->access_counters_enabled_processors,
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gpu->parent->id)) {
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@@ -719,7 +765,7 @@ void uvm_gpu_access_counters_disable(uvm_gpu_t *gpu, uvm_va_space_t *va_space)
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}
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}
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uvm_mutex_unlock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_unlock(&gpu->parent->access_counters.enablement_lock);
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}
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static void write_get(uvm_access_counter_buffer_t *access_counters, NvU32 get)
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@@ -2054,7 +2100,7 @@ NV_STATUS uvm_test_reconfigure_access_counters(UVM_TEST_RECONFIGURE_ACCESS_COUNT
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goto exit_release_gpu;
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}
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uvm_mutex_lock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_lock(&gpu->parent->access_counters.enablement_lock);
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for (notif_buf_index = 0; notif_buf_index < gpu->parent->rm_info.accessCntrBufferCount; notif_buf_index++) {
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uvm_access_counter_buffer_t *access_counters = parent_gpu_access_counter_buffer_get(gpu->parent,
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@@ -2072,7 +2118,7 @@ NV_STATUS uvm_test_reconfigure_access_counters(UVM_TEST_RECONFIGURE_ACCESS_COUNT
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uvm_parent_processor_mask_set_atomic(&va_space->access_counters_enabled_processors, gpu->parent->id);
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exit_ac_lock:
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uvm_mutex_unlock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_unlock(&gpu->parent->access_counters.enablement_lock);
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exit_release_gpu:
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uvm_gpu_release(gpu);
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@@ -2101,15 +2147,15 @@ NV_STATUS uvm_test_reset_access_counters(UVM_TEST_RESET_ACCESS_COUNTERS_PARAMS *
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goto exit_release_gpu;
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}
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uvm_mutex_lock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_lock(&gpu->parent->access_counters.enablement_lock);
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// Access counters not enabled. Nothing to reset
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if (!uvm_parent_processor_mask_test(&va_space->access_counters_enabled_processors, gpu->parent->id)) {
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uvm_mutex_unlock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_unlock(&gpu->parent->access_counters.enablement_lock);
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goto exit_release_gpu;
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}
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uvm_mutex_unlock(&gpu->parent->access_counters_enablement_lock);
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uvm_mutex_unlock(&gpu->parent->access_counters.enablement_lock);
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// Clear operations affect all notification buffers, we use the
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// notif_buf_index = 0;
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@@ -2233,10 +2279,10 @@ NV_STATUS uvm_test_query_access_counters(UVM_TEST_QUERY_ACCESS_COUNTERS_PARAMS *
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goto exit_release_gpu;
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}
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buffer_size = gpu->parent->access_counter_buffer[0].rm_info.bufferSize;
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buffer_size = gpu->parent->access_counters.buffer[0].rm_info.bufferSize;
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for (index = 1; index < gpu->parent->rm_info.accessCntrBufferCount; index++)
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UVM_ASSERT(gpu->parent->access_counter_buffer[index].rm_info.bufferSize == buffer_size);
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UVM_ASSERT(gpu->parent->access_counters.buffer[index].rm_info.bufferSize == buffer_size);
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params->num_notification_buffers = gpu->parent->rm_info.accessCntrBufferCount;
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params->num_notification_entries = buffer_size / gpu->parent->access_counter_buffer_hal->entry_size(gpu->parent);
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