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https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-02-20 06:53:58 +00:00
590.44.01
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@@ -147,40 +147,6 @@ typedef struct
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NV_STATUS rmStatus; // OUT
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} UVM_SET_STREAM_STOPPED_PARAMS;
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//
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// UvmCallTestFunction
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//
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#define UVM_RUN_TEST UVM_IOCTL_BASE(9)
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typedef struct
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{
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NvProcessorUuid gpuUuid; // IN
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NvU32 test; // IN
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struct
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{
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NvProcessorUuid peerGpuUuid; // IN
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NvU32 peerId; // IN
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} multiGpu;
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NV_STATUS rmStatus; // OUT
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} UVM_RUN_TEST_PARAMS;
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//
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// This is a magic offset for mmap. Any mapping of an offset above this
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// threshold will be treated as a counters mapping, not as an allocation
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// mapping. Since allocation offsets must be identical to the virtual address
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// of the mapping, this threshold has to be an offset that cannot be
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// a valid virtual address.
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//
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#if defined(__linux__)
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#if defined(NV_64_BITS)
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#define UVM_EVENTS_OFFSET_BASE (1UL << 63)
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#define UVM_COUNTERS_OFFSET_BASE (1UL << 62)
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#else
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#define UVM_EVENTS_OFFSET_BASE (1UL << 31)
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#define UVM_COUNTERS_OFFSET_BASE (1UL << 30)
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#endif
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#endif // defined(__linux___)
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//
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// UvmAddSession
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//
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@@ -189,27 +155,9 @@ typedef struct
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typedef struct
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{
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NvU32 pidTarget; // IN
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#ifdef __linux__
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NvP64 countersBaseAddress NV_ALIGN_BYTES(8); // IN
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NvS32 sessionIndex; // OUT (session index that got added)
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#endif
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NV_STATUS rmStatus; // OUT
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} UVM_ADD_SESSION_PARAMS;
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//
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// UvmRemoveSession
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//
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#define UVM_REMOVE_SESSION UVM_IOCTL_BASE(11)
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typedef struct
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{
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#ifdef __linux__
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NvS32 sessionIndex; // IN (session index to be removed)
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#endif
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NV_STATUS rmStatus; // OUT
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} UVM_REMOVE_SESSION_PARAMS;
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#define UVM_MAX_COUNTERS_PER_IOCTL_CALL 32
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//
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@@ -219,9 +167,6 @@ typedef struct
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typedef struct
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{
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#ifdef __linux__
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NvS32 sessionIndex; // IN
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#endif
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UvmCounterConfig config[UVM_MAX_COUNTERS_PER_IOCTL_CALL]; // IN
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NvU32 count; // IN
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NV_STATUS rmStatus; // OUT
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@@ -234,9 +179,6 @@ typedef struct
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typedef struct
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{
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#ifdef __linux__
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NvS32 sessionIndex; // IN
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#endif
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NvU32 scope; // IN (UvmCounterScope)
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NvU32 counterName; // IN (UvmCounterName)
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NvProcessorUuid gpuUuid; // IN
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@@ -251,15 +193,10 @@ typedef struct
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typedef struct
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{
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#ifdef __linux__
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NvS32 sessionIndex; // IN
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#endif
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NvU32 eventQueueIndex; // OUT
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NvU64 queueSize NV_ALIGN_BYTES(8); // IN
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NvU64 notificationCount NV_ALIGN_BYTES(8); // IN
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#if defined(WIN32) || defined(WIN64)
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NvU64 notificationHandle NV_ALIGN_BYTES(8); // IN
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#endif
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NvU32 timeStampType; // IN (UvmEventTimeStampType)
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NV_STATUS rmStatus; // OUT
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} UVM_CREATE_EVENT_QUEUE_PARAMS;
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@@ -271,9 +208,6 @@ typedef struct
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typedef struct
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{
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#ifdef __linux__
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NvS32 sessionIndex; // IN
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#endif
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NvU32 eventQueueIndex; // IN
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NV_STATUS rmStatus; // OUT
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} UVM_REMOVE_EVENT_QUEUE_PARAMS;
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@@ -285,9 +219,6 @@ typedef struct
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typedef struct
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{
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#ifdef __linux__
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NvS32 sessionIndex; // IN
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#endif
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NvU32 eventQueueIndex; // IN
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NvP64 userRODataAddr NV_ALIGN_BYTES(8); // IN
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NvP64 userRWDataAddr NV_ALIGN_BYTES(8); // IN
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@@ -304,39 +235,12 @@ typedef struct
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typedef struct
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{
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#ifdef __linux__
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NvS32 sessionIndex; // IN
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#endif
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NvU32 eventQueueIndex; // IN
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NvS32 eventType; // IN
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NvU32 enable; // IN
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NV_STATUS rmStatus; // OUT
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} UVM_EVENT_CTRL_PARAMS;
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//
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// UvmRegisterMpsServer
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//
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#define UVM_REGISTER_MPS_SERVER UVM_IOCTL_BASE(18)
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typedef struct
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{
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NvProcessorUuid gpuUuidArray[UVM_MAX_GPUS_V1]; // IN
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NvU32 numGpus; // IN
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NvU64 serverId NV_ALIGN_BYTES(8); // OUT
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NV_STATUS rmStatus; // OUT
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} UVM_REGISTER_MPS_SERVER_PARAMS;
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//
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// UvmRegisterMpsClient
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//
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#define UVM_REGISTER_MPS_CLIENT UVM_IOCTL_BASE(19)
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typedef struct
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{
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NvU64 serverId NV_ALIGN_BYTES(8); // IN
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NV_STATUS rmStatus; // OUT
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} UVM_REGISTER_MPS_CLIENT_PARAMS;
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//
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// UvmEventGetGpuUuidTable
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//
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@@ -442,7 +346,6 @@ typedef struct
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typedef struct
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{
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NvProcessorUuid gpuUuid; // IN
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NvHandle hClient; // IN
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NvHandle hChannel; // IN
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NV_STATUS rmStatus; // OUT
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@@ -510,7 +413,6 @@ typedef struct
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typedef struct
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{
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NvU64 base NV_ALIGN_BYTES(8); // IN
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NvU64 length NV_ALIGN_BYTES(8); // IN
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NV_STATUS rmStatus; // OUT
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} UVM_FREE_PARAMS;
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@@ -1128,8 +1030,8 @@ typedef struct
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typedef struct
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{
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NvU64 base NV_ALIGN_BYTES(8); // IN
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NvU64 length; // IN
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NvU64 flags; // IN
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NvU64 length NV_ALIGN_BYTES(8); // IN
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NvU64 flags NV_ALIGN_BYTES(8); // IN
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NV_STATUS rmStatus; // OUT
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} UVM_DISCARD_PARAMS;
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