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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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590.44.01
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@@ -174,6 +174,34 @@ static void uvm_pmm_list_zero_checks(void)
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BUILD_BUG_ON(UVM_PMM_LIST_ZERO_COUNT > 2);
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}
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// Lists for allocated root chunks. When picking a root chunk to evict, lists
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// with lower numerical order are checked first.
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typedef enum
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{
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// Root chunks unused by VA blocks, i.e. allocated, but not holding any
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// resident pages. These take priority when evicting as no data needs to be
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// migrated for them to be evicted.
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//
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// For simplicity, the list is approximate, tracking unused chunks only from
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// root chunk sized (2M) VA blocks.
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//
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// Updated by the VA block code with uvm_pmm_gpu_mark_root_chunk_(un)used().
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UVM_PMM_ALLOC_LIST_UNUSED,
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// Discarded root GPU chunks, which are still resident on the GPU. Chunks on
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// this list are evicted with a lower priority than unused chunks because we
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// expect some of them to get reverted to used pages.
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//
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// Updated by the VA block code with
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// uvm_pmm_gpu_mark_root_chunk_discarded().
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UVM_PMM_ALLOC_LIST_DISCARDED,
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// Root chunks used by VA blocks, likely with resident pages.
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UVM_PMM_ALLOC_LIST_USED,
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UVM_PMM_ALLOC_LIST_COUNT
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} uvm_pmm_alloc_list_t;
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// Maximum chunk sizes per type of allocation in single GPU.
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// The worst case today is Maxwell with 4 allocations sizes for page tables and
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// 2 page sizes used by uvm_mem_t. Notably one of the allocations for page
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@@ -277,7 +305,7 @@ struct uvm_gpu_chunk_struct
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size_t log2_size : order_base_2(UVM_CHUNK_SIZE_MASK_SIZE);
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// Start page index within va_block
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// Start page index within va_block.
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uvm_page_index_t va_block_page_index : order_base_2(PAGES_PER_UVM_VA_BLOCK + 1);
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// This allows determining what PMM owns the chunk. Users of this field
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@@ -348,30 +376,12 @@ typedef struct uvm_pmm_gpu_struct
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// Bit locks for the root chunks with 1 bit per each root chunk
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uvm_bit_locks_t bitlocks;
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// List of root chunks unused by VA blocks, i.e. allocated, but not
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// holding any resident pages. These take priority when evicting as no
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// data needs to be migrated for them to be evicted.
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//
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// For simplicity, the list is approximate, tracking unused chunks only
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// from root chunk sized (2M) VA blocks.
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//
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// Updated by the VA block code with
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// uvm_pmm_gpu_mark_root_chunk_(un)used().
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struct list_head va_block_unused;
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// List of discarded root GPU chunks, which are still mapped on the GPU.
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// Chunks on this list are evicted with a lower priority than unused chunks.
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//
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// Updated by the VA block code with
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// uvm_pmm_gpu_mark_root_chunk_discarded().
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struct list_head va_block_discarded;
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// List of root chunks used by VA blocks
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struct list_head va_block_used;
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// LRU lists for picking which root chunks to evict
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struct list_head alloc_list[UVM_PMM_ALLOC_LIST_COUNT];
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// List of chunks needing to be lazily freed and a queue for processing
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// the list. TODO: Bug 3881835: revisit whether to use nv_kthread_q_t
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// or workqueue.
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// the list. TODO: Bug 3881835: revisit whether to use nv_kthread_q_t or
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// workqueue.
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struct list_head va_block_lazy_free;
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nv_kthread_q_item_t va_block_lazy_free_q_item;
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} root_chunks;
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@@ -612,21 +622,6 @@ static uvm_chunk_size_t uvm_chunk_find_prev_size(uvm_chunk_sizes_mask_t chunk_si
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return (uvm_chunk_size_t)1 << __fls(chunk_sizes);
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}
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// Obtain the {va_block, virt_addr} information for the chunks in the given
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// [phys_addr:phys_addr + region_size) range. One entry per chunk is returned.
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// phys_addr and region_size must be page-aligned.
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//
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// Valid translations are written to out_mappings sequentially (there are no
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// gaps). The caller is required to provide enough entries in out_pages for the
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// whole region. The function returns the number of entries written to
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// out_mappings.
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//
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// The returned reverse map is a snapshot: it is stale as soon as it is
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// returned, and the caller is responsible for locking the VA block(s) and
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// checking that the chunks are still there. Also, the VA block(s) are
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// retained, and it's up to the caller to release them.
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NvU32 uvm_pmm_gpu_phys_to_virt(uvm_pmm_gpu_t *pmm, NvU64 phys_addr, NvU64 region_size, uvm_reverse_map_t *out_mappings);
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// Iterates over every size in the input mask from smallest to largest
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#define for_each_chunk_size(__size, __chunk_sizes) \
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for ((__size) = (__chunk_sizes) ? uvm_chunk_find_first_size(__chunk_sizes) : \
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@@ -653,4 +648,6 @@ NvU32 uvm_pmm_gpu_phys_to_virt(uvm_pmm_gpu_t *pmm, NvU64 phys_addr, NvU64 region
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for (; (__size) != UVM_CHUNK_SIZE_INVALID; \
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(__size) = uvm_chunk_find_prev_size((__chunk_sizes), (__size)))
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NV_STATUS uvm_test_pmm_get_alloc_list(UVM_TEST_PMM_GET_ALLOC_LIST_PARAMS *params, struct file *filp);
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#endif
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