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This commit is contained in:
Maneet Singh
2025-12-02 15:32:25 -08:00
parent 2af9f1f0f7
commit a5bfb10e75
954 changed files with 421883 additions and 408177 deletions
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61
kernel-open/nvidia-uvm/uvm_test_ioctl.h
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@@ -1009,26 +1009,26 @@ typedef struct
} UVM_TEST_CHECK_CHANNEL_VA_SPACE_PARAMS;
//
// UvmTestEnableNvlinkPeerAccess
// UvmTestEnableStaticPeerAccess
//
#define UVM_TEST_ENABLE_NVLINK_PEER_ACCESS UVM_TEST_IOCTL_BASE(60)
#define UVM_TEST_ENABLE_STATIC_PEER_ACCESS UVM_TEST_IOCTL_BASE(60)
typedef struct
{
NvProcessorUuid gpuUuidA; // IN
NvProcessorUuid gpuUuidB; // IN
NV_STATUS rmStatus; // OUT
} UVM_TEST_ENABLE_NVLINK_PEER_ACCESS_PARAMS;
} UVM_TEST_ENABLE_STATIC_PEER_ACCESS_PARAMS;
//
// UvmTestDisableNvlinkPeerAccess
// UvmTestDisableStaticPeerAccess
//
#define UVM_TEST_DISABLE_NVLINK_PEER_ACCESS UVM_TEST_IOCTL_BASE(61)
#define UVM_TEST_DISABLE_STATIC_PEER_ACCESS UVM_TEST_IOCTL_BASE(61)
typedef struct
{
NvProcessorUuid gpuUuidA; // IN
NvProcessorUuid gpuUuidB; // IN
NV_STATUS rmStatus; // OUT
} UVM_TEST_DISABLE_NVLINK_PEER_ACCESS_PARAMS;
} UVM_TEST_DISABLE_STATIC_PEER_ACCESS_PARAMS;
typedef enum
{
@@ -1058,16 +1058,6 @@ typedef struct
NV_STATUS rmStatus; // Out
} UVM_TEST_SET_PAGE_THRASHING_POLICY_PARAMS;
#define UVM_TEST_PMM_REVERSE_MAP UVM_TEST_IOCTL_BASE(65)
typedef struct
{
NvProcessorUuid gpu_uuid; // In
NvU64 range_address1 NV_ALIGN_BYTES(8); // In
NvU64 range_address2 NV_ALIGN_BYTES(8); // In
NvU64 range_size2 NV_ALIGN_BYTES(8); // In
NV_STATUS rmStatus; // Out
} UVM_TEST_PMM_REVERSE_MAP_PARAMS;
// Calls uvm_va_space_mm_retain on a VA space, operates on the mm, optionally
// sleeps for a while, then releases the va_space_mm and returns. The idea is to
// simulate retaining a va_space_mm from a thread like the GPU fault handler
@@ -1289,8 +1279,7 @@ typedef enum
UVM_TEST_PAGEABLE_MEM_ACCESS_TYPE_MMU_NOTIFIER,
UVM_TEST_PAGEABLE_MEM_ACCESS_TYPE_HMM,
UVM_TEST_PAGEABLE_MEM_ACCESS_TYPE_ATS_KERNEL,
UVM_TEST_PAGEABLE_MEM_ACCESS_TYPE_ATS_DRIVER,
UVM_TEST_PAGEABLE_MEM_ACCESS_TYPE_ATS,
UVM_TEST_PAGEABLE_MEM_ACCESS_TYPE_COUNT
} UVM_TEST_PAGEABLE_MEM_ACCESS_TYPE;
@@ -1555,28 +1544,42 @@ typedef struct
#define UVM_TEST_VA_BLOCK_DISCARD_STATUS UVM_TEST_IOCTL_BASE(110)
typedef struct
{
NvU64 lookup_address; // In
NvU64 lookup_address NV_ALIGN_BYTES(8); // In
NvBool discarded; // Out
NV_STATUS rmStatus; // Out
} UVM_TEST_VA_BLOCK_DISCARD_STATUS_PARAMS;
// Keep this in sync with uvm_pmm_alloc_list_t in uvm_pmm_gpu.h
typedef enum
{
UVM_TEST_VA_BLOCK_DISCARD_PMM_STATE_INVALID = 0,
UVM_TEST_VA_BLOCK_DISCARD_PMM_STATE_UNUSED,
UVM_TEST_VA_BLOCK_DISCARD_PMM_STATE_DISCARDED,
UVM_TEST_VA_BLOCK_DISCARD_PMM_STATE_USED,
UVM_TEST_VA_BLOCK_DISCARD_PMM_STATE_COUNT
} UVM_TEST_VA_BLOCK_DISCARD_PMM_STATE;
UVM_TEST_PMM_ALLOC_LIST_UNUSED = 0,
UVM_TEST_PMM_ALLOC_LIST_DISCARDED,
UVM_TEST_PMM_ALLOC_LIST_USED,
UVM_TEST_PMM_ALLOC_LIST_COUNT
} UVM_TEST_PMM_ALLOC_LIST_TYPE;
#define UVM_TEST_VA_BLOCK_DISCARD_CHECK_PMM_STATE UVM_TEST_IOCTL_BASE(111)
#define UVM_TEST_PMM_GET_ALLOC_LIST UVM_TEST_IOCTL_BASE(111)
typedef struct
{
NvU64 address; // In
NvU64 address NV_ALIGN_BYTES(8); // In
NvProcessorUuid gpu_uuid; // In
UVM_TEST_VA_BLOCK_DISCARD_PMM_STATE state; // Out
NvU32 list_type; // Out (UVM_TEST_PMM_ALLOC_LIST_TYPE)
// NV_ERR_INVALID_STATE if there is no chunk, or if the chunk is not on any
// of the allocated lists.
NV_STATUS rmStatus; // Out
} UVM_TEST_VA_BLOCK_DISCARD_CHECK_PMM_STATE_PARAMS;
} UVM_TEST_PMM_GET_ALLOC_LIST_PARAMS;
#define UVM_TEST_DUMP_ACCESS_BITS UVM_TEST_IOCTL_BASE(112)
typedef struct
{
NvProcessorUuid gpu_uuid; // In
NvU64 mode; // In
NvU64 granularity_size_kb; // Out
NvU64* current_bits; // Out
NvU64 current_bits_length; // Out
NV_STATUS rmStatus; // Out
} UVM_TEST_DUMP_ACCESS_BITS_PARAMS;
#ifdef __cplusplus
}