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545.23.06
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@@ -2683,7 +2683,7 @@ static void init_channel_manager_conf(uvm_channel_manager_t *manager)
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// caches vidmem (and sysmem), we place GPFIFO and GPPUT on sysmem to avoid
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// cache thrash. The memory access latency is reduced, despite the required
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// access through the bus, because no cache coherence message is exchanged.
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if (uvm_gpu_is_coherent(gpu->parent)) {
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if (uvm_parent_gpu_is_coherent(gpu->parent)) {
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manager->conf.gpfifo_loc = UVM_BUFFER_LOCATION_SYS;
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// On GPUs with limited ESCHED addressing range, e.g., Volta on P9, RM
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