From c273d84a8b2bb63cf35c7219a212423ef35a2cb3 Mon Sep 17 00:00:00 2001 From: russellcnv Date: Thu, 22 Jan 2026 14:46:29 -0800 Subject: [PATCH] 580.94.16 --- README.md | 24 +- kernel-open/Kbuild | 2 +- kernel-open/common/inc/nv-linux.h | 16 +- kernel-open/common/inc/nv-mm.h | 30 +- kernel-open/common/inc/nv.h | 2 +- kernel-open/conftest.sh | 163 +- kernel-open/nvidia-drm/nvidia-drm-sources.mk | 2 +- kernel-open/nvidia-uvm/nvidia-uvm.Kbuild | 2 + kernel-open/nvidia-uvm/uvm_hmm.c | 12 +- kernel-open/nvidia-uvm/uvm_pmm_gpu.c | 35 +- .../nvidia-uvm/uvm_populate_pageable.c | 8 + kernel-open/nvidia/nv-dma.c | 4 + kernel-open/nvidia/nv-dmabuf.c | 37 +- kernel-open/nvidia/nv-mmap.c | 18 +- kernel-open/nvidia/nv-pci.c | 18 +- kernel-open/nvidia/nv-procfs.c | 2 +- kernel-open/nvidia/nv.c | 44 +- kernel-open/nvidia/nvidia.Kbuild | 5 +- src/common/inc/nvBldVer.h | 16 +- src/common/inc/nvUnixVersion.h | 2 +- src/common/inc/nvVer.h | 2 +- .../swref/published/blackwell/gb100/dev_fb.h | 34 + .../blackwell/gb100/dev_gc6_island.h | 31 + .../blackwell/gb100/dev_gc6_island_addendum.h | 29 + src/common/modeset/timing/nvt_edid.c | 2 + src/common/modeset/timing/nvt_edidext_861.c | 37 +- src/common/modeset/timing/nvtiming_pvt.h | 1 + .../inband/interface/nvlink_inband_msg.h | 13 +- .../sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h | 48 + .../nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h | 6 + src/nvidia/arch/nvalloc/unix/include/nv.h | 2 +- src/nvidia/arch/nvalloc/unix/src/os.c | 8 +- ...a_kgspGetBinArchiveConcatenatedFMC_GB100.c | 24402 +++---- ...a_kgspGetBinArchiveConcatenatedFMC_GB202.c | 32114 ++++----- ...bindata_kgspGetBinArchiveGspRmBoot_GB100.c | 49332 +++++++------- ...bindata_kgspGetBinArchiveGspRmBoot_GB202.c | 53812 ++++++++-------- ...tBinArchiveGspRmCcFmcGfwProdSigned_GB100.c | 24426 +++---- ...tBinArchiveGspRmCcFmcGfwProdSigned_GB202.c | 32138 ++++----- ...etBinArchiveGspRmFmcGfwDebugSigned_GB100.c | 24668 +++---- ...etBinArchiveGspRmFmcGfwDebugSigned_GB202.c | 26908 ++++---- ...GetBinArchiveGspRmFmcGfwProdSigned_GB100.c | 24714 +++---- ...GetBinArchiveGspRmFmcGfwProdSigned_GB202.c | 26954 ++++---- src/nvidia/generated/g_client_nvoc.h | 1 + src/nvidia/generated/g_gpu_class_list.c | 60 +- src/nvidia/generated/g_kern_bus_nvoc.h | 2 + src/nvidia/generated/g_kern_mem_sys_nvoc.c | 18 +- src/nvidia/generated/g_kern_mem_sys_nvoc.h | 41 +- src/nvidia/generated/g_nv_name_released.h | 18 +- src/nvidia/generated/g_os_nvoc.h | 1 + src/nvidia/generated/g_rpc-message-header.h | 2 +- src/nvidia/generated/g_rpc-structures.h | 2 +- src/nvidia/generated/g_sdk-structures.h | 2 +- src/nvidia/generated/g_subdevice_nvoc.c | 502 +- src/nvidia/generated/g_subdevice_nvoc.h | 24 + .../gpu/fsp/arch/hopper/kern_fsp_gh100.c | 2 - src/nvidia/src/kernel/gpu/gpu_fabric_probe.c | 4 +- .../gpu/gsp/arch/turing/kernel_gsp_tu102.c | 7 +- src/nvidia/src/kernel/gpu/mem_mgr/heap.c | 10 - .../src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c | 15 + .../arch/blackwell/kern_mem_sys_gb100.c | 53 + .../mem_sys/arch/volta/kern_mem_sys_gv100.c | 8 +- .../src/kernel/gpu/mem_sys/kern_mem_sys.c | 65 +- .../gpu/subdevice/subdevice_ctrl_gpu_kernel.c | 32 +- src/nvidia/src/kernel/os/os_init.c | 6 +- src/nvidia/src/kernel/rmapi/client.c | 1 + src/nvidia/src/kernel/rmapi/nv_gpu_ops.c | 2 +- src/nvidia/src/kernel/vgpu/rpc.c | 1 - version.mk | 4 +- 68 files changed, 160855 insertions(+), 160151 deletions(-) create mode 100644 src/common/inc/swref/published/blackwell/gb100/dev_fb.h create mode 100644 src/common/inc/swref/published/blackwell/gb100/dev_gc6_island.h create mode 100644 src/common/inc/swref/published/blackwell/gb100/dev_gc6_island_addendum.h diff --git a/README.md b/README.md index 13e985d43..e2b5c9c07 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ # NVIDIA Linux Open GPU Kernel Module Source This is the source release of the NVIDIA Linux open GPU kernel modules, -version 580.94.13. +version 580.94.16. ## How to Build @@ -17,7 +17,7 @@ as root: Note that the kernel modules built here must be used with GSP firmware and user-space NVIDIA GPU driver components from a corresponding -580.94.13 driver release. This can be achieved by installing +580.94.16 driver release. This can be achieved by installing the NVIDIA GPU driver from the .run file using the `--no-kernel-modules` option. E.g., @@ -185,7 +185,7 @@ table below). For details on feature support and limitations, see the NVIDIA GPU driver end user README here: -https://us.download.nvidia.com/XFree86/Linux-x86_64/580.94.13/README/kernel_open.html +https://us.download.nvidia.com/XFree86/Linux-x86_64/580.94.16/README/kernel_open.html For vGPU support, please refer to the README.vgpu packaged in the vGPU Host Package for more details. @@ -749,7 +749,6 @@ Subsystem Device ID. | NVIDIA A10 | 2236 10DE 1482 | | NVIDIA A10G | 2237 10DE 152F | | NVIDIA A10M | 2238 10DE 1677 | -| NVIDIA H20 NVL16 | 230E 10DE 20DF | | NVIDIA H100 NVL | 2321 10DE 1839 | | NVIDIA H800 PCIe | 2322 10DE 17A4 | | NVIDIA H800 | 2324 10DE 17A6 | @@ -950,28 +949,21 @@ Subsystem Device ID. | NVIDIA GB200 | 2941 10DE 20D5 | | NVIDIA GB200 | 2941 10DE 21C9 | | NVIDIA GB200 | 2941 10DE 21CA | -| NVIDIA DRIVE P2021 | 29BB 10DE 207C | | NVIDIA GeForce RTX 5090 | 2B85 | | NVIDIA GeForce RTX 5090 D | 2B87 | -| NVIDIA GeForce RTX 5090 D v2 | 2B8C | +| NVIDIA GeForce RTX 5090 D v2 | 2B8C 17AA 530C | | NVIDIA RTX PRO 6000 Blackwell Workstation Edition | 2BB1 1028 204B | | NVIDIA RTX PRO 6000 Blackwell Workstation Edition | 2BB1 103C 204B | | NVIDIA RTX PRO 6000 Blackwell Workstation Edition | 2BB1 10DE 204B | | NVIDIA RTX PRO 6000 Blackwell Workstation Edition | 2BB1 17AA 204B | | NVIDIA RTX PRO 5000 Blackwell | 2BB3 1028 204D | -| NVIDIA RTX PRO 5000 72GB Blackwell | 2BB3 1028 227A | | NVIDIA RTX PRO 5000 Blackwell | 2BB3 103C 204D | -| NVIDIA RTX PRO 5000 72GB Blackwell | 2BB3 103C 227A | | NVIDIA RTX PRO 5000 Blackwell | 2BB3 10DE 204D | -| NVIDIA RTX PRO 5000 72GB Blackwell | 2BB3 10DE 227A | | NVIDIA RTX PRO 5000 Blackwell | 2BB3 17AA 204D | -| NVIDIA RTX PRO 5000 72GB Blackwell | 2BB3 17AA 227A | | NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition | 2BB4 1028 204C | | NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition | 2BB4 103C 204C | | NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition | 2BB4 10DE 204C | | NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition | 2BB4 17AA 204C | -| NVIDIA RTX PRO 6000 Blackwell Server Edition | 2BB5 10DE 204E | -| NVIDIA RTX 6000D | 2BB9 10DE 2091 | | NVIDIA GeForce RTX 5080 | 2C02 | | NVIDIA GeForce RTX 5070 Ti | 2C05 | | NVIDIA GeForce RTX 5090 Laptop GPU | 2C18 | @@ -982,7 +974,6 @@ Subsystem Device ID. | NVIDIA RTX PRO 4500 Blackwell | 2C31 17AA 2051 | | NVIDIA RTX PRO 4000 Blackwell SFF Edition | 2C33 1028 2053 | | NVIDIA RTX PRO 4000 Blackwell SFF Edition | 2C33 103C 2053 | -| NVIDIA RTX PRO 4000 Blackwell SFF Edition | 2C33 10DE 2053 | | NVIDIA RTX PRO 4000 Blackwell SFF Edition | 2C33 17AA 2053 | | NVIDIA RTX PRO 4000 Blackwell | 2C34 1028 2052 | | NVIDIA RTX PRO 4000 Blackwell | 2C34 103C 2052 | @@ -992,7 +983,6 @@ Subsystem Device ID. | NVIDIA RTX PRO 4000 Blackwell Generation Laptop GPU | 2C39 | | NVIDIA GeForce RTX 5090 Laptop GPU | 2C58 | | NVIDIA GeForce RTX 5080 Laptop GPU | 2C59 | -| NVIDIA RTX PRO 5000 Blackwell Embedded GPU | 2C77 | | NVIDIA RTX PRO 4000 Blackwell Embedded GPU | 2C79 | | NVIDIA GeForce RTX 5060 Ti | 2D04 | | NVIDIA GeForce RTX 5060 | 2D05 | @@ -1000,22 +990,18 @@ Subsystem Device ID. | NVIDIA GeForce RTX 5060 Laptop GPU | 2D19 | | NVIDIA RTX PRO 2000 Blackwell | 2D30 1028 2054 | | NVIDIA RTX PRO 2000 Blackwell | 2D30 103C 2054 | -| NVIDIA RTX PRO 2000 Blackwell | 2D30 10DE 2054 | | NVIDIA RTX PRO 2000 Blackwell | 2D30 17AA 2054 | | NVIDIA RTX PRO 2000 Blackwell Generation Laptop GPU | 2D39 | | NVIDIA GeForce RTX 5070 Laptop GPU | 2D58 | | NVIDIA GeForce RTX 5060 Laptop GPU | 2D59 | | NVIDIA RTX PRO 2000 Blackwell Embedded GPU | 2D79 | -| NVIDIA GeForce RTX 5050 | 2D83 | +| NVIDIA GeForce RTX 5050 | 2D83 17AA C791 | | NVIDIA GeForce RTX 5050 Laptop GPU | 2D98 | | NVIDIA RTX PRO 1000 Blackwell Generation Laptop GPU | 2DB8 | | NVIDIA RTX PRO 500 Blackwell Generation Laptop GPU | 2DB9 | | NVIDIA GeForce RTX 5050 Laptop GPU | 2DD8 | | NVIDIA RTX PRO 500 Blackwell Embedded GPU | 2DF9 | -| NVIDIA GB10 | 2E12 10DE 21EC | | NVIDIA GeForce RTX 5070 | 2F04 | | NVIDIA GeForce RTX 5070 Ti Laptop GPU | 2F18 | | NVIDIA RTX PRO 3000 Blackwell Generation Laptop GPU | 2F38 | | NVIDIA GeForce RTX 5070 Ti Laptop GPU | 2F58 | -| NVIDIA B300 SXM6 AC | 3182 10DE 20E6 | -| NVIDIA GB300 | 31C2 10DE 21F1 | diff --git a/kernel-open/Kbuild b/kernel-open/Kbuild index e6c4ce81d..878747436 100644 --- a/kernel-open/Kbuild +++ b/kernel-open/Kbuild @@ -79,7 +79,7 @@ ccflags-y += -I$(src)/common/inc ccflags-y += -I$(src) ccflags-y += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args ccflags-y += -D__KERNEL__ -DMODULE -DNVRM -ccflags-y += -DNV_VERSION_STRING=\"580.94.13\" +ccflags-y += -DNV_VERSION_STRING=\"580.94.16\" # Include and link Tegra out-of-tree modules. ifneq ($(wildcard /usr/src/nvidia/nvidia-oot),) diff --git a/kernel-open/common/inc/nv-linux.h b/kernel-open/common/inc/nv-linux.h index 8c7ac51be..34905a43f 100644 --- a/kernel-open/common/inc/nv-linux.h +++ b/kernel-open/common/inc/nv-linux.h @@ -693,9 +693,9 @@ static inline dma_addr_t nv_phys_to_dma(struct device *dev, NvU64 pa) #define NV_PRINT_AT(nv_debug_level,at) \ { \ nv_printf(nv_debug_level, \ - "NVRM: VM: %s:%d: 0x%p, %d page(s), count = %d, " \ + "NVRM: VM: %s:%d: 0x%p, %d page(s), count = %lld, " \ "page_table = 0x%p\n", __FUNCTION__, __LINE__, at, \ - at->num_pages, NV_ATOMIC_READ(at->usage_count), \ + at->num_pages, (long long)atomic64_read(&at->usage_count), \ at->page_table); \ } @@ -970,7 +970,7 @@ struct nv_dma_buf typedef struct nv_alloc_s { struct nv_alloc_s *next; struct device *dev; - atomic_t usage_count; + atomic64_t usage_count; struct { NvBool contig : 1; NvBool guest : 1; @@ -1258,6 +1258,10 @@ typedef struct coherent_link_info_s { * of virutalized OS environment it is Intermediate Physical Address(IPA) */ NvU64 gpu_mem_pa; + /* Size of the GPU memory mappable through coherent link. It is possible + that less than whole FB is mapped to CPU. */ + NvU64 gpu_mem_size; + /* Physical address of the reserved portion of the GPU memory, applicable * only in Grace Hopper self hosted passthrough virtualizatioan platform. */ NvU64 rsvd_mem_pa; @@ -1294,7 +1298,7 @@ struct nv_pci_tegra_devfreq_dev; typedef struct nv_linux_state_s { nv_state_t nv_state; - atomic_t usage_count; + atomic64_t usage_count; NvU32 suspend_count; @@ -1670,9 +1674,9 @@ static inline NvBool nv_alloc_release(nv_linux_file_private_t *nvlfp, nv_alloc_t { NV_PRINT_AT(NV_DBG_MEMINFO, at); - if (NV_ATOMIC_DEC_AND_TEST(at->usage_count)) + if (atomic64_dec_and_test(&at->usage_count)) { - NV_ATOMIC_INC(at->usage_count); + atomic64_inc(&at->usage_count); at->next = nvlfp->free_list; nvlfp->free_list = at; diff --git a/kernel-open/common/inc/nv-mm.h b/kernel-open/common/inc/nv-mm.h index faeb84456..919dacde8 100644 --- a/kernel-open/common/inc/nv-mm.h +++ b/kernel-open/common/inc/nv-mm.h @@ -196,14 +196,33 @@ static inline struct rw_semaphore *nv_mmap_get_lock(struct mm_struct *mm) * Commit 45ad9f5290dc updated vma_start_write() to call __vma_start_write(). */ void nv_vma_start_write(struct vm_area_struct *); + +static inline void nv_vma_flags_set_word(struct vm_area_struct *vma, unsigned long flags) +{ + nv_vma_start_write(vma); +#if defined(NV_VMA_FLAGS_SET_WORD_PRESENT) + vma_flags_set_word(&vma->flags, flags); +#else + ACCESS_PRIVATE(vma, __vm_flags) |= flags; #endif +} + +static inline void nv_vma_flags_clear_word(struct vm_area_struct *vma, unsigned long flags) +{ + nv_vma_start_write(vma); +#if defined(NV_VMA_FLAGS_SET_WORD_PRESENT) + vma_flags_clear_word(&vma->flags, flags); +#else + ACCESS_PRIVATE(vma, __vm_flags) &= ~flags; +#endif +} +#endif // !NV_CAN_CALL_VMA_START_WRITE static inline void nv_vm_flags_set(struct vm_area_struct *vma, vm_flags_t flags) { #if !NV_CAN_CALL_VMA_START_WRITE - nv_vma_start_write(vma); - ACCESS_PRIVATE(vma, __vm_flags) |= flags; -#elif defined(NV_VM_AREA_STRUCT_HAS_CONST_VM_FLAGS) + nv_vma_flags_set_word(vma, flags); +#elif defined(NV_VM_FLAGS_SET_PRESENT) vm_flags_set(vma, flags); #else vma->vm_flags |= flags; @@ -213,9 +232,8 @@ static inline void nv_vm_flags_set(struct vm_area_struct *vma, vm_flags_t flags) static inline void nv_vm_flags_clear(struct vm_area_struct *vma, vm_flags_t flags) { #if !NV_CAN_CALL_VMA_START_WRITE - nv_vma_start_write(vma); - ACCESS_PRIVATE(vma, __vm_flags) &= ~flags; -#elif defined(NV_VM_AREA_STRUCT_HAS_CONST_VM_FLAGS) + nv_vma_flags_clear_word(vma, flags); +#elif defined(NV_VM_FLAGS_SET_PRESENT) vm_flags_clear(vma, flags); #else vma->vm_flags &= ~flags; diff --git a/kernel-open/common/inc/nv.h b/kernel-open/common/inc/nv.h index d431423bb..8de68acc4 100644 --- a/kernel-open/common/inc/nv.h +++ b/kernel-open/common/inc/nv.h @@ -959,7 +959,7 @@ void NV_API_CALL nv_put_firmware(const void *); nv_file_private_t* NV_API_CALL nv_get_file_private(NvS32, NvBool, void **); void NV_API_CALL nv_put_file_private(void *); -NV_STATUS NV_API_CALL nv_get_device_memory_config(nv_state_t *, NvU64 *, NvU64 *, NvU64 *, NvU32 *, NvS32 *); +NV_STATUS NV_API_CALL nv_get_device_memory_config(nv_state_t *, NvU64 *, NvU64 *, NvU64 *, NvU64 *, NvU32 *, NvS32 *); NV_STATUS NV_API_CALL nv_get_egm_info(nv_state_t *, NvU64 *, NvU64 *, NvS32 *); void NV_API_CALL nv_p2p_free_platform_data(void *data); diff --git a/kernel-open/conftest.sh b/kernel-open/conftest.sh index 8e0736f08..0d74ec82e 100755 --- a/kernel-open/conftest.sh +++ b/kernel-open/conftest.sh @@ -1139,6 +1139,45 @@ compile_test() { compile_check_conftest "$CODE" "NV_PFN_ADDRESS_SPACE_STRUCT_PRESENT" "" "types" ;; + irq_bypass_producer_has_token) + # + # Determine if 'struct irq_bypass_producer' has 'token' field + # + # Added by commit 2b521d86ee80 ("irqbypass: Take ownership of + # producer/consumer token tracking") in v6.17 + # + CODE=" + #include + int conftest_irq_bypass_producer_has_token(void) { + return offsetof(struct irq_bypass_producer, token); + }" + + compile_check_conftest "$CODE" "NV_IRQ_BYPASS_PRODUCER_HAS_TOKEN" "" "types" + ;; + + irq_bypass_register_producer_has_eventfd_and_irq_args) + # + # Determine if irq_bypass_register_producer() function has + # additional 'eventfd' and 'irq' arguments. + # + # Added by commits 2b521d86ee80 ("irqbypass: Take ownership of + # producer/consumer token tracking") and 23b54381cee2 + # ("irqbypass: Require producers to pass in Linux IRQ number + # during registration") in v6.17 + # + CODE=" + #include + #include + void conftest_irq_bypass_register_producer_has_eventfd_and_irq_args(void) { + struct irq_bypass_producer *prod = NULL; + struct eventfd_ctx *eventfd = NULL; + int irq = 0; + irq_bypass_register_producer(prod, eventfd, irq); + }" + + compile_check_conftest "$CODE" "NV_IRQ_BYPASS_REGISTER_PRODUCER_HAS_EVENTFD_AND_IRQ_ARGS" "" "types" + ;; + egm_module_helper_api_present) # # Determine if egm management api are present or not. @@ -1351,6 +1390,45 @@ compile_test() { compile_check_conftest "$CODE" "NV_GET_DEV_PAGEMAP_HAS_PGMAP_ARG" "" "types" ;; + zone_device_page_init_has_order_arg) + # + # Determine if the zone_device_page_init() has an extra argument + # + # This change was introduced by d245f9b4ab80 + # ("mm/zone_device: support large zone device private folios") + # + # in linux-next, expected in v6.19. + # + CODE=" + #include + void init_page(void) { + struct page *page; + zone_device_page_init(page, 0); + }" + compile_check_conftest "$CODE" "NV_ZONE_DEVICE_PAGE_INIT_HAS_ORDER_ARG" "" "types" + ;; + + dev_pagemap_ops_has_folio_free) + # + # Determine if the zone device now uses a folio_free() as the callback + # function instead of page_free() + # + # This change was introduced by 3a5a06554566 + # (mm/zone_device: rename page_free callback to folio_free) + # + # in linux-next, expected in v6.19. + # + CODE=" + #include + void test_folio_free(struct folio *folio) { + } + void set_folio_free_ops(void) { + struct dev_pagemap_ops ops; + ops.folio_free = test_folio_free; + }" + compile_check_conftest "$CODE" "NV_PAGEMAP_OPS_HAS_FOLIO_FREE" "" "types" + ;; + drm_available) # Determine if the DRM subsystem is usable CODE=" @@ -2223,6 +2301,35 @@ compile_test() { compile_check_conftest "$CODE" "NV_GET_BACKLIGHT_DEVICE_BY_NAME_PRESENT" "" "functions" ;; + dma_map_ops_has_map_phys) + # + # Determine if .map_phys exists in struct dma_map_ops. + # + # Commit 14cb413af00c ("dma-mapping: remove unused mapping resource callbacks") + # removed .map_resource operation and replaced it with .map_phys. + # + echo "$CONFTEST_PREAMBLE + #include + int conftest_dma_map_ops_has_map_phys(void) { + return offsetof(struct dma_map_ops, map_phys); + } + int conftest_dma_map_ops_has_unmap_phys(void) { + return offsetof(struct dma_map_ops, unmap_phys); + }" > conftest$$.c + + $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1 + rm -f conftest$$.c + + if [ -f conftest$$.o ]; then + echo "#define NV_DMA_MAP_OPS_HAS_MAP_PHYS" | append_conftest "types" + rm -f conftest$$.o + return + else + echo "#undef NV_DMA_MAP_OPS_HAS_MAP_PHYS" | append_conftest "types" + return + fi + ;; + dma_buf_ops_has_map) # # Determine if .map exists in dma_buf_ops. @@ -3938,6 +4045,27 @@ compile_test() { compile_check_conftest "$CODE" "NV_PCI_REBAR_GET_POSSIBLE_SIZES_PRESENT" "" "functions" ;; + pci_resize_resource_has_exclude_bars_arg) + # + # Determine if pci_resize_resource() has exclude_bars argument. + # + # exclude_bars argument was added to pci_resize_resource by commit + # 337b1b566db0 (11/14/2025) ("PCI: Fix restoring BARs on BAR resize rollback path") + # in linux-next. + # + CODE=" + #include + + typeof(pci_resize_resource) conftest_pci_resize_resource_has_exclude_bars_arg; + int __must_check conftest_pci_resize_resource_has_exclude_bars_arg(struct pci_dev *dev, + int i, int size, + int exclude_bars) { + return 0; + }" + + compile_check_conftest "$CODE" "NV_PCI_RESIZE_RESOURCE_HAS_EXCLUDE_BARS_ARG" "" "types" + ;; + drm_connector_has_override_edid) # # Determine if 'struct drm_connector' has an 'override_edid' member. @@ -3976,22 +4104,39 @@ compile_test() { compile_check_conftest "$CODE" "NV_IOMMU_SVA_BIND_DEVICE_HAS_DRVDATA_ARG" "" "types" ;; - vm_area_struct_has_const_vm_flags) + vm_flags_set) # - # Determine if the 'vm_area_struct' structure has - # const 'vm_flags'. + # Determine if the vm_flags_set() function is present. The + # presence of this function indicates that the vm_flags_clear() + # function is also present. # - # A union of '__vm_flags' and 'const vm_flags' was added by + # The functions vm_flags_set()/ vm_flags_clear() were added by # commit bc292ab00f6c ("mm: introduce vma->vm_flags wrapper - # functions") in v6.3. + # functions") in v6.3-rc1 (2023-02-09). # CODE=" - #include - int conftest_vm_area_struct_has_const_vm_flags(void) { - return offsetof(struct vm_area_struct, __vm_flags); + #include + void conftest_vm_flags_set(void) { + vm_flags_set(); }" - compile_check_conftest "$CODE" "NV_VM_AREA_STRUCT_HAS_CONST_VM_FLAGS" "" "types" + compile_check_conftest "$CODE" "NV_VM_FLAGS_SET_PRESENT" "" "functions" + ;; + + vma_flags_set_word) + # + # Determine if the vma_flags_set_word() function is present. + # + # Added by commit c3f7c506e8f1 ("mm: introduce VMA flags bitmap type") + # in v6.19-rc1. + # + CODE=" + #include + void conftest_vma_flags_set_word(void) { + vma_flags_set_word(); + }" + + compile_check_conftest "$CODE" "NV_VMA_FLAGS_SET_WORD_PRESENT" "" "functions" ;; drm_driver_has_dumb_destroy) diff --git a/kernel-open/nvidia-drm/nvidia-drm-sources.mk b/kernel-open/nvidia-drm/nvidia-drm-sources.mk index 926eb76ee..21626d28a 100644 --- a/kernel-open/nvidia-drm/nvidia-drm-sources.mk +++ b/kernel-open/nvidia-drm/nvidia-drm-sources.mk @@ -62,6 +62,7 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_plane_create_color_properties NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_atomic_helper_legacy_gamma_set NV_CONFTEST_FUNCTION_COMPILE_TESTS += vmf_insert_mixed NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_gem_prime_mmap +NV_CONFTEST_FUNCTION_COMPILE_TESTS += vm_flags_set NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_legacy_dev_list NV_CONFTEST_TYPE_COMPILE_TESTS += vm_ops_fault_removed_vma_arg @@ -91,7 +92,6 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += reservation_object_reserve_shared_has_num_fenc NV_CONFTEST_TYPE_COMPILE_TESTS += drm_connector_has_override_edid NV_CONFTEST_TYPE_COMPILE_TESTS += drm_file_get_master NV_CONFTEST_TYPE_COMPILE_TESTS += drm_modeset_lock_all_end -NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_dumb_destroy NV_CONFTEST_TYPE_COMPILE_TESTS += fence_ops_use_64bit_seqno NV_CONFTEST_TYPE_COMPILE_TESTS += drm_aperture_remove_conflicting_framebuffers_has_driver_arg diff --git a/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild b/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild index c33f5c2f4..c479215af 100644 --- a/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild +++ b/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild @@ -62,6 +62,8 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += migrate_vma_added_flags NV_CONFTEST_TYPE_COMPILE_TESTS += migrate_device_range NV_CONFTEST_TYPE_COMPILE_TESTS += handle_mm_fault_has_pt_regs_arg NV_CONFTEST_TYPE_COMPILE_TESTS += get_dev_pagemap_has_pgmap_arg +NV_CONFTEST_TYPE_COMPILE_TESTS += dev_pagemap_ops_has_folio_free +NV_CONFTEST_TYPE_COMPILE_TESTS += zone_device_page_init_has_order_arg NV_CONFTEST_TYPE_COMPILE_TESTS += mempolicy_has_unified_nodes NV_CONFTEST_TYPE_COMPILE_TESTS += mempolicy_has_home_node NV_CONFTEST_TYPE_COMPILE_TESTS += mpol_preferred_many_present diff --git a/kernel-open/nvidia-uvm/uvm_hmm.c b/kernel-open/nvidia-uvm/uvm_hmm.c index 3e995e2de..2ddf64b7c 100644 --- a/kernel-open/nvidia-uvm/uvm_hmm.c +++ b/kernel-open/nvidia-uvm/uvm_hmm.c @@ -74,6 +74,16 @@ module_param(uvm_disable_hmm, bool, 0444); #include "uvm_va_policy.h" #include "uvm_tools.h" +// +// Pass 0 as the order, when actual large order support is added this +// function will need to be revisited +// +#if defined(NV_ZONE_DEVICE_PAGE_INIT_HAS_ORDER_ARG) +#define ZONE_DEVICE_PAGE_INIT(page) zone_device_page_init(page, 0) +#else +#define ZONE_DEVICE_PAGE_INIT(page) zone_device_page_init(page) +#endif + // The function nv_PageSwapCache() wraps the check for page swap cache flag in // order to support a wide variety of kernel versions. // The function PageSwapCache() is removed after 32f51ead3d77 ("mm: remove @@ -2146,7 +2156,7 @@ static void fill_dst_pfn(uvm_va_block_t *va_block, UVM_ASSERT(!page_count(dpage)); UVM_ASSERT(!dpage->zone_device_data); - zone_device_page_init(dpage); + ZONE_DEVICE_PAGE_INIT(dpage); dpage->zone_device_data = gpu_chunk; atomic64_inc(&va_block->hmm.va_space->hmm.allocated_page_count); } diff --git a/kernel-open/nvidia-uvm/uvm_pmm_gpu.c b/kernel-open/nvidia-uvm/uvm_pmm_gpu.c index cba0ec539..ad2ae1c6f 100644 --- a/kernel-open/nvidia-uvm/uvm_pmm_gpu.c +++ b/kernel-open/nvidia-uvm/uvm_pmm_gpu.c @@ -3159,6 +3159,11 @@ static void devmem_page_free(struct page *page) &gpu->pmm.root_chunks.va_block_lazy_free_q_item); } +static void devmem_folio_free(struct folio *folio) +{ + devmem_page_free(&folio->page); +} + // This is called by HMM when the CPU faults on a ZONE_DEVICE private entry. static vm_fault_t devmem_fault(struct vm_fault *vmf) { @@ -3177,7 +3182,11 @@ static vm_fault_t devmem_fault_entry(struct vm_fault *vmf) static const struct dev_pagemap_ops uvm_pmm_devmem_ops = { +#if defined(NV_PAGEMAP_OPS_HAS_FOLIO_FREE) + .folio_free = devmem_folio_free, +#else .page_free = devmem_page_free, +#endif .migrate_to_ram = devmem_fault_entry, }; @@ -3272,6 +3281,11 @@ static void device_p2p_page_free(struct page *page) page->zone_device_data = NULL; nv_kref_put(&p2p_mem->refcount, device_p2p_page_free_wake); } + +static void device_p2p_folio_free(struct folio *folio) +{ + device_p2p_page_free(&folio->page); +} #endif #if UVM_CDMM_PAGES_SUPPORTED() @@ -3280,9 +3294,18 @@ static void device_coherent_page_free(struct page *page) device_p2p_page_free(page); } +static void device_coherent_folio_free(struct folio *folio) +{ + device_p2p_page_free(&folio->page); +} + static const struct dev_pagemap_ops uvm_device_coherent_pgmap_ops = { +#if defined(NV_PAGEMAP_OPS_HAS_FOLIO_FREE) + .folio_free = device_coherent_folio_free, +#else .page_free = device_coherent_page_free, +#endif }; static NV_STATUS uvm_pmm_cdmm_init(uvm_parent_gpu_t *parent_gpu) @@ -3419,7 +3442,11 @@ static bool uvm_pmm_gpu_check_orphan_pages(uvm_pmm_gpu_t *pmm) static const struct dev_pagemap_ops uvm_device_p2p_pgmap_ops = { +#if defined(NV_PAGEMAP_OPS_HAS_FOLIO_FREE) + .folio_free = device_p2p_folio_free, +#else .page_free = device_p2p_page_free, +#endif }; void uvm_pmm_gpu_device_p2p_init(uvm_parent_gpu_t *parent_gpu) @@ -3477,12 +3504,10 @@ void uvm_pmm_gpu_device_p2p_init(uvm_parent_gpu_t *parent_gpu) void uvm_pmm_gpu_device_p2p_deinit(uvm_parent_gpu_t *parent_gpu) { - unsigned long pci_start_pfn = pci_resource_start(parent_gpu->pci_dev, - uvm_device_p2p_static_bar(parent_gpu)) >> PAGE_SHIFT; - struct page *p2p_page; - if (parent_gpu->device_p2p_initialised && !uvm_parent_gpu_is_coherent(parent_gpu)) { - p2p_page = pfn_to_page(pci_start_pfn); + struct page *p2p_page = pfn_to_page(pci_resource_start(parent_gpu->pci_dev, + uvm_device_p2p_static_bar(parent_gpu)) >> PAGE_SHIFT); + devm_memunmap_pages(&parent_gpu->pci_dev->dev, page_pgmap(p2p_page)); } diff --git a/kernel-open/nvidia-uvm/uvm_populate_pageable.c b/kernel-open/nvidia-uvm/uvm_populate_pageable.c index fd43b7979..04528cf80 100644 --- a/kernel-open/nvidia-uvm/uvm_populate_pageable.c +++ b/kernel-open/nvidia-uvm/uvm_populate_pageable.c @@ -21,6 +21,8 @@ *******************************************************************************/ +#include + #include "uvm_common.h" #include "uvm_ioctl.h" #include "uvm_linux.h" @@ -63,6 +65,12 @@ static NV_STATUS handle_fault(struct vm_area_struct *vma, unsigned long start, u ret = UVM_HANDLE_MM_FAULT(vma, start + (i * PAGE_SIZE), fault_flags); if (ret & VM_FAULT_ERROR) return errno_to_nv_status(vm_fault_to_errno(ret, fault_flags)); + + // Depending on the kernel version and the active preemption model, + // calls to handle_mm_fault might not have had a chance to check for + // for scheduling points. Insert an explicit yield point here to prevent + // large buffers from triggering soft lockup timeout. + cond_resched(); } return NV_OK; diff --git a/kernel-open/nvidia/nv-dma.c b/kernel-open/nvidia/nv-dma.c index 2984af848..0ff75d5e3 100644 --- a/kernel-open/nvidia/nv-dma.c +++ b/kernel-open/nvidia/nv-dma.c @@ -718,7 +718,11 @@ static NvBool nv_dma_use_map_resource #endif } +#if defined(NV_DMA_MAP_OPS_HAS_MAP_PHYS) + return (ops->map_phys != NULL); +#else return (ops->map_resource != NULL); +#endif } /* DMA-map a peer device's C2C aperture for peer access. */ diff --git a/kernel-open/nvidia/nv-dmabuf.c b/kernel-open/nvidia/nv-dmabuf.c index f3f1c3f62..71435a365 100644 --- a/kernel-open/nvidia/nv-dmabuf.c +++ b/kernel-open/nvidia/nv-dmabuf.c @@ -253,7 +253,7 @@ nv_inc_and_check_one_phys_refcount( return is_one; } -// Must be called with RMAPI lock and GPU lock taken +// Must be called with RMAPI lock and all-GPU lock taken static void nv_dma_buf_undup_mem_handles_unlocked( nvidia_stack_t *sp, @@ -284,6 +284,28 @@ nv_dma_buf_undup_mem_handles_unlocked( } } +// Must be called with RMAPI lock taken +static void +nv_dma_buf_undup_mem_handles_gpus_locked( + nvidia_stack_t *sp, + NvU32 start_index, + NvU32 num_objects, + nv_dma_buf_file_private_t *priv +) +{ + NV_STATUS status; + + status = rm_acquire_all_gpus_lock(sp); + if (WARN_ON(status != NV_OK)) + { + return; + } + + nv_dma_buf_undup_mem_handles_unlocked(sp, start_index, num_objects, priv); + + rm_release_all_gpus_lock(sp); +} + static void nv_dma_buf_undup_mem_handles( nvidia_stack_t *sp, @@ -300,17 +322,8 @@ nv_dma_buf_undup_mem_handles( return; } - status = rm_acquire_all_gpus_lock(sp); - if (WARN_ON(status != NV_OK)) - { - goto unlock_api_lock; - } + nv_dma_buf_undup_mem_handles_gpus_locked(sp, index, num_objects, priv); - nv_dma_buf_undup_mem_handles_unlocked(sp, index, num_objects, priv); - - rm_release_all_gpus_lock(sp); - -unlock_api_lock: rm_release_api_lock(sp); } @@ -478,7 +491,7 @@ failed: // nv_dma_buf_release_gpu_lock(sp, priv); - nv_dma_buf_undup_mem_handles(sp, params->index, count, priv); + nv_dma_buf_undup_mem_handles_gpus_locked(sp, params->index, count, priv); } else { diff --git a/kernel-open/nvidia/nv-mmap.c b/kernel-open/nvidia/nv-mmap.c index 9ead01c27..dbcbae9c0 100644 --- a/kernel-open/nvidia/nv-mmap.c +++ b/kernel-open/nvidia/nv-mmap.c @@ -72,7 +72,7 @@ nvidia_vma_open(struct vm_area_struct *vma) if (at != NULL) { - NV_ATOMIC_INC(at->usage_count); + atomic64_inc(&at->usage_count); NV_PRINT_AT(NV_DBG_MEMINFO, at); } @@ -128,6 +128,9 @@ nvidia_vma_access( void *kernel_mapping; const nv_alloc_mapping_context_t *mmap_context = &nvlfp->mmap_context; NvU64 offsInVma = addr - vma->vm_start; + NvBool bIsNuma = NV_FALSE; + + bIsNuma = pfn_valid(mmap_context->access_start >> PAGE_SHIFT); pageIndex = (offsInVma >> PAGE_SHIFT); pageOffset = (offsInVma & ~PAGE_MASK); @@ -164,10 +167,17 @@ nvidia_vma_access( pageIndex = nv_array_index_no_speculate(pageIndex, at->num_pages); kernel_mapping = (void *)(at->page_table[pageIndex].virt_addr + pageOffset); } + else if (bIsNuma) + { + struct page *pPage = NV_GET_PAGE_STRUCT(mmap_context->page_array[pageIndex]); + NvU8 *pPagePtr = (NvU8 *) page_address(pPage); + kernel_mapping = &pPagePtr[pageOffset]; + } else { NvU64 idx = 0; NvU64 curOffs = 0; + for(; idx < mmap_context->memArea.numRanges; idx++) { NvU64 nextOffs = mmap_context->memArea.pRanges[idx].size + curOffs; @@ -195,7 +205,7 @@ found: else memcpy(buffer, kernel_mapping, length); - if (at == NULL) + if (at == NULL && !bIsNuma) { kernel_mapping = ((char *)kernel_mapping - pageOffset); os_unmap_kernel_space(kernel_mapping, PAGE_SIZE); @@ -408,7 +418,7 @@ static int nvidia_mmap_sysmem( int ret = 0; unsigned long start = 0; - NV_ATOMIC_INC(at->usage_count); + atomic64_inc(&at->usage_count); start = vma->vm_start; for (j = page_index; j < (page_index + pages); j++) @@ -444,7 +454,7 @@ static int nvidia_mmap_sysmem( if (ret) { - NV_ATOMIC_DEC(at->usage_count); + atomic64_dec(&at->usage_count); nv_printf(NV_DBG_ERRORS, "NVRM: Userspace mapping creation failed [%d]!\n", ret); return -EAGAIN; diff --git a/kernel-open/nvidia/nv-pci.c b/kernel-open/nvidia/nv-pci.c index 3b523b93d..ab7976bad 100644 --- a/kernel-open/nvidia/nv-pci.c +++ b/kernel-open/nvidia/nv-pci.c @@ -229,7 +229,11 @@ static int nv_resize_pcie_bars(struct pci_dev *pci_dev) { resize: /* Attempt to resize BAR1 to the largest supported size */ +#if defined(NV_PCI_RESIZE_RESOURCE_HAS_EXCLUDE_BARS_ARG) + r = pci_resize_resource(pci_dev, NV_GPU_BAR1, requested_size, 0); +#else r = pci_resize_resource(pci_dev, NV_GPU_BAR1, requested_size); +#endif if (r) { if (r == -ENOSPC) @@ -420,6 +424,12 @@ nv_init_coherent_link_info if (device_property_read_u64(nvl->dev, "nvidia,gpu-mem-base-pa", &pa) == 0) { nvl->coherent_link_info.gpu_mem_pa = pa; + + NvU64 gpu_mem_size; + if (device_property_read_u64(nvl->dev, "nvidia,gpu-mem-size", &gpu_mem_size) == 0) + { + nvl->coherent_link_info.gpu_mem_size = gpu_mem_size; + } } else { @@ -1774,7 +1784,7 @@ nv_pci_remove(struct pci_dev *pci_dev) * For eGPU, fall off the bus along with clients active is a valid scenario. * Hence skipping the sanity check for eGPU. */ - if ((NV_ATOMIC_READ(nvl->usage_count) != 0) && !(nv->is_external_gpu)) + if ((atomic64_read(&nvl->usage_count) != 0) && !(nv->is_external_gpu)) { nv_printf(NV_DBG_ERRORS, "NVRM: Attempting to remove device %04x:%02x:%02x.%x with non-zero usage count!\n", @@ -1785,7 +1795,7 @@ nv_pci_remove(struct pci_dev *pci_dev) * We can't return from this function without corrupting state, so we wait for * the usage count to go to zero. */ - while (NV_ATOMIC_READ(nvl->usage_count) != 0) + while (atomic64_read(&nvl->usage_count) != 0) { /* @@ -1863,7 +1873,7 @@ nv_pci_remove(struct pci_dev *pci_dev) nvl->sysfs_config_file = NULL; } - if (NV_ATOMIC_READ(nvl->usage_count) == 0) + if (atomic64_read(&nvl->usage_count) == 0) { nv_lock_destroy_locks(sp, nv); } @@ -1879,7 +1889,7 @@ nv_pci_remove(struct pci_dev *pci_dev) num_nv_devices--; - if (NV_ATOMIC_READ(nvl->usage_count) == 0) + if (atomic64_read(&nvl->usage_count) == 0) { NV_PCI_DISABLE_DEVICE(pci_dev); NV_KFREE(nvl, sizeof(nv_linux_state_t)); diff --git a/kernel-open/nvidia/nv-procfs.c b/kernel-open/nvidia/nv-procfs.c index 0c44704be..ace65b6a3 100644 --- a/kernel-open/nvidia/nv-procfs.c +++ b/kernel-open/nvidia/nv-procfs.c @@ -889,7 +889,7 @@ nv_procfs_close_unbind_lock( down(&nvl->ldata_lock); if ((value == 1) && !(nv->flags & NV_FLAG_UNBIND_LOCK)) { - if (NV_ATOMIC_READ(nvl->usage_count) == 0) + if (atomic64_read(&nvl->usage_count) == 0) rm_unbind_lock(sp, nv); if (nv->flags & NV_FLAG_UNBIND_LOCK) diff --git a/kernel-open/nvidia/nv.c b/kernel-open/nvidia/nv.c index 94fe2e39e..e5cb1df3c 100644 --- a/kernel-open/nvidia/nv.c +++ b/kernel-open/nvidia/nv.c @@ -413,7 +413,7 @@ nv_alloc_t *nvos_create_alloc( return NULL; } - NV_ATOMIC_SET(at->usage_count, 0); + atomic64_set(&at->usage_count, 0); at->pid = os_get_current_process(); at->dev = dev; @@ -428,7 +428,7 @@ int nvos_free_alloc( if (at == NULL) return -1; - if (NV_ATOMIC_READ(at->usage_count)) + if (atomic64_read(&at->usage_count)) return 1; kvfree(at->page_table); @@ -1646,13 +1646,10 @@ static int nv_open_device(nv_state_t *nv, nvidia_stack_t *sp) return -ENODEV; } - if (unlikely(NV_ATOMIC_READ(nvl->usage_count) >= NV_S32_MAX)) - return -EMFILE; - if ( ! (nv->flags & NV_FLAG_OPEN)) { /* Sanity check: !NV_FLAG_OPEN requires usage_count == 0 */ - if (NV_ATOMIC_READ(nvl->usage_count) != 0) + if (atomic64_read(&nvl->usage_count) != 0) { NV_DEV_PRINTF(NV_DBG_ERRORS, nv, "Minor device %u is referenced without being open!\n", @@ -1674,7 +1671,7 @@ static int nv_open_device(nv_state_t *nv, nvidia_stack_t *sp) nv_assert_not_in_gpu_exclusion_list(sp, nv); - NV_ATOMIC_INC(nvl->usage_count); + atomic64_inc(&nvl->usage_count); return 0; } @@ -2102,7 +2099,7 @@ static void nv_close_device(nv_state_t *nv, nvidia_stack_t *sp) { nv_linux_state_t *nvl = NV_GET_NVL_FROM_NV_STATE(nv); - if (NV_ATOMIC_READ(nvl->usage_count) == 0) + if (atomic64_read(&nvl->usage_count) == 0) { nv_printf(NV_DBG_ERRORS, "NVRM: Attempting to close unopened minor device %u!\n", @@ -2111,7 +2108,7 @@ static void nv_close_device(nv_state_t *nv, nvidia_stack_t *sp) return; } - if (NV_ATOMIC_DEC_AND_TEST(nvl->usage_count)) + if (atomic64_dec_and_test(&nvl->usage_count)) nv_stop_device(nv, sp); } @@ -2156,7 +2153,7 @@ nvidia_close_callback( nv_close_device(nv, sp); bRemove = (!NV_IS_DEVICE_IN_SURPRISE_REMOVAL(nv)) && - (NV_ATOMIC_READ(nvl->usage_count) == 0) && + (atomic64_read(&nvl->usage_count) == 0) && rm_get_device_remove_flag(sp, nv->gpu_id); nv_free_file_private(nvlfp); @@ -2175,7 +2172,7 @@ nvidia_close_callback( * any cleanup related to linux layer locks and nv linux state struct. * nvidia_pci_remove when scheduled will do necessary cleanup. */ - if ((NV_ATOMIC_READ(nvl->usage_count) == 0) && nv->removed) + if ((atomic64_read(&nvl->usage_count) == 0) && nv->removed) { nv_lock_destroy_locks(sp, nv); NV_KFREE(nvl, sizeof(nv_linux_state_t)); @@ -2694,7 +2691,7 @@ nvidia_ioctl( * Only the current client should have an open file * descriptor for the device, to allow safe offlining. */ - if (NV_ATOMIC_READ(nvl->usage_count) > 1) + if (atomic64_read(&nvl->usage_count) > 1) { status = -EBUSY; goto unlock; @@ -3083,12 +3080,12 @@ nvidia_ctl_open( /* save the nv away in file->private_data */ nvlfp->nvptr = nvl; - if (NV_ATOMIC_READ(nvl->usage_count) == 0) + if (atomic64_read(&nvl->usage_count) == 0) { nv->flags |= (NV_FLAG_OPEN | NV_FLAG_CONTROL); } - NV_ATOMIC_INC(nvl->usage_count); + atomic64_inc(&nvl->usage_count); up(&nvl->ldata_lock); return 0; @@ -3113,7 +3110,7 @@ nvidia_ctl_close( nv_printf(NV_DBG_INFO, "NVRM: nvidia_ctl_close\n"); down(&nvl->ldata_lock); - if (NV_ATOMIC_DEC_AND_TEST(nvl->usage_count)) + if (atomic64_dec_and_test(&nvl->usage_count)) { nv->flags &= ~NV_FLAG_OPEN; } @@ -3276,7 +3273,7 @@ nv_alias_pages( at->guest_id = guest_id; *priv_data = at; - NV_ATOMIC_INC(at->usage_count); + atomic64_inc(&at->usage_count); NV_PRINT_AT(NV_DBG_MEMINFO, at); @@ -3589,7 +3586,7 @@ NV_STATUS NV_API_CALL nv_register_sgt( at->order = get_order(at->num_pages * PAGE_SIZE); - NV_ATOMIC_INC(at->usage_count); + atomic64_inc(&at->usage_count); *priv_data = at; @@ -3620,7 +3617,7 @@ void NV_API_CALL nv_unregister_sgt( *import_priv = at->import_priv; } - if (NV_ATOMIC_DEC_AND_TEST(at->usage_count)) + if (atomic64_dec_and_test(&at->usage_count)) { nvos_free_alloc(at); } @@ -3893,7 +3890,7 @@ NV_STATUS NV_API_CALL nv_alloc_pages( } *priv_data = at; - NV_ATOMIC_INC(at->usage_count); + atomic64_inc(&at->usage_count); NV_PRINT_AT(NV_DBG_MEMINFO, at); @@ -3929,7 +3926,7 @@ NV_STATUS NV_API_CALL nv_free_pages( * This is described in greater detail in the comments above the * nvidia_vma_(open|release)() callbacks in nv-mmap.c. */ - if (!NV_ATOMIC_DEC_AND_TEST(at->usage_count)) + if (!atomic64_dec_and_test(&at->usage_count)) return NV_OK; if (!at->flags.guest && !at->import_sgt) @@ -3958,7 +3955,7 @@ NvBool nv_lock_init_locks NV_INIT_MUTEX(&nvl->mmap_lock); NV_INIT_MUTEX(&nvl->open_q_lock); - NV_ATOMIC_SET(nvl->usage_count, 0); + atomic64_set(&nvl->usage_count, 0); if (!rm_init_event_locks(sp, nv)) return NV_FALSE; @@ -5342,6 +5339,7 @@ NV_STATUS NV_API_CALL nv_get_device_memory_config( nv_state_t *nv, NvU64 *compr_addr_sys_phys, NvU64 *addr_guest_phys, + NvU64 *size_guest_phys, NvU64 *rsvd_phys, NvU32 *addr_width, NvS32 *node_id @@ -5365,6 +5363,10 @@ NV_STATUS NV_API_CALL nv_get_device_memory_config( { *addr_guest_phys = nvl->coherent_link_info.gpu_mem_pa; } + if (size_guest_phys) + { + *size_guest_phys = nvl->coherent_link_info.gpu_mem_size; + } if (rsvd_phys) { *rsvd_phys = nvl->coherent_link_info.rsvd_mem_pa; diff --git a/kernel-open/nvidia/nvidia.Kbuild b/kernel-open/nvidia/nvidia.Kbuild index 43416d252..2d78e93f9 100644 --- a/kernel-open/nvidia/nvidia.Kbuild +++ b/kernel-open/nvidia/nvidia.Kbuild @@ -145,6 +145,7 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += icc_get NV_CONFTEST_FUNCTION_COMPILE_TESTS += devm_of_icc_get NV_CONFTEST_FUNCTION_COMPILE_TESTS += icc_put NV_CONFTEST_FUNCTION_COMPILE_TESTS += icc_set_bw +NV_CONFTEST_FUNCTION_COMPILE_TESTS += dma_map_ops_has_map_phys NV_CONFTEST_FUNCTION_COMPILE_TESTS += dma_buf_ops_has_map NV_CONFTEST_FUNCTION_COMPILE_TESTS += dma_buf_ops_has_map_atomic NV_CONFTEST_FUNCTION_COMPILE_TESTS += dma_buf_attachment_has_peer2peer @@ -158,6 +159,8 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += assign_str NV_CONFTEST_FUNCTION_COMPILE_TESTS += ioasid_get NV_CONFTEST_FUNCTION_COMPILE_TESTS += mm_pasid_drop NV_CONFTEST_FUNCTION_COMPILE_TESTS += iommu_sva_bind_device_has_drvdata_arg +NV_CONFTEST_FUNCTION_COMPILE_TESTS += vma_flags_set_word +NV_CONFTEST_FUNCTION_COMPILE_TESTS += vm_flags_set NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_sme_active NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_swiotlb_map_sg_attrs @@ -205,7 +208,6 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += remove_memory_has_nid_arg NV_CONFTEST_TYPE_COMPILE_TESTS += add_memory_driver_managed_has_mhp_flags_arg NV_CONFTEST_TYPE_COMPILE_TESTS += num_registered_fb NV_CONFTEST_TYPE_COMPILE_TESTS += pci_driver_has_driver_managed_dma -NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags NV_CONFTEST_TYPE_COMPILE_TESTS += memory_failure_queue_has_trapno_arg NV_CONFTEST_TYPE_COMPILE_TESTS += foll_longterm_present NV_CONFTEST_TYPE_COMPILE_TESTS += bus_type_has_iommu_ops @@ -215,6 +217,7 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += class_create_has_no_owner_arg NV_CONFTEST_TYPE_COMPILE_TESTS += class_devnode_has_const_arg NV_CONFTEST_TYPE_COMPILE_TESTS += devfreq_has_freq_table NV_CONFTEST_TYPE_COMPILE_TESTS += has_enum_pidtype_tgid +NV_CONFTEST_TYPE_COMPILE_TESTS += pci_resize_resource_has_exclude_bars_arg NV_CONFTEST_GENERIC_COMPILE_TESTS += dom0_kernel_present NV_CONFTEST_GENERIC_COMPILE_TESTS += nvidia_vgpu_kvm_build diff --git a/src/common/inc/nvBldVer.h b/src/common/inc/nvBldVer.h index f22d0335a..e572623aa 100644 --- a/src/common/inc/nvBldVer.h +++ b/src/common/inc/nvBldVer.h @@ -43,18 +43,18 @@ #endif #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) -#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r580/VK580_65-189" -#define NV_BUILD_CHANGELIST_NUM (37068878) +#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r580/VK580_65-192" +#define NV_BUILD_CHANGELIST_NUM (37211220) #define NV_BUILD_TYPE "Official" -#define NV_BUILD_NAME "rel/gpu_drv/r580/VK580_65-189" -#define NV_LAST_OFFICIAL_CHANGELIST_NUM (37068878) +#define NV_BUILD_NAME "rel/gpu_drv/r580/VK580_65-192" +#define NV_LAST_OFFICIAL_CHANGELIST_NUM (37211220) #else /* Windows builds */ -#define NV_BUILD_BRANCH_VERSION "VK580_65-15" -#define NV_BUILD_CHANGELIST_NUM (37068878) +#define NV_BUILD_BRANCH_VERSION "VK580_65-17" +#define NV_BUILD_CHANGELIST_NUM (37211220) #define NV_BUILD_TYPE "Official" -#define NV_BUILD_NAME "582.15" -#define NV_LAST_OFFICIAL_CHANGELIST_NUM (37068878) +#define NV_BUILD_NAME "582.29" +#define NV_LAST_OFFICIAL_CHANGELIST_NUM (37211220) #define NV_BUILD_BRANCH_BASE_VERSION R580 #endif // End buildmeister python edited section diff --git a/src/common/inc/nvUnixVersion.h b/src/common/inc/nvUnixVersion.h index 0f9b0dbe8..74993f16e 100644 --- a/src/common/inc/nvUnixVersion.h +++ b/src/common/inc/nvUnixVersion.h @@ -4,7 +4,7 @@ #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \ (defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1) -#define NV_VERSION_STRING "580.94.13" +#define NV_VERSION_STRING "580.94.16" #else diff --git a/src/common/inc/nvVer.h b/src/common/inc/nvVer.h index 4a8b3fd2d..9f74078f9 100644 --- a/src/common/inc/nvVer.h +++ b/src/common/inc/nvVer.h @@ -3,7 +3,7 @@ #define NV_COMPANY_NAME_STRING_SHORT "NVIDIA" #define NV_COMPANY_NAME_STRING_FULL "NVIDIA Corporation" #define NV_COMPANY_NAME_STRING NV_COMPANY_NAME_STRING_FULL -#define NV_COPYRIGHT_YEAR "2025" +#define NV_COPYRIGHT_YEAR "2026" #define NV_COPYRIGHT "(C) " NV_COPYRIGHT_YEAR " NVIDIA Corporation. All rights reserved." // Please do not use the non-ascii copyright symbol for (C). #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \ diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_fb.h b/src/common/inc/swref/published/blackwell/gb100/dev_fb.h new file mode 100644 index 000000000..9fa268947 --- /dev/null +++ b/src/common/inc/swref/published/blackwell/gb100/dev_fb.h @@ -0,0 +1,34 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2025 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_dev_fb_h_ +#define __gb100_dev_fb_h_ + +#define NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE 0x001FA3E0 /* RW-4R */ +#define NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE__PRIV_LEVEL_MASK 0x001FA7C4 /* */ +#define NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE_LOWER_SCALE 3:0 /* RWEVF */ +#define NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE_LOWER_SCALE_INIT 0x00000000 /* RWE-V */ +#define NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE_LOWER_MAG 27:4 /* RWEVF */ +#define NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE_LOWER_MAG_INIT 0x00000000 /* RWE-V */ + +#endif // __gb100_dev_fb_h_ diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_gc6_island.h b/src/common/inc/swref/published/blackwell/gb100/dev_gc6_island.h new file mode 100644 index 000000000..b864ef63a --- /dev/null +++ b/src/common/inc/swref/published/blackwell/gb100/dev_gc6_island.h @@ -0,0 +1,31 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2003-2025 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_dev_gc6_island_h__ +#define __gb100_dev_gc6_island_h__ + +#define NV_PGC6_BSI_SECURE_SCRATCH_12 0x001180f0 /* RW-4R */ +#define NV_PGC6_BSI_SECURE_SCRATCH_12_DATA 31:0 /* RWIVF */ +#define NV_PGC6_BSI_SECURE_SCRATCH_12_DATA_INIT 0x00000000 /* RWI-V */ + +#endif // __gb100_dev_gc6_island_h__ diff --git a/src/common/inc/swref/published/blackwell/gb100/dev_gc6_island_addendum.h b/src/common/inc/swref/published/blackwell/gb100/dev_gc6_island_addendum.h new file mode 100644 index 000000000..f548f3c62 --- /dev/null +++ b/src/common/inc/swref/published/blackwell/gb100/dev_gc6_island_addendum.h @@ -0,0 +1,29 @@ +/* + * SPDX-FileCopyrightText: Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef __gb100_dev_gc6_island_addendum_h__ +#define __gb100_dev_gc6_island_addendum_h__ + +#define NV_PGC6_BSI_SECURE_SCRATCH_MMU_LOCAL_MEMORY_RANGE NV_PGC6_BSI_SECURE_SCRATCH_12 + +#endif // __gb100_dev_gc6_island_addendum_h__ diff --git a/src/common/modeset/timing/nvt_edid.c b/src/common/modeset/timing/nvt_edid.c index 8e6ddfc4e..c4b3e4e2c 100644 --- a/src/common/modeset/timing/nvt_edid.c +++ b/src/common/modeset/timing/nvt_edid.c @@ -1265,6 +1265,8 @@ void updateColorFormatAndBpcTiming(NVT_EDID_INFO *pInfo) // DisplayId2.0 spec has its own way of determining color format support which includes bpc + color format updateColorFormatForDisplayId20ExtnTimings(pInfo, i); } + + updateBpcForYuv420OnlyTiming(&pInfo->timing[i], &pInfo->ext861); } // Go through all the timings and set CTA format accordingly. If a timing is a CTA 861b timing, store the diff --git a/src/common/modeset/timing/nvt_edidext_861.c b/src/common/modeset/timing/nvt_edidext_861.c index 5f8b1b66f..a040177df 100644 --- a/src/common/modeset/timing/nvt_edidext_861.c +++ b/src/common/modeset/timing/nvt_edidext_861.c @@ -284,7 +284,8 @@ static const NVT_TIMING EIA861B[]= // the end EIA_TIMING(0,0,0,0,'-',0,0,0,0,'-',0,'p',4:3,0,0) }; -static NvU32 MAX_CEA861B_FORMAT = sizeof(EIA861B)/sizeof(EIA861B[0]) - 1; + +static const NvU32 MAX_CEA861B_FORMAT = sizeof(EIA861B)/sizeof(EIA861B[0]) - 1; static const NvU32 EIA861B_DUAL_ASPECT_VICS[][2] = { @@ -972,6 +973,40 @@ void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, } } +// If a timing is present in the YUV420 VDB, consider it +// incompatible with other sampling modes +CODE_SEGMENT(PAGE_DD_CODE) +void updateBpcForYuv420OnlyTiming(NVT_TIMING *pT, + const NVT_EDID_CEA861_INFO *p861Info) +{ + NvU32 i; + const NvU8 *pYuv420Vic = p861Info->svd_y420vdb; + NvBool yuv420Only = NV_FALSE; + + for (i = 0; i < p861Info->total_y420vdb; i++) + { + NVT_TIMING y420vdbTiming; + NvU8 vic = NVT_GET_CTA_8BIT_VIC(pYuv420Vic[i]); + if (vic == 0 || vic > MAX_CEA861B_FORMAT) + continue; + + y420vdbTiming = EIA861B[vic-1]; + + if (NvTiming_IsTimingExactEqual(pT, &y420vdbTiming)) + { + yuv420Only = NV_TRUE; + break; + } + } + + if (yuv420Only) + { + pT->etc.rgb444.bpcs = 0; + pT->etc.yuv444.bpcs = 0; + pT->etc.yuv422.bpcs = 0; + } +} + // Currently, the SVR both used in the NVRDB and VFPDB. // "One particular application is a Sink that prefers a Video Format that is not listed as an SVD in a VDB // but instead listed in a YCBCR 4:2:0 Video Data Block" diff --git a/src/common/modeset/timing/nvtiming_pvt.h b/src/common/modeset/timing/nvtiming_pvt.h index 1a54d0211..61b841954 100644 --- a/src/common/modeset/timing/nvtiming_pvt.h +++ b/src/common/modeset/timing/nvtiming_pvt.h @@ -77,6 +77,7 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *pEdid, NvU32 size, NVT_EDID_CEA861_INF void parse861ExtDetailedTiming(NvU8 *pEdidExt, NvU8 basicCaps, NVT_EDID_INFO *pInfo); void parse861bShortTiming(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo, NVT_CTA861_ORIGIN flag); void parse861bShortYuv420Timing(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo, NVT_CTA861_ORIGIN flag); +void updateBpcForYuv420OnlyTiming(NVT_TIMING *pT, const NVT_EDID_CEA861_INFO *p861Info); void parseCta861VideoFormatDataBlock(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo); void parseCta861NativeOrPreferredTiming(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo, NVT_CTA861_ORIGIN flag); void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861, void *pRawInfo, NVT_CTA861_ORIGIN flag); diff --git a/src/common/nvlink/inband/interface/nvlink_inband_msg.h b/src/common/nvlink/inband/interface/nvlink_inband_msg.h index 19292c3ab..6f7c77694 100644 --- a/src/common/nvlink/inband/interface/nvlink_inband_msg.h +++ b/src/common/nvlink/inband/interface/nvlink_inband_msg.h @@ -141,7 +141,6 @@ typedef struct #define NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY_NOT_SUPPORTED 0 #define NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY_TRUE 1 #define NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY_FALSE 2 -#define NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY_TRUE_RESET_REQUIRED 3 #define NVLINK_INBAND_FABRIC_HEALTH_MASK_ACCESS_TIMEOUT_RECOVERY 7:6 #define NVLINK_INBAND_FABRIC_HEALTH_MASK_ACCESS_TIMEOUT_RECOVERY_NOT_SUPPORTED 0 @@ -153,10 +152,16 @@ typedef struct #define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NONE 1U #define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INCORRECT_SYSGUID 2U #define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INCORRECT_CHASSIS_SN 3U -#define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NO_PARTITION 4U +#define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NO_PARTITION 4U // Deprecated #define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INSUFFICIENT_NVLINKS 5U #define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INCOMPATIBLE_GPU_FW 6U #define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INVALID_LOCATION 7U +#define NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_GPU_STATE_INVALID 8U + +#define NVLINK_INBAND_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED 13 : 12 +#define NVLINK_INBAND_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED_NOT_SUPPORTED 0U +#define NVLINK_INBAND_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED_TRUE 1U +#define NVLINK_INBAND_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED_FALSE 2U #define NVLINK_INBAND_FABRIC_HEALTH_SUMMARY_NOT_SUPPORTED 0U #define NVLINK_INBAND_FABRIC_HEALTH_SUMMARY_HEALTHY 1U @@ -374,10 +379,10 @@ static NV_INLINE NvU8 nvlinkGetFabricHealthSummary } if (REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY, fabricHealth) == NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY_TRUE || - REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY, fabricHealth) == NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY_TRUE_RESET_REQUIRED || REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_ACCESS_TIMEOUT_RECOVERY, fabricHealth) == NVLINK_INBAND_FABRIC_HEALTH_MASK_ACCESS_TIMEOUT_RECOVERY_TRUE || (REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION, fabricHealth) != NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NONE && - REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION, fabricHealth) != NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NOT_SUPPORTED)) + REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION, fabricHealth) != NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_NOT_SUPPORTED) || + REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED, fabricHealth) == NVLINK_INBAND_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED_FALSE) { return NVLINK_INBAND_FABRIC_HEALTH_SUMMARY_UNHEALTHY; } diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h index 48921f258..598ab3234 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080fb.h @@ -2896,4 +2896,52 @@ typedef struct NV2080_CTRL_FB_GET_CARVEOUT_REGION_INFO_PARAMS { NV_DECLARE_ALIGNED(NV2080_CTRL_FB_GET_CARVEOUT_REGION_INFO carveoutRegion[NV2080_CTRL_FB_GET_CARVEOUT_REGION_INFO_MAX_ENTRIES], 8); } NV2080_CTRL_FB_GET_CARVEOUT_REGION_INFO_PARAMS; +/* + * NV2080_CTRL_CMD_FB_GET_CPU_COHERENT_RANGE + * + * This command returns the CPU-coherent FB range. + * Only applicable on self-hosted platforms. + * + * coherentCpuFbBase + * FB offset of the start of the CPU-coherent range + * coherentCpuFbEnd + * FB offset of the end (exclusive) of the CPU-coherent range + */ +#define NV2080_CTRL_CMD_FB_GET_CPU_COHERENT_RANGE (0x20801361U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS_MESSAGE_ID (0x61U) + +typedef struct NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS { + NV_DECLARE_ALIGNED(NvU64 coherentCpuFbBase, 8); + NV_DECLARE_ALIGNED(NvU64 coherentCpuFbEnd, 8); +} NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS; + +/* + * NV2080_CTRL_CMD_FB_GET_WPR_REGION_INFO + * + * This command returns information about WPR regions. + * + * wpr1Start + * FB offset of the start of WPR1 + * wpr1End + * FB offset of the end (exclusive) of WPR1 + * wpr2Start + * FB offset of the start of WPR1 + * wpr2End + * FB offset of the end (exclusive) of WPR1 + * fbRegionOfWpr2Start + * FB offset of the start of the FB region (as tracked by RM) that contains WPR2 + */ +#define NV2080_CTRL_CMD_FB_GET_WPR_REGION_INFO (0x20801362U) /* finn: Evaluated from "(FINN_NV20_SUBDEVICE_0_FB_INTERFACE_ID << 8) | NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS_MESSAGE_ID" */ + +#define NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS_MESSAGE_ID (0x62U) + +typedef struct NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS { + NV_DECLARE_ALIGNED(NvU64 wpr1Start, 8); + NV_DECLARE_ALIGNED(NvU64 wpr1End, 8); + NV_DECLARE_ALIGNED(NvU64 wpr2Start, 8); + NV_DECLARE_ALIGNED(NvU64 wpr2End, 8); + NV_DECLARE_ALIGNED(NvU64 fbRegionOfWpr2Start, 8); +} NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS; + /* _ctrl2080fb_h_ */ diff --git a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h index 59e9b4aad..e80f92cbe 100644 --- a/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h +++ b/src/common/sdk/nvidia/inc/ctrl/ctrl2080/ctrl2080gpu.h @@ -4198,6 +4198,12 @@ typedef struct NV2080_CTRL_GPU_GET_COMPUTE_PROFILES_PARAMS { #define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INSUFFICIENT_NVLINKS 5 #define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INCOMPATIBLE_GPU_FW 6 #define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_INVALID_LOCATION 7 +#define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_GPU_STATE_INVALID 8 + +#define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED 13:12 +#define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED_NOT_SUPPORTED 0 +#define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED_TRUE 1 +#define NV2080_CTRL_GPU_FABRIC_HEALTH_MASK_PARTITION_ASSIGNED_FALSE 2 #define NV2080_CTRL_GPU_FABRIC_HEALTH_SUMMARY_NOT_SUPPORTED 0 #define NV2080_CTRL_GPU_FABRIC_HEALTH_SUMMARY_HEALTHY 1 diff --git a/src/nvidia/arch/nvalloc/unix/include/nv.h b/src/nvidia/arch/nvalloc/unix/include/nv.h index 519c260cf..770b37b26 100644 --- a/src/nvidia/arch/nvalloc/unix/include/nv.h +++ b/src/nvidia/arch/nvalloc/unix/include/nv.h @@ -959,7 +959,7 @@ void NV_API_CALL nv_put_firmware(const void *); nv_file_private_t* NV_API_CALL nv_get_file_private(NvS32, NvBool, void **); void NV_API_CALL nv_put_file_private(void *); -NV_STATUS NV_API_CALL nv_get_device_memory_config(nv_state_t *, NvU64 *, NvU64 *, NvU64 *, NvU32 *, NvS32 *); +NV_STATUS NV_API_CALL nv_get_device_memory_config(nv_state_t *, NvU64 *, NvU64 *, NvU64 *, NvU64 *, NvU32 *, NvS32 *); NV_STATUS NV_API_CALL nv_get_egm_info(nv_state_t *, NvU64 *, NvU64 *, NvS32 *); void NV_API_CALL nv_p2p_free_platform_data(void *data); diff --git a/src/nvidia/arch/nvalloc/unix/src/os.c b/src/nvidia/arch/nvalloc/unix/src/os.c index 2379c382d..2df01713d 100644 --- a/src/nvidia/arch/nvalloc/unix/src/os.c +++ b/src/nvidia/arch/nvalloc/unix/src/os.c @@ -3972,7 +3972,7 @@ osGetAtsTargetAddressRange } else { - NV_STATUS status = nv_get_device_memory_config(nv, pAddrSysPhys, NULL, NULL, + NV_STATUS status = nv_get_device_memory_config(nv, pAddrSysPhys, NULL, NULL, NULL, pAddrWidth, NULL); if (status == NV_OK) { @@ -3999,6 +3999,7 @@ osGetAtsTargetAddressRange * @param[in] pGpu GPU object pointer * @param[out] pAddrPhys Pointer to hold the physical address of FB in * CPU address map + * @param[out] pSizePhys Pointer to hold the size of FB mapped to CPU * @param[out] pNodeId NUMA nodeID of respective GPU memory * * @return NV_OK or NV_ERR_NOT_SUPPORTED @@ -4009,6 +4010,7 @@ osGetFbNumaInfo ( OBJGPU *pGpu, NvU64 *pAddrPhys, + NvU64 *pSizePhys, NvU64 *pAddrRsvdPhys, NvS32 *pNodeId ) @@ -4025,7 +4027,7 @@ osGetFbNumaInfo nv = NV_GET_NV_STATE(pGpu); - NV_STATUS status = nv_get_device_memory_config(nv, NULL, pAddrPhys, + NV_STATUS status = nv_get_device_memory_config(nv, NULL, pAddrPhys, pSizePhys, pAddrRsvdPhys, NULL, pNodeId); return status; @@ -4301,7 +4303,7 @@ osNumaOnliningEnabled // Note that this numaNodeId value fetched from Linux layer might not be // accurate since it is possible to overwrite it with regkey on some configs // - if (nv_get_device_memory_config(pOsGpuInfo, NULL, NULL, NULL, NULL, + if (nv_get_device_memory_config(pOsGpuInfo, NULL, NULL, NULL, NULL, NULL, &numaNodeId) != NV_OK) { return NV_FALSE; diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB100.c index 9afdf9a4e..b19cfc44c 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB100.c @@ -39,12214 +39,12214 @@ // static BINDATA_CONST NvU8 kgspBinArchiveConcatenatedFMC_GB100_BINDATA_LABEL_UCODE_IMAGE_PROD_data[] = { - 0x73, 0xf0, 0xfe, 0xfe, 0x3d, 0xa9, 0x82, 0xe1, 0xd8, 0x65, 0xad, 0x8c, 0xd2, 0x46, 0x5f, 0x18, - 0x50, 0xc8, 0xc2, 0x34, 0xc0, 0x41, 0x8a, 0xe4, 0x35, 0x2c, 0x8b, 0xc2, 0xcc, 0x20, 0xca, 0x98, - 0xfa, 0x05, 0xda, 0x2e, 0x2b, 0x7c, 0x58, 0x24, 0x52, 0x70, 0x05, 0x36, 0x2e, 0x72, 0x8c, 0x7b, - 0xcf, 0x66, 0x04, 0xd7, 0xec, 0x41, 0x64, 0x0d, 0x33, 0xea, 0xd0, 0xc0, 0xa3, 0x2a, 0xf7, 0x96, - 0x9d, 0xf2, 0x1d, 0x0b, 0x6f, 0x20, 0xa6, 0xaa, 0x8c, 0xbb, 0x54, 0x6f, 0x27, 0x0a, 0x4f, 0xe4, - 0x70, 0x33, 0x7b, 0x81, 0x8e, 0xb8, 0xa5, 0x4f, 0x4d, 0xd6, 0x63, 0xa7, 0x1f, 0x2d, 0xcc, 0x9d, - 0x39, 0x09, 0xc5, 0x80, 0x0b, 0x3a, 0xae, 0x56, 0x99, 0xb6, 0x6c, 0xce, 0x28, 0x82, 0x41, 0xd5, - 0xbb, 0xf7, 0x39, 0xe3, 0x65, 0xf9, 0xa9, 0x17, 0xe8, 0xcd, 0x01, 0xca, 0xfc, 0xab, 0x86, 0xe2, - 0xfc, 0xf7, 0x1a, 0x13, 0x56, 0x1a, 0xb3, 0x23, 0x1b, 0x39, 0xbd, 0xbf, 0xcd, 0x1d, 0x42, 0x29, - 0x47, 0x58, 0x96, 0x17, 0x4a, 0x31, 0xa2, 0x4e, 0xd2, 0x25, 0xe0, 0x19, 0x72, 0xc6, 0xbf, 0x5d, - 0xad, 0xae, 0x4b, 0x26, 0x4a, 0x2c, 0x12, 0xee, 0xb3, 0x14, 0x17, 0xe8, 0x4d, 0x00, 0x0d, 0x40, - 0x5d, 0x95, 0xcb, 0x97, 0x7a, 0x66, 0x5b, 0x13, 0xab, 0xbf, 0xe6, 0x78, 0xf4, 0x60, 0xa3, 0x62, - 0x50, 0x1a, 0x16, 0xae, 0xa7, 0x7f, 0xf5, 0xf6, 0xd9, 0xf3, 0xb1, 0x6a, 0x47, 0x67, 0xc5, 0x1f, - 0x5d, 0x8a, 0xb5, 0x76, 0x7e, 0xa1, 0xc1, 0xdd, 0xde, 0x2a, 0xf2, 0x0b, 0xd5, 0xba, 0xc8, 0xf4, - 0xbe, 0x8e, 0x35, 0xa6, 0x4a, 0xc4, 0x5b, 0x05, 0x2d, 0x53, 0x14, 0xc4, 0xaf, 0xc0, 0x81, 0x63, - 0x14, 0xf9, 0x86, 0xac, 0xe0, 0x2d, 0x75, 0xd0, 0xe9, 0x81, 0x82, 0x17, 0x60, 0xec, 0x94, 0xf2, - 0xde, 0xce, 0xc3, 0x1f, 0x9c, 0xf6, 0xcd, 0x57, 0x70, 0x90, 0x5b, 0xfd, 0x61, 0xee, 0xa8, 0xb5, - 0xe6, 0xf4, 0x0c, 0x2a, 0x5b, 0x45, 0x1c, 0x2f, 0xde, 0x5d, 0x5f, 0x7d, 0xd3, 0x53, 0xfd, 0xb2, - 0x63, 0x5d, 0xdc, 0x80, 0xc8, 0x4b, 0xb2, 0xc4, 0x44, 0x80, 0x30, 0x2d, 0xbd, 0x3a, 0x0b, 0x90, - 0x8d, 0xcf, 0xa4, 0x8e, 0x34, 0x91, 0x94, 0xf1, 0x43, 0x9b, 0x15, 0xe2, 0x3b, 0xd6, 0x5b, 0x8a, - 0xb0, 0x31, 0xd7, 0x95, 0x68, 0xfd, 0x1e, 0x40, 0xb9, 0x65, 0xe5, 0x9f, 0xa0, 0xf2, 0x22, 0xd4, - 0xee, 0xf9, 0xa3, 0x91, 0x58, 0xcf, 0x4a, 0xb5, 0xb6, 0xf2, 0x11, 0xef, 0x9e, 0x54, 0xa4, 0xa0, - 0x93, 0x54, 0x6f, 0x63, 0x04, 0x68, 0xd5, 0xa4, 0x32, 0x5d, 0xf8, 0x6d, 0x8f, 0xf6, 0x97, 0xfe, - 0x79, 0x47, 0xc0, 0x1c, 0xa5, 0x1a, 0x3b, 0xdf, 0x14, 0x00, 0x4d, 0x03, 0x42, 0x16, 0x08, 0x19, - 0xf1, 0x0d, 0xc7, 0xf8, 0xe7, 0xb0, 0xa8, 0x79, 0x70, 0x86, 0xff, 0x05, 0x86, 0x86, 0x6a, 0x48, - 0xc9, 0x69, 0x03, 0xc9, 0x95, 0x34, 0x88, 0xdf, 0xa3, 0x51, 0x8f, 0x29, 0x10, 0x88, 0xb4, 0xbc, - 0x4c, 0x8a, 0x84, 0x3c, 0xb7, 0x14, 0xe7, 0x53, 0x75, 0x60, 0x40, 0x2a, 0x1b, 0x04, 0x38, 0x29, - 0x2f, 0xb6, 0x90, 0x55, 0xcc, 0x4e, 0x21, 0xad, 0xc8, 0x91, 0x33, 0xb1, 0x78, 0x34, 0xa2, 0x3f, - 0xd5, 0xd0, 0x21, 0x60, 0x59, 0x6c, 0x89, 0x02, 0xd2, 0x8f, 0x80, 0xb9, 0x84, 0xe1, 0x6a, 0xe5, - 0xef, 0x20, 0x91, 0xba, 0x3b, 0xb5, 0xa1, 0x80, 0x13, 0x5d, 0x4d, 0xc1, 0x2a, 0x3e, 0x6c, 0x61, - 0xd2, 0x8f, 0xc6, 0x42, 0x1c, 0x40, 0xe9, 0x5e, 0x5c, 0x49, 0x24, 0xc5, 0x95, 0xd9, 0xa1, 0x63, - 0x9c, 0x24, 0x2a, 0x79, 0xb2, 0xa2, 0x9b, 0xbb, 0xa9, 0x4e, 0x59, 0xc8, 0x4f, 0x6d, 0x7e, 0x8e, - 0xcb, 0xff, 0x8f, 0x81, 0x2d, 0x54, 0xc4, 0x17, 0xe6, 0xb8, 0xc3, 0x07, 0x9f, 0x36, 0x40, 0xb8, - 0x50, 0x32, 0x9a, 0xb7, 0xc0, 0x59, 0x07, 0xc8, 0x01, 0x01, 0x74, 0x4f, 0x5c, 0x98, 0x77, 0xdf, - 0xdb, 0xc1, 0x4d, 0x84, 0x91, 0x7f, 0x57, 0xab, 0xe8, 0x28, 0x7a, 0xc4, 0x21, 0xfc, 0x1e, 0xc2, - 0xc1, 0xe2, 0x6f, 0x08, 0x33, 0xca, 0xdf, 0x56, 0xf8, 0x6f, 0xc9, 0xf4, 0x92, 0x0c, 0x89, 0x4c, - 0xff, 0xd3, 0x9c, 0x8b, 0x48, 0x58, 0x90, 0xab, 0xf5, 0xe0, 0xdf, 0x79, 0x99, 0xb2, 0x07, 0x7c, - 0xfb, 0xfd, 0x68, 0xa0, 0x44, 0xa3, 0x8a, 0xc8, 0xcf, 0xbc, 0x07, 0x78, 0xb3, 0xc8, 0x23, 0xb0, - 0x7e, 0xa5, 0xe6, 0xd0, 0x39, 0x04, 0xa4, 0xa1, 0x7f, 0x9b, 0xb3, 0x5b, 0x32, 0x3c, 0xee, 0xe3, - 0x11, 0x28, 0x53, 0xc4, 0x9c, 0x3b, 0xff, 0xcf, 0x32, 0xff, 0xc2, 0x0e, 0xa6, 0x9f, 0x8c, 0xce, - 0xe9, 0x8b, 0x18, 0x2d, 0xba, 0x65, 0x7c, 0x10, 0xb3, 0x2d, 0xc3, 0xba, 0x1b, 0xd8, 0x1b, 0xf9, - 0x78, 0x9a, 0xd6, 0xce, 0x0f, 0xba, 0x6c, 0x5b, 0x6f, 0x61, 0xcb, 0x36, 0x72, 0xdc, 0x82, 0x55, - 0xf9, 0x7e, 0x51, 0x1e, 0xa7, 0xdc, 0xcd, 0xfc, 0x32, 0xe9, 0x9b, 0x30, 0x92, 0xa2, 0x35, 0x5c, - 0x35, 0xdc, 0x79, 0x88, 0x65, 0xf0, 0xe7, 0xde, 0x17, 0xf0, 0x59, 0xa2, 0x97, 0xaa, 0x8a, 0xa7, - 0x35, 0x67, 0xbf, 0xda, 0x9f, 0xb0, 0x46, 0xfe, 0x07, 0x75, 0xeb, 0x70, 0xfd, 0x8d, 0xff, 0x48, - 0xf8, 0xcf, 0xf8, 0xba, 0xc0, 0x03, 0xfd, 0x06, 0x91, 0xd3, 0xce, 0x9b, 0x71, 0x98, 0xdd, 0x02, - 0xb7, 0xc0, 0x94, 0xf3, 0xee, 0xd0, 0xa2, 0x20, 0x36, 0xf7, 0x2a, 0xbf, 0xec, 0x6e, 0x0d, 0xa0, - 0xb6, 0x2f, 0x42, 0xcc, 0x80, 0xb6, 0x99, 0xe7, 0xf6, 0x47, 0xa8, 0x4d, 0xb9, 0x6e, 0x1c, 0x0b, + 0xdf, 0x00, 0x0a, 0xb0, 0xfe, 0xd3, 0x90, 0x32, 0x9a, 0xe0, 0xc2, 0xc4, 0xc9, 0xdc, 0x10, 0x40, + 0x1b, 0xe3, 0x38, 0xfb, 0xb3, 0x87, 0xbe, 0xa5, 0xd0, 0xac, 0xb3, 0xc0, 0x04, 0x13, 0x08, 0x65, + 0xde, 0xc3, 0x07, 0xbc, 0x0c, 0xd5, 0xf0, 0xab, 0x93, 0x11, 0xdf, 0xc3, 0xae, 0x3f, 0x51, 0x76, + 0xb9, 0xb9, 0x2c, 0x96, 0x50, 0x67, 0x93, 0x88, 0x2c, 0x5e, 0xf5, 0x9f, 0x81, 0x62, 0x40, 0xd4, + 0x9e, 0xe5, 0x7e, 0x52, 0x39, 0x38, 0x46, 0x22, 0x66, 0xd7, 0xe2, 0xdb, 0xc8, 0xe2, 0x6d, 0xdd, + 0xf3, 0xb9, 0x6e, 0x1e, 0x5e, 0xb7, 0x75, 0x8a, 0xae, 0x22, 0x8d, 0x2c, 0x1c, 0x28, 0xf2, 0xf8, + 0x17, 0xe0, 0x47, 0xc6, 0xb8, 0x6b, 0x36, 0x30, 0x90, 0x4d, 0x1a, 0x18, 0x51, 0xa4, 0x9a, 0xc1, + 0x07, 0xb0, 0xd4, 0xdb, 0xd5, 0x2e, 0x8c, 0x9f, 0x32, 0x70, 0x65, 0x30, 0x8a, 0x56, 0xe8, 0x8b, + 0xaa, 0xc4, 0xf8, 0xfa, 0x03, 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0xc0, 0x31, 0xf6, 0x30, 0x4d, 0xb6, 0xcf, 0x72, 0xd4, 0x6b, + 0x19, 0xa0, 0xc2, 0xa9, 0x9a, 0x6d, 0xa0, 0xfe, 0x7a, 0x7e, 0xe1, 0x05, 0x5a, 0xc9, 0xd9, 0x08, + 0x12, 0x37, 0x64, 0xb3, 0x7b, 0xd7, 0xc8, 0xbb, 0x6c, 0xd0, 0x16, 0x70, 0xd3, 0xa4, 0xe6, 0xd3, + 0x1d, 0x90, 0xd6, 0x4e, 0x65, 0x26, 0xb6, 0x02, 0xaf, 0x67, 0x0c, 0xa4, 0x4b, 0xe3, 0x15, 0xa4, + 0x15, 0x3f, 0xbe, 0xd8, 0x7f, 0x3b, 0xfb, 0x5b, 0x09, 0x0d, 0x45, 0x12, 0xbb, 0x9a, 0xf1, 0x3e, + 0x83, 0x76, 0xdf, 0xcc, 0xde, 0xff, 0xed, 0xce, 0x7e, 0xd0, 0xc0, 0x94, 0xc8, 0xc9, 0x64, 0x2f, + 0x80, 0x62, 0x9a, 0x75, 0xee, 0xb1, 0xe8, 0xb4, 0x4c, 0xba, 0x84, 0x15, 0xfc, 0x92, 0x0e, 0xfb, + 0xf6, 0x1b, 0x2d, 0xa5, 0x79, 0x8d, 0x94, 0xf5, 0xa4, 0x6c, 0xe2, 0x50, 0xf3, 0x9f, 0xda, 0xc5, + 0x74, 0x9b, 0xdf, 0x3f, 0x24, 0xca, 0x53, 0xa6, 0xb0, 0x32, 0x83, 0xda, 0xb5, 0xfa, 0x01, 0x4d, + 0xdd, 0xad, 0x26, 0x10, 0x14, 0x1d, 0x2d, 0x1c, 0x5c, 0xcc, 0x82, 0xa0, 0x94, 0x6a, 0x5b, 0x8d, + 0x45, 0xc8, 0x7a, 0x6f, 0x9d, 0x3c, 0xa6, 0x44, 0x7c, 0xe8, 0xa2, 0xd8, 0x8b, 0x9a, 0xc1, 0xd9, + 0x8a, 0x3d, 0xa6, 0x01, 0xfc, 0x5e, 0x7a, 0xaf, 0x72, 0x5e, 0x2c, 0x62, 0x8c, 0xa1, 0x6d, 0x94, + 0x5a, 0x10, 0x0c, 0x30, 0x67, 0xf6, 0xed, 0x1d, 0xa7, 0xf3, 0x93, 0xa5, 0x83, 0x00, 0xfe, 0x39, + 0x2c, 0xab, 0x88, 0x5f, 0xac, 0xbb, 0x3d, 0x77, 0x82, 0x58, 0x5e, 0x80, 0xad, 0x00, 0xee, 0x8d, + 0xa4, 0x58, 0xf6, 0x9e, 0x1b, 0x57, 0xef, 0x57, 0x7f, 0xd3, 0x5b, 0xce, 0xb6, 0x2e, 0xd6, 0x2c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB202.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB202.c index 0c0660289..7d761320f 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB202.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveConcatenatedFMC_GB202.c @@ -39,16070 +39,16070 @@ // static BINDATA_CONST NvU8 kgspBinArchiveConcatenatedFMC_GB202_BINDATA_LABEL_UCODE_IMAGE_PROD_data[] = { - 0x19, 0x05, 0x10, 0x85, 0x18, 0x6f, 0x36, 0x6c, 0x0f, 0xa5, 0x10, 0x9b, 0x13, 0x4f, 0x5b, 0x78, - 0x9e, 0x6a, 0x0e, 0xec, 0xcb, 0x74, 0x31, 0x7b, 0x21, 0xfd, 0x9d, 0x54, 0xb4, 0x2b, 0x7a, 0x78, - 0xa7, 0xad, 0x5d, 0xe4, 0xfb, 0x37, 0xf2, 0x05, 0xa0, 0x38, 0xb2, 0x00, 0xd2, 0x31, 0x32, 0xd1, - 0x7a, 0xc2, 0x93, 0x2e, 0x16, 0x1c, 0xe0, 0xb8, 0x36, 0x13, 0x01, 0x19, 0x54, 0x88, 0x95, 0xaa, - 0xc4, 0x4d, 0x68, 0x1c, 0x10, 0xd5, 0x5e, 0xeb, 0x96, 0x84, 0x3a, 0x2a, 0x60, 0xae, 0xaa, 0x2d, - 0x19, 0x3a, 0x9d, 0x34, 0x69, 0xba, 0xe9, 0xee, 0x23, 0xd5, 0x80, 0x7a, 0xa5, 0xd2, 0xc7, 0x19, - 0x7d, 0x28, 0x0b, 0xea, 0x7e, 0x76, 0xf8, 0xf4, 0x77, 0x98, 0xd1, 0x44, 0xa1, 0xa7, 0x3c, 0x85, - 0x7f, 0x17, 0x75, 0x8d, 0x7d, 0x4f, 0x0b, 0x27, 0x8c, 0x21, 0x59, 0x80, 0x7f, 0xac, 0x2b, 0x2c, - 0xcc, 0x83, 0xb1, 0xf5, 0xc8, 0xd9, 0xc3, 0xbb, 0x8d, 0xe9, 0xe2, 0xc5, 0x08, 0xa1, 0x6d, 0x3a, - 0xf2, 0x31, 0x45, 0xb3, 0x02, 0x44, 0xb9, 0xe4, 0x11, 0x3e, 0x93, 0x50, 0x51, 0xa7, 0xad, 0x88, - 0xd2, 0xc1, 0x7c, 0x3e, 0x58, 0x22, 0xe3, 0x07, 0x27, 0xd4, 0xeb, 0xf2, 0xf7, 0x91, 0x12, 0x95, - 0xac, 0x7e, 0x75, 0x1f, 0x65, 0x4a, 0xa1, 0x58, 0x71, 0x2a, 0xe6, 0x31, 0x43, 0xd5, 0xcd, 0x9e, - 0x53, 0xfe, 0x19, 0x76, 0xf2, 0x49, 0xe9, 0xf6, 0x66, 0xca, 0xf9, 0x25, 0x17, 0x37, 0x4c, 0x76, - 0x10, 0x08, 0x55, 0xc4, 0xba, 0x91, 0x6c, 0xe7, 0x48, 0xf2, 0x87, 0x0a, 0x5d, 0xf5, 0xb1, 0x82, - 0xba, 0xf5, 0x79, 0x0a, 0x16, 0x41, 0x5c, 0x6a, 0xab, 0xb1, 0x10, 0x27, 0x3a, 0x88, 0xf5, 0x40, - 0x33, 0xd2, 0x5f, 0xfe, 0xe7, 0x5f, 0xb4, 0xf4, 0x7a, 0xda, 0xa8, 0x68, 0x56, 0xb5, 0xf4, 0xef, - 0x02, 0xed, 0xf4, 0x9d, 0xee, 0x90, 0xdd, 0xdd, 0x99, 0x02, 0x6a, 0x4f, 0xfc, 0x1b, 0x36, 0xda, - 0xc9, 0x4e, 0x23, 0xf6, 0x3b, 0xad, 0x43, 0xb7, 0xc5, 0xcd, 0xe8, 0xa8, 0x7d, 0x14, 0xa0, 0x60, - 0x18, 0x92, 0x92, 0x82, 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0x2d, 0x11, 0x5c, 0xf3, 0x18, 0xe1, 0xe6, 0xbb, 0xb1, 0x95, 0xf3, 0xe0, 0x4e, + 0xb3, 0xf4, 0x03, 0xb6, 0x63, 0x76, 0x0e, 0x36, 0xb3, 0x49, 0x6d, 0xdb, 0x53, 0x61, 0x57, 0x7a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c index d2c0525e5..867d7e16e 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB100.c @@ -63,12334 +63,12334 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB100_BINDATA_LABEL_UCODE_IMAG 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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-12649,12358 +12649,12358 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmBoot_GB100_BINDATA_LABEL_UCODE_DESC_DBG_s // static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB100_BINDATA_LABEL_UCODE_IMAGE_PROD_data[] = { - 0x2c, 0x4b, 0x81, 0x2f, 0x82, 0xfe, 0xdf, 0x42, 0xd2, 0x36, 0x05, 0x00, 0xfd, 0x1c, 0x40, 0xc2, - 0x04, 0x86, 0xba, 0xb7, 0x6f, 0xfe, 0xea, 0x75, 0x36, 0x7c, 0xbc, 0x6f, 0x30, 0xfd, 0x5e, 0x7d, - 0x24, 0x9c, 0xc2, 0x99, 0x66, 0x33, 0x38, 0x32, 0xbf, 0xae, 0x93, 0x23, 0x70, 0x23, 0xc6, 0xf6, - 0x26, 0x1c, 0x1f, 0x60, 0x74, 0x60, 0x10, 0x5a, 0xc8, 0x81, 0x5a, 0x64, 0xc6, 0xdb, 0x07, 0x2d, - 0x5c, 0xb8, 0x15, 0x93, 0xc0, 0x5e, 0xe5, 0x94, 0x1b, 0x13, 0x6c, 0xfa, 0x8b, 0x01, 0xef, 0x91, - 0x6f, 0x3e, 0x17, 0xb0, 0x33, 0x43, 0xc2, 0x68, 0x40, 0x43, 0x3f, 0x64, 0xe6, 0x29, 0x99, 0x54, - 0xd1, 0x6a, 0xcd, 0x66, 0x3e, 0x6d, 0x54, 0xac, 0xd9, 0x35, 0x05, 0x7c, 0x1d, 0xb1, 0x52, 0xc1, - 0x91, 0x4f, 0x55, 0xf5, 0x96, 0xf4, 0x28, 0x1e, 0x62, 0xae, 0x93, 0xb5, 0x48, 0x02, 0xc3, 0xa6, - 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0xfc, 0xfc, 0xd7, 0x99, 0x21, 0x32, 0xfe, 0x43, 0x39, 0x84, 0xe4, 0xa4, + 0xd7, 0x8d, 0x20, 0x0d, 0xaf, 0xac, 0x6c, 0xf6, 0x45, 0x6a, 0x9f, 0x16, 0x53, 0xf1, 0x9c, 0x0d, + 0x54, 0x2e, 0x91, 0x72, 0x29, 0x13, 0xfb, 0x1d, 0x01, 0x3a, 0x2c, 0x41, 0xcb, 0x50, 0x2f, 0x15, + 0x90, 0x5d, 0x7d, 0xd5, 0x6b, 0xc7, 0x43, 0x82, 0x80, 0x8b, 0xb4, 0xcf, 0xb8, 0x39, 0xb3, 0xaf, + 0x23, 0xc8, 0x2c, 0x72, 0xfb, 0xad, 0x56, 0x93, 0xda, 0x99, 0x98, 0x38, 0x91, 0xf0, 0xe5, 0x66, + 0xc9, 0x88, 0x8e, 0x85, 0xff, 0xaa, 0x2e, 0x24, 0xbf, 0x0c, 0x6b, 0x83, 0x2f, 0x02, 0x58, 0xc4, + 0xc5, 0x20, 0x22, 0x07, 0x77, 0x53, 0xbe, 0x05, 0x16, 0x87, 0x31, 0x00, 0xe0, 0x6a, 0x97, 0x36, + 0x36, 0x30, 0x65, 0x30, 0xd2, 0x48, 0x6f, 0x9a, 0x17, 0xda, 0xfc, 0xbd, 0xfc, 0x31, 0xa0, 0x63, + 0x6b, 0xca, 0xb7, 0xc8, 0xdb, 0xee, 0xca, 0xea, 0xaa, 0x27, 0xcd, 0x53, 0x9d, 0x8f, 0x5a, 0x12, + 0x26, 0xc9, 0xdf, 0x0e, 0x0d, 0x59, 0xe4, 0xbe, 0x6a, 0xe2, 0x7c, 0x72, 0x70, 0xaa, 0x4d, 0xab, + 0x37, 0x7b, 0x16, 0xbe, 0xd2, 0x0a, 0x23, 0xb8, 0x6d, 0x72, 0x94, 0xf8, 0x38, 0xf4, 0x5d, 0x95, + 0x2a, 0x43, 0xee, 0xcd, 0x0e, 0x08, 0x94, 0x07, 0x32, 0x18, 0xc4, 0x43, 0x0a, 0x5e, 0xb0, 0x11, + 0x56, 0x41, 0xef, 0x01, 0x22, 0xdd, 0xd1, 0xa1, 0x6a, 0xd6, 0x79, 0xc3, 0x85, 0x1f, 0x44, 0x93, + 0xd1, 0xff, 0x37, 0xbb, 0x81, 0x83, 0xbf, 0x68, 0x95, 0x3c, 0x7b, 0xec, 0xa7, 0x7d, 0x3e, 0xdd, + 0x31, 0x15, 0x9e, 0x93, 0x7a, 0xb7, 0xd0, 0x17, 0xeb, 0xfe, 0xf8, 0xd8, 0x73, 0xe1, 0x73, 0x68, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB202.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB202.c index 73158c175..23ab41534 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB202.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmBoot_GB202.c @@ -63,13454 +63,13454 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmBoot_GB202_BINDATA_LABEL_UCODE_IMAG 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0xc6, 0x01, 0xc4, 0xf0, 0x7d, 0x31, 0xf6, 0x25, 0x3c, 0xa2, 0xd5, 0x59, 0xe2, 0x8a, 0xf5, 0x99, - 0x86, 0x61, 0x42, 0x37, 0xaa, 0xf9, 0x59, 0x70, 0x1b, 0xb8, 0x09, 0x0c, 0x2e, 0xd3, 0xc8, 0x4c, - 0xc2, 0xe9, 0xd5, 0x6b, 0xf7, 0x32, 0xfc, 0xe5, 0xaf, 0x1d, 0x2f, 0x2a, 0x3f, 0x89, 0x2a, 0x8f, - 0xaf, 0xe9, 0xd3, 0xb8, 0xae, 0x23, 0x89, 0x7b, 0xa9, 0x49, 0xec, 0x86, 0x81, 0x6c, 0x36, 0xe8, - 0xa5, 0x62, 0x05, 0x01, 0x17, 0xb2, 0x89, 0xd8, 0x97, 0x4f, 0x68, 0xf5, 0x25, 0x8b, 0x32, 0x9f, - 0x81, 0x8f, 0x18, 0x5c, 0xa3, 0xc4, 0xc2, 0x8e, 0x4a, 0xf1, 0xce, 0x9c, 0x28, 0xaa, 0xaa, 0x71, - 0x5e, 0xa8, 0x27, 0xd6, 0xe3, 0xa4, 0x6c, 0x6c, 0x34, 0x5a, 0x9b, 0xb1, 0xfc, 0x9c, 0xfb, 0x6b, - 0xfd, 0x1b, 0x9a, 0xfe, 0x83, 0x8a, 0x39, 0x8a, 0x40, 0x5b, 0xc6, 0x70, 0xc1, 0xb7, 0x89, 0x38, - 0x96, 0x91, 0xa4, 0x39, 0xcf, 0xde, 0x97, 0x0a, 0x0a, 0x1d, 0x37, 0x71, 0xa8, 0x76, 0xa8, 0x8c, - 0x31, 0xa0, 0x66, 0x72, 0xfb, 0xce, 0xa8, 0x4d, 0x91, 0x3e, 0x0d, 0x49, 0x90, 0x58, 0x21, 0x69, - 0xf9, 0x71, 0x2b, 0x3b, 0x78, 0xc4, 0xab, 0x30, 0xe6, 0xf0, 0x5f, 0x97, 0x03, 0x5f, 0x6c, 0x2d, - 0x44, 0x27, 0x22, 0xb5, 0x7e, 0xf0, 0xc1, 0xf8, 0xfb, 0xe8, 0x1c, 0xcc, 0xd8, 0x81, 0x5a, 0xfa, - 0xa9, 0x91, 0xe3, 0xf2, 0x02, 0xc7, 0xa1, 0x7e, 0x4b, 0x38, 0x4a, 0x6b, 0xfe, 0xc9, 0x45, 0xbf, - 0xfe, 0x7c, 0xe9, 0x14, 0x61, 0x71, 0xd3, 0x99, 0x41, 0x94, 0x3b, 0x71, 0x92, 0x9f, 0xb5, 0x3f, - 0x3d, 0x88, 0x0b, 0x26, 0x47, 0xeb, 0xe7, 0x89, 0x7c, 0x25, 0x8e, 0xfd, 0x71, 0x17, 0xe0, 0xd2, - 0x46, 0xd6, 0xbd, 0xdb, 0x80, 0xe6, 0xd0, 0x98, 0x74, 0xf3, 0x62, 0x59, 0x96, 0xcc, 0x65, 0x61, - 0x4b, 0x77, 0x20, 0x3d, 0x6a, 0x84, 0x49, 0x32, 0x2b, 0xc2, 0x9f, 0x43, 0x53, 0x64, 0x9c, 0x24, - 0xf9, 0xa0, 0x3f, 0xfa, 0xbb, 0x38, 0x05, 0xe3, 0x89, 0x4a, 0xdf, 0x4a, 0x16, 0x57, 0x17, 0xa3, - 0xa8, 0xa3, 0xe6, 0x10, 0x04, 0x51, 0x37, 0xf8, 0xb1, 0x0b, 0xc0, 0x2b, 0x6a, 0x17, 0x59, 0xbc, - 0xd9, 0xa9, 0x21, 0xe8, 0xc7, 0x65, 0x44, 0xa3, 0x62, 0x50, 0x6a, 0x8f, 0xde, 0xd8, 0x72, 0x1c, - 0xa8, 0xe3, 0x97, 0xf7, 0xbe, 0x03, 0x8f, 0x09, 0x47, 0xf0, 0x50, 0xad, 0x82, 0xfe, 0x18, 0xab, - 0x05, 0x93, 0xfd, 0xd9, 0x34, 0x29, 0xa0, 0x02, 0x3c, 0x54, 0xd0, 0x75, 0x83, 0xd6, 0xaa, 0xe9, - 0xbc, 0x71, 0xaf, 0xdc, 0xf4, 0x03, 0x19, 0x89, 0xfc, 0x6d, 0x60, 0xd2, 0x5f, 0x7c, 0x34, 0xc0, - 0x64, 0xb6, 0x46, 0x5b, 0xb7, 0xdb, 0x90, 0xea, 0xb0, 0x30, 0xf1, 0x2b, 0x0a, 0x29, 0x35, 0x5d, + 0x0a, 0x85, 0x66, 0x22, 0xed, 0x5e, 0xe6, 0x8c, 0x11, 0x7e, 0x9f, 0xad, 0x29, 0xb1, 0x37, 0x5e, + 0x8a, 0x20, 0x4e, 0x9a, 0xeb, 0xff, 0x8e, 0x27, 0x61, 0x54, 0xf9, 0xa8, 0xee, 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0x9d, 0x85, 0x11, 0x3b, 0xf9, 0x65, 0x04, 0xfe, 0x0f, 0x30, 0x8f, 0x3d, 0xfc, 0xa5, + 0x55, 0xd3, 0x52, 0x88, 0x5d, 0x80, 0x4a, 0x90, 0xb8, 0x0c, 0xce, 0x00, 0x71, 0x12, 0x9f, 0xab, + 0xe0, 0x7d, 0x8b, 0x1b, 0x93, 0xc3, 0xa1, 0xa2, 0x3c, 0x8a, 0x0a, 0xb3, 0x6d, 0x66, 0xe7, 0x62, + 0x26, 0x86, 0x96, 0x49, 0xbb, 0xb6, 0xaa, 0x89, 0x66, 0x73, 0xcd, 0x6d, 0xec, 0x55, 0xac, 0xdf, + 0x68, 0x46, 0x97, 0xcc, 0xf5, 0x43, 0x74, 0xd9, 0x85, 0xd0, 0xd7, 0xec, 0x91, 0x6d, 0xdc, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB100.c index fd5fb7d9e..7bed206df 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB100.c @@ -43,12215 +43,12215 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GB100_BINDATA_LA 0x00, 0x00, 0x00, 0x00, 0x00, 0xa8, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf2, 0x41, 0xb5, 0x80, 0xc7, 0x84, 0x18, 0x69, - 0x41, 0x46, 0x09, 0x40, 0xd6, 0xc6, 0x14, 0xfe, 0xca, 0x5f, 0xbb, 0xf6, 0xd2, 0x49, 0xf6, 0x44, - 0xdf, 0xe8, 0xd5, 0x1f, 0xef, 0x65, 0xf2, 0xfc, 0x65, 0xad, 0xd9, 0x90, 0x4e, 0x8a, 0x30, 0xa8, - 0xb6, 0x98, 0x6a, 0x94, 0xfd, 0x4d, 0x48, 0x2e, 0xde, 0x0d, 0x31, 0xc9, 0xf4, 0xf8, 0x63, 0x2d, - 0x33, 0x69, 0xfe, 0x28, 0x22, 0xd4, 0xed, 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0x03, 0xa5, 0x42, 0xee, 0x17, 0xba, 0xd9, + 0xef, 0xb4, 0xb9, 0x32, 0xdd, 0x45, 0x41, 0xbd, 0x1e, 0x24, 0x7d, 0xd7, 0x3c, 0x58, 0x3e, 0x76, + 0x0c, 0x1f, 0xc9, 0x99, 0x6e, 0x27, 0x03, 0x2b, 0xe9, 0x14, 0x39, 0x4d, 0xe9, 0xe8, 0x60, 0x10, + 0x8b, 0xcc, 0xa0, 0xec, 0xc2, 0x17, 0x88, 0xa4, 0x37, 0x81, 0x2f, 0x16, 0xa3, 0x3d, 0x88, 0x6c, + 0xc5, 0xd5, 0x15, 0x43, 0x9a, 0xc6, 0x91, 0x36, 0x48, 0x9e, 0x46, 0xeb, 0xd6, 0x42, 0x1d, 0xed, + 0xe2, 0x21, 0xea, 0xce, 0xef, 0x7e, 0xa4, 0x5e, 0x3b, 0xe2, 0x02, 0xc1, 0xec, 0x03, 0x97, 0x6c, + 0x91, 0xb6, 0x17, 0xec, 0x90, 0x8b, 0x02, 0x2e, 0x77, 0x2f, 0x96, 0xe6, 0xc9, 0x79, 0xbe, 0x58, + 0x38, 0x44, 0xb4, 0x97, 0x0b, 0x7d, 0xe0, 0x0b, 0xa6, 0x90, 0xf2, 0x75, 0xe8, 0xb4, 0xe0, 0x79, + 0x3a, 0x89, 0x9d, 0xe8, 0xdf, 0x81, 0x04, 0xfe, 0x27, 0xce, 0x2e, 0x16, 0x2e, 0x41, 0x95, 0xe4, + 0x0d, 0xe2, 0x5a, 0x87, 0x8c, 0xd0, 0x63, 0x63, 0x29, 0xe4, 0x19, 0xa1, 0xbb, 0x72, 0x2d, 0x17, + 0x50, 0xf9, 0xa1, 0xbc, 0xda, 0xb1, 0x21, 0xe0, 0xaf, 0x4f, 0x50, 0xa3, 0x34, 0x7e, 0x4a, 0x94, + 0x04, 0x30, 0x2c, 0xe3, 0x47, 0xe1, 0x60, 0xc1, 0xac, 0xc1, 0x0c, 0x55, 0x1a, 0xb4, 0x36, 0x7b, + 0xbc, 0x9b, 0xdf, 0x44, 0x30, 0xaf, 0x79, 0x28, 0xae, 0xa3, 0xed, 0x2c, 0x82, 0x80, 0x34, 0x23, + 0x29, 0x37, 0xe1, 0x9f, 0x0c, 0x63, 0x07, 0x44, 0xf4, 0x10, 0xac, 0xd6, 0x99, 0x26, 0xbe, 0xd4, + 0x20, 0x6b, 0xd7, 0x15, 0xb3, 0xf8, 0xdb, 0xae, 0xe4, 0x2b, 0x10, 0x2d, 0x70, 0x75, 0xda, 0x24, + 0x5c, 0x85, 0xa2, 0xf2, 0x18, 0xdc, 0xa9, 0x71, 0x95, 0xb7, 0xba, 0x31, 0x3c, 0xf6, 0xbd, 0x93, + 0xe2, 0x64, 0x0f, 0x22, 0xa0, 0xd0, 0x64, 0xde, 0xa3, 0x88, 0x29, 0x6b, 0x4a, 0x9e, 0xc1, 0x85, + 0x19, 0x62, 0xc5, 0xda, 0x26, 0x46, 0x5d, 0xb3, 0x5e, 0x78, 0x0f, 0x17, 0xb9, 0xa8, 0xf3, 0x78, + 0x32, 0xdb, 0x64, 0xa7, 0x6c, 0x31, 0x89, 0x7e, 0xe5, 0xbc, 0xba, 0x86, 0xe0, 0x05, 0x96, 0x73, + 0xf0, 0x8a, 0x19, 0xcb, 0x52, 0x96, 0x9c, 0x20, 0x84, 0x54, 0x87, 0x57, 0xdb, 0x39, 0xe5, 0xc6, + 0x30, 0xb1, 0x68, 0xd5, 0x24, 0x33, 0x41, 0xad, 0x6d, 0xd2, 0x24, 0x1e, 0xc0, 0xf3, 0xb3, 0xbf, + 0xd3, 0x90, 0x6b, 0x99, 0x25, 0x52, 0xaf, 0x2a, 0x8b, 0x14, 0x6d, 0x74, 0xd4, 0xfc, 0x25, 0x85, + 0x3f, 0x6b, 0xa7, 0x4c, 0x75, 0xe8, 0x02, 0x23, 0xf2, 0x26, 0x24, 0xa4, 0x43, 0x40, 0x9e, 0x91, + 0x98, 0x66, 0xcc, 0x16, 0x1b, 0x57, 0xd9, 0x05, 0xb1, 0x26, 0xf8, 0x35, 0x96, 0xb4, 0x26, 0xf7, + 0x30, 0x25, 0x1f, 0xaa, 0x4f, 0x77, 0xef, 0xe5, 0xa6, 0xb5, 0x6f, 0xff, 0x24, 0xab, 0x88, 0x23, + 0xe0, 0x82, 0xc0, 0x50, 0x2d, 0x92, 0x4b, 0x8b, 0x04, 0x48, 0xe4, 0x94, 0xe6, 0x71, 0xc2, 0x37, + 0x0f, 0xa8, 0xae, 0x15, 0x5d, 0x4e, 0x1d, 0x06, 0x31, 0xe6, 0x02, 0x79, 0x6f, 0x49, 0x3a, 0xc2, + 0x98, 0x26, 0xef, 0xbf, 0x2f, 0x71, 0xfd, 0x6a, 0xac, 0xbc, 0xd3, 0xe1, 0xd7, 0x18, 0x4a, 0x94, + 0xcb, 0x2f, 0xda, 0xbb, 0xc6, 0xde, 0x74, 0xe1, 0x32, 0xd2, 0x07, 0xdf, 0x16, 0xcf, 0xab, 0xc7, + 0xd0, 0x19, 0xe4, 0xd6, 0xc9, 0x98, 0x69, 0x4e, 0x10, 0xdc, 0x25, 0x0a, 0x45, 0xf6, 0xa6, 0x65, + 0x61, 0x73, 0xab, 0x7f, 0x65, 0x0e, 0xa6, 0x45, 0x72, 0x4b, 0x87, 0x93, 0x41, 0x77, 0xa1, 0xe0, + 0xb9, 0xb3, 0x27, 0xbc, 0x8f, 0x61, 0xf2, 0x3a, 0xc3, 0x67, 0x6b, 0x2f, 0x12, 0xdf, 0x55, 0x50, + 0xbc, 0x0c, 0x3d, 0xb0, 0x7c, 0xc5, 0x8c, 0x72, 0x4f, 0xd0, 0xe7, 0xe2, 0x91, 0x6c, 0x89, 0x74, + 0xe2, 0xd0, 0x92, 0x4e, 0xaf, 0xaa, 0x96, 0x2c, 0xad, 0xde, 0xdc, 0xdb, 0x09, 0x58, 0x35, 0x1a, + 0x3f, 0x47, 0x99, 0xf8, 0xed, 0x95, 0x83, 0x44, 0x48, 0x30, 0x8d, 0x9b, 0xb6, 0xfa, 0x5e, 0xbe, + 0x9c, 0x0f, 0x41, 0x6d, 0x6c, 0x62, 0xe8, 0xf7, 0x99, 0xe8, 0xb2, 0x88, 0xb0, 0xaa, 0x06, 0x65, + 0xe7, 0xfd, 0x53, 0xee, 0xeb, 0xa3, 0xb3, 0xcc, 0xec, 0x84, 0x85, 0x5c, 0x96, 0x9e, 0x28, 0x36, + 0x29, 0x2d, 0x57, 0x24, 0x59, 0xda, 0xf3, 0x3f, 0x87, 0xab, 0x9b, 0x9d, 0xe7, 0x86, 0xef, 0x8d, + 0x72, 0xef, 0xa7, 0xfd, 0xd1, 0x26, 0x77, 0xd5, 0x79, 0x54, 0x69, 0x4e, 0x78, 0x08, 0x95, 0x92, + 0x69, 0x84, 0xa1, 0xef, 0x80, 0x83, 0x64, 0x6a, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12284,9 +12284,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GB100_BINDATA_LABEL_UC // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GB100_BINDATA_LABEL_UCODE_HASH_data[] = { - 0x68, 0x72, 0x38, 0x44, 0x31, 0x5f, 0x0b, 0x12, 0x5c, 0x28, 0x47, 0xdb, 0x4a, 0x79, 0xb6, 0xd8, - 0x6d, 0x70, 0x30, 0xb5, 0x21, 0xd9, 0x98, 0x48, 0x35, 0xd0, 0x2d, 0x3e, 0x86, 0x1b, 0x75, 0xc8, - 0x04, 0x48, 0x65, 0xa1, 0xa1, 0xc4, 0xaa, 0xbe, 0xb7, 0x32, 0xab, 0x14, 0x31, 0x74, 0x3f, 0x37, + 0x10, 0xcf, 0xf4, 0x11, 0x16, 0xe9, 0x14, 0x6b, 0x12, 0xb5, 0x3d, 0xc4, 0x7d, 0x64, 0xd1, 0xd4, + 0x04, 0x5a, 0x39, 0x25, 0x20, 0x81, 0x29, 0x26, 0x12, 0xfc, 0x5a, 0x6f, 0xda, 0x8b, 0x70, 0xf2, + 0x3b, 0xe7, 0x2b, 0x90, 0xcb, 0x1e, 0x9f, 0x4b, 0x33, 0xac, 0x9c, 0x2f, 0x3c, 0x45, 0xfb, 0xc7, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12319,12 +12319,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GB100_BINDATA_LABEL_UC // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GB100_BINDATA_LABEL_UCODE_SIG_data[] = { - 0x23, 0x97, 0xfa, 0x14, 0xd7, 0x83, 0xa4, 0xa3, 0x67, 0x66, 0x4e, 0xc6, 0x01, 0xa4, 0xbc, 0xfc, - 0xce, 0x34, 0x1e, 0xab, 0x2d, 0x96, 0xa6, 0xa4, 0xa0, 0xd6, 0x5e, 0x9c, 0x77, 0x58, 0x5d, 0x1b, - 0x9b, 0x46, 0x3b, 0x0f, 0x7b, 0x4c, 0x5b, 0x4e, 0x11, 0x44, 0xa6, 0xcf, 0xb7, 0x2d, 0xfc, 0xea, - 0x12, 0xbd, 0x9d, 0x6f, 0xd0, 0xc8, 0xed, 0xfe, 0xf1, 0x05, 0x93, 0x04, 0x1e, 0x5b, 0xe2, 0x55, - 0x79, 0x72, 0x13, 0x87, 0xfe, 0x13, 0x12, 0x6f, 0x80, 0x6b, 0xf4, 0xcf, 0x55, 0xbc, 0x2e, 0x9d, - 0xbf, 0x44, 0x8e, 0x81, 0x2b, 0xa7, 0x75, 0x0e, 0xdc, 0x70, 0x61, 0x66, 0x5b, 0x64, 0xa7, 0xd2, + 0x34, 0x7f, 0x1c, 0xf5, 0x75, 0x80, 0x5a, 0xd9, 0x45, 0x96, 0x4e, 0x33, 0x0b, 0xd9, 0x5e, 0x37, + 0xdc, 0x0a, 0xfd, 0xd0, 0x58, 0xc0, 0xc4, 0x9c, 0x96, 0xb0, 0x99, 0x0f, 0xbf, 0xfc, 0xbb, 0x37, + 0x1a, 0xca, 0x32, 0x87, 0xc9, 0x8b, 0x0c, 0x89, 0x96, 0xc5, 0x4b, 0xd8, 0xb8, 0x2a, 0x92, 0x3f, + 0xdd, 0x4f, 0xb5, 0x36, 0x0f, 0xb0, 0x2f, 0xcc, 0xcc, 0xe7, 0x1d, 0x8d, 0x2a, 0x82, 0x5d, 0x86, + 0x21, 0xd2, 0x0b, 0xaa, 0xee, 0x59, 0x45, 0x4a, 0x9d, 0x3c, 0xe7, 0xec, 0x99, 0xb7, 0xb6, 0x16, + 0xcb, 0x33, 0x9b, 0x6f, 0x2d, 0x90, 0xaa, 0xed, 0x09, 0x96, 0xad, 0x04, 0x99, 0xec, 0xce, 0xf9, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB202.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB202.c index 350b406a9..3fa083b51 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB202.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmCcFmcGfwProdSigned_GB202.c @@ -43,16071 +43,16071 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GB202_BINDATA_LA 0x00, 0x00, 0x00, 0x00, 0x00, 0xa9, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xc0, 0xdb, 0x5d, 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0x59, + 0x93, 0x14, 0xe9, 0x01, 0x7e, 0x5a, 0xf9, 0xfe, 0x69, 0xbb, 0x51, 0xe7, 0xcc, 0xaf, 0x35, 0x72, + 0xa1, 0x9e, 0x9b, 0x93, 0xdb, 0xb8, 0x47, 0x5e, 0xca, 0xe0, 0x65, 0x7f, 0x90, 0x59, 0xf9, 0x0e, + 0x21, 0xe5, 0xa4, 0x6f, 0x52, 0x2d, 0x82, 0xaa, 0x31, 0xb1, 0x27, 0xa4, 0x70, 0xd2, 0x56, 0xfc, + 0xd7, 0xbf, 0xeb, 0x25, 0x5c, 0x3b, 0xbc, 0xb6, 0xeb, 0x84, 0xe3, 0x44, 0xd9, 0x49, 0x83, 0x96, + 0xde, 0x10, 0x9d, 0x89, 0xfb, 0x11, 0xef, 0x6e, 0x25, 0x26, 0x02, 0x2c, 0x1c, 0x6e, 0xf6, 0x93, + 0x51, 0x3a, 0x0a, 0xba, 0xe8, 0x69, 0x8b, 0xe3, 0xff, 0x46, 0xef, 0xfb, 0x2d, 0x97, 0xc6, 0x3a, + 0xcd, 0x2e, 0x40, 0xdf, 0x4a, 0x28, 0x73, 0xc9, 0xdb, 0x60, 0xf6, 0x8f, 0x0e, 0x23, 0x65, 0x9a, + 0xf4, 0x55, 0xd6, 0xba, 0x1a, 0xec, 0xa8, 0xaf, 0x17, 0x68, 0xd8, 0x1c, 0xc0, 0x57, 0x6f, 0x13, + 0x23, 0xee, 0x7a, 0x6e, 0x2d, 0xe9, 0x3b, 0xbb, 0x52, 0x2b, 0xbc, 0x6b, 0xcd, 0x94, 0x95, 0x11, + 0x4c, 0x3a, 0x23, 0x8c, 0x03, 0xfd, 0x25, 0x7f, 0x7a, 0xf0, 0xa3, 0xf6, 0xe0, 0xe8, 0x1a, 0xac, + 0x49, 0xb0, 0xb0, 0x24, 0x37, 0x85, 0x46, 0x94, 0xe6, 0x99, 0xa5, 0x21, 0x98, 0xee, 0xef, 0x66, + 0x45, 0x6a, 0xfb, 0xcf, 0xdb, 0x22, 0x5b, 0x6e, 0x70, 0x2c, 0xa3, 0xf7, 0x22, 0xf4, 0x6d, 0x4e, + 0x46, 0xc1, 0x42, 0x90, 0x32, 0xe4, 0xd3, 0xca, 0x2d, 0xba, 0x51, 0x99, 0x00, 0x0f, 0x65, 0xe1, + 0x2f, 0x73, 0xc7, 0x7b, 0x5c, 0x25, 0xcf, 0xd4, 0x24, 0x29, 0xea, 0xf8, 0xd3, 0x27, 0xa4, 0xbe, + 0x79, 0xdd, 0xd6, 0xff, 0xdb, 0x11, 0xa8, 0x98, 0x04, 0x7a, 0xd1, 0x0e, 0x94, 0x33, 0x86, 0x10, + 0x8b, 0x0c, 0x95, 0xe0, 0x31, 0xd7, 0x32, 0xe3, 0x41, 0x8c, 0xb8, 0x48, 0x6a, 0x40, 0x9b, 0x62, + 0x35, 0x18, 0xe1, 0x49, 0xec, 0xd4, 0x84, 0x09, 0xe1, 0xb5, 0xf5, 0xc4, 0x4b, 0xc1, 0xbd, 0xb8, + 0x50, 0x23, 0xa2, 0xf6, 0xb1, 0x7d, 0xc4, 0x53, 0x6d, 0x9f, 0xef, 0x71, 0x92, 0x56, 0xb9, 0x0d, + 0x41, 0x26, 0xfe, 0xa0, 0x91, 0x5a, 0x13, 0x84, 0x74, 0x1d, 0xd5, 0x71, 0x82, 0xe9, 0xbf, 0x7f, + 0xd6, 0xe3, 0x12, 0x2d, 0x25, 0xf5, 0xba, 0x31, 0x40, 0xce, 0xc1, 0xb4, 0x29, 0x53, 0xaf, 0x98, + 0x37, 0x00, 0x8f, 0x09, 0x77, 0x58, 0x41, 0x89, 0x74, 0xfb, 0x42, 0x0f, 0x97, 0x43, 0xae, 0xf5, + 0x6c, 0x06, 0x3f, 0x80, 0x2c, 0x1f, 0xf6, 0xdf, 0x4d, 0x1f, 0x36, 0x57, 0x3a, 0xb1, 0x46, 0xbd, + 0x24, 0xe8, 0xa8, 0x20, 0xf3, 0xd1, 0xe5, 0x20, 0xe4, 0xec, 0x83, 0x0b, 0x41, 0x7d, 0xd7, 0x11, + 0x75, 0xd7, 0xd1, 0x54, 0x3e, 0xf8, 0xeb, 0x44, 0x9e, 0xd9, 0x91, 0xb0, 0xaf, 0x9b, 0x38, 0xec, + 0x0f, 0x2d, 0xb5, 0xe6, 0x98, 0xb2, 0x62, 0xe2, 0xce, 0x2d, 0x0b, 0xbe, 0xc1, 0xad, 0x7f, 0x89, + 0xe4, 0x7a, 0xfc, 0xfa, 0x21, 0x9a, 0xe7, 0xaa, 0x71, 0xa7, 0xd8, 0x41, 0xf7, 0xc6, 0x43, 0xf9, + 0xfb, 0x9c, 0x4f, 0x87, 0x8f, 0x2c, 0x73, 0x3c, 0x4f, 0x7d, 0x73, 0xab, 0x94, 0xfe, 0xd8, 0x6e, + 0x6e, 0x3b, 0xc5, 0x1c, 0x9f, 0x67, 0x2d, 0x67, 0x60, 0x6e, 0xcd, 0x18, 0x50, 0xb9, 0xb4, 0x4b, + 0x1c, 0x3f, 0x8c, 0x74, 0x7f, 0xcd, 0x5d, 0x2b, 0x84, 0xf2, 0x51, 0x12, 0x38, 0x11, 0x4d, 0xea, + 0x2f, 0x7c, 0x80, 0x60, 0x77, 0xe4, 0x1a, 0x8f, 0xf5, 0xc3, 0x22, 0x52, 0x8f, 0xa1, 0xac, 0x26, + 0x15, 0x8f, 0x0f, 0x8d, 0x56, 0x56, 0x8c, 0x27, 0x56, 0x1e, 0xba, 0x3a, 0x0d, 0x36, 0x8c, 0xbd, + 0xd8, 0xdb, 0x17, 0x3f, 0xb3, 0x03, 0x42, 0xb3, 0x10, 0xf4, 0x0a, 0xab, 0x31, 0xc0, 0xea, 0x33, + 0x17, 0x0b, 0x7c, 0xb8, 0x48, 0xf0, 0x5e, 0xc1, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -16140,9 +16140,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GB202_BINDATA_LABEL_UC // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GB202_BINDATA_LABEL_UCODE_HASH_data[] = { - 0xdf, 0xbb, 0x1b, 0x4b, 0xe4, 0x7f, 0x3e, 0x17, 0x2e, 0xf8, 0x74, 0x97, 0xc9, 0x1e, 0x46, 0x17, - 0x48, 0x95, 0x74, 0xf9, 0xb8, 0xb2, 0xe2, 0xbb, 0xca, 0x6f, 0x92, 0xf5, 0x0a, 0xea, 0x04, 0xbd, - 0xbc, 0xfb, 0xf7, 0x50, 0x83, 0x87, 0x84, 0xe4, 0x67, 0x33, 0xff, 0x57, 0x01, 0x28, 0xed, 0x30, + 0xeb, 0xb6, 0xf1, 0xf4, 0xc4, 0x27, 0x2a, 0x2d, 0x68, 0x48, 0x7d, 0x2d, 0xea, 0x8b, 0xb8, 0x18, + 0x0d, 0x06, 0x8e, 0x33, 0xbd, 0x09, 0x5b, 0x70, 0x34, 0x77, 0x9d, 0x75, 0xb7, 0xf4, 0x2c, 0x68, + 0x70, 0x01, 0xac, 0xf3, 0x40, 0x6d, 0x15, 0xbd, 0xeb, 0x7a, 0x38, 0x1c, 0xe1, 0xa5, 0x25, 0x35, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -16175,12 +16175,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmCcFmcGfwProdSigned_GB202_BINDATA_LABEL_UC // static BINDATA_CONST NvU8 kgspBinArchiveGspRmCcFmcGfwProdSigned_GB202_BINDATA_LABEL_UCODE_SIG_data[] = { - 0x3a, 0x93, 0x61, 0x70, 0x91, 0x2c, 0x2d, 0x12, 0x2e, 0x5c, 0xc0, 0xb5, 0x48, 0xc9, 0xbe, 0xf3, - 0x35, 0xb5, 0xc7, 0xec, 0x27, 0xb6, 0xf8, 0xa2, 0xbc, 0xfe, 0xe4, 0xed, 0x4c, 0x58, 0xc0, 0x9b, - 0x88, 0x4b, 0x9f, 0x3d, 0xde, 0xba, 0x15, 0xd7, 0xcc, 0x70, 0x48, 0xf8, 0x2a, 0x52, 0xcc, 0x51, - 0xff, 0x3a, 0x61, 0x46, 0x5c, 0x2c, 0xef, 0x58, 0x9f, 0x7e, 0x5d, 0xc7, 0xb8, 0x10, 0x12, 0xeb, - 0xc8, 0xd4, 0xb3, 0x69, 0x51, 0x17, 0xf3, 0x9c, 0xc2, 0x8e, 0xb6, 0x52, 0x89, 0xca, 0x48, 0x2e, - 0x0c, 0xf6, 0xee, 0x84, 0xac, 0x46, 0x41, 0xab, 0x83, 0xe6, 0x97, 0x6a, 0xbf, 0xc9, 0x3e, 0x9e, + 0x2e, 0xa0, 0x73, 0xc7, 0xcb, 0xe2, 0x71, 0x05, 0xfe, 0x38, 0xa5, 0x0e, 0x27, 0x88, 0x98, 0x6e, + 0xc8, 0x21, 0xd3, 0x2d, 0x9e, 0xc5, 0xbc, 0xaa, 0xa5, 0x26, 0x7e, 0xab, 0x7d, 0xcb, 0x91, 0xc1, + 0x2b, 0x0c, 0xf8, 0x52, 0xfd, 0x11, 0x4f, 0xd7, 0x76, 0x50, 0x14, 0xa3, 0xbe, 0x6f, 0x8a, 0x01, + 0x2f, 0x3b, 0xf7, 0x54, 0xb0, 0x60, 0x6c, 0x1a, 0x26, 0x11, 0xfc, 0x08, 0x5b, 0x9e, 0x00, 0x57, + 0xea, 0xa9, 0x0b, 0x63, 0xda, 0x49, 0xb3, 0xa7, 0xe0, 0x11, 0x08, 0x4a, 0x06, 0x6b, 0x41, 0x91, + 0x7d, 0x81, 0x21, 0xf6, 0xe4, 0xd3, 0x41, 0x4a, 0xd5, 0x42, 0x15, 0x5d, 0xe2, 0x76, 0x32, 0xa2, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c index 067ed9c0c..c3b906ab5 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB100.c @@ -43,12199 +43,12199 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_BINDATA_LAB 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc7, 0x8e, 0xc8, 0xd5, 0x45, 0xa5, 0xbc, 0x3d, - 0x7d, 0xac, 0x31, 0xfb, 0x76, 0x22, 0x0d, 0x75, 0xdd, 0x55, 0x0a, 0x4b, 0x19, 0xfc, 0xc9, 0x9c, - 0x82, 0x83, 0x17, 0x74, 0x31, 0xd8, 0x49, 0xab, 0x4f, 0x8b, 0x6b, 0x42, 0x68, 0x3e, 0x8e, 0xec, - 0x61, 0xde, 0xf6, 0xf1, 0xc5, 0x0e, 0xb6, 0x2b, 0x59, 0xd5, 0x83, 0xde, 0x46, 0x65, 0x45, 0x36, - 0xbd, 0x4f, 0x17, 0xd4, 0x25, 0x23, 0x5a, 0x38, 0x31, 0x5c, 0xef, 0x61, 0xb3, 0x90, 0xf5, 0xd3, - 0xbe, 0x2f, 0x20, 0x0a, 0xbb, 0x2c, 0xc4, 0x8e, 0xd7, 0xbb, 0x89, 0x1f, 0x0c, 0xf5, 0x9b, 0xc6, - 0xd2, 0xc6, 0x48, 0xe0, 0x51, 0x06, 0xd6, 0x98, 0xff, 0x48, 0x1f, 0xf7, 0xd7, 0x93, 0x08, 0x4a, - 0xb8, 0x37, 0x8c, 0xf2, 0x8c, 0x12, 0x1f, 0xad, 0xf0, 0xd6, 0x29, 0x9e, 0x18, 0xdd, 0x60, 0x41, - 0x5b, 0x50, 0xe1, 0xc8, 0x50, 0xc7, 0x42, 0x35, 0xa7, 0xde, 0xbe, 0x9d, 0x18, 0x44, 0x36, 0xe2, - 0x8d, 0xfc, 0xdf, 0x92, 0xda, 0x82, 0x47, 0xf9, 0x06, 0xc7, 0x61, 0x30, 0x61, 0xc3, 0x22, 0x54, - 0x05, 0x5f, 0xfd, 0xe6, 0x0d, 0xf5, 0xd5, 0x7c, 0x6e, 0x62, 0x7b, 0x58, 0xd5, 0x64, 0x65, 0xd9, - 0x25, 0xf2, 0xe1, 0x49, 0x94, 0x57, 0x2e, 0x77, 0xbc, 0x60, 0xaf, 0xbb, 0xd1, 0x73, 0xbe, 0x45, - 0xab, 0x07, 0x07, 0x72, 0xaa, 0x6a, 0xda, 0x83, 0x28, 0xc1, 0x1f, 0xec, 0x91, 0xc3, 0x8f, 0x57, - 0x0f, 0xab, 0x03, 0x42, 0xc8, 0x8f, 0xc5, 0x64, 0x3f, 0x68, 0x1f, 0xcd, 0xf7, 0x2c, 0xda, 0x44, - 0x6f, 0x67, 0x93, 0x0a, 0xc0, 0x7d, 0x28, 0x47, 0x49, 0xa9, 0x6b, 0xa4, 0x2e, 0x35, 0xc9, 0xc5, - 0xc2, 0x5b, 0xa0, 0xcb, 0x7e, 0x0b, 0x22, 0xb5, 0xd7, 0x94, 0xed, 0xf3, 0xbb, 0xf1, 0x61, 0x84, - 0x65, 0x17, 0xf3, 0x68, 0x7f, 0xf6, 0xc6, 0x68, 0x43, 0x32, 0xd6, 0xea, 0x99, 0xf9, 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0x2a, 0x6e, 0xc3, 0xce, 0x5b, 0x5e, 0xa1, 0xd2, 0xe7, 0x30, 0x0b, 0x34, 0x77, + 0x5b, 0x4a, 0x98, 0x1b, 0x52, 0xab, 0x29, 0xbe, 0x42, 0x0d, 0x8c, 0xf5, 0x85, 0xf5, 0x99, 0xf4, + 0xb2, 0x10, 0xa3, 0x36, 0xf0, 0xb5, 0x3a, 0x89, 0x4b, 0x35, 0x2a, 0x94, 0xfa, 0xbe, 0xcc, 0x6a, + 0xda, 0xbe, 0x23, 0xb6, 0xbd, 0xd2, 0xf3, 0x57, 0x1a, 0x2a, 0x05, 0xd8, 0xb6, 0x84, 0x25, 0x6e, + 0x16, 0x97, 0xcd, 0xe2, 0x34, 0xcc, 0xca, 0x68, 0x93, 0x15, 0x39, 0x3a, 0xe2, 0x15, 0xee, 0x93, + 0x2f, 0x1c, 0x0f, 0xd8, 0x7b, 0x66, 0x77, 0xc4, 0x46, 0xe4, 0xa7, 0x73, 0xc0, 0x39, 0xcc, 0xcb, + 0x6a, 0x52, 0xb9, 0x63, 0xff, 0x91, 0x42, 0xfa, 0xfc, 0x2b, 0x60, 0xba, 0x41, 0x71, 0xb6, 0x52, + 0x1c, 0x30, 0x34, 0xef, 0x6a, 0x07, 0xfb, 0x3e, 0xcd, 0x37, 0x60, 0xba, 0xa6, 0x5b, 0xc4, 0x5e, + 0x47, 0x65, 0xcf, 0x54, 0x3f, 0x1e, 0x39, 0xb6, 0xd8, 0xb9, 0x83, 0xca, 0x8c, 0x8b, 0xb9, 0x42, + 0x84, 0x33, 0x64, 0x56, 0x5c, 0xd0, 0xb1, 0x1b, 0x56, 0x15, 0xa5, 0x1c, 0x25, 0x83, 0x8d, 0xdd, + 0x99, 0xbe, 0xec, 0x28, 0xd8, 0x04, 0x1f, 0xc9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -12259,143 +12259,143 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_BINDATA_LAB 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x38, 0xe1, 0x41, 0x0a, 0xcf, 0x1c, 0x93, - 0x56, 0x51, 0x5a, 0xc5, 0x92, 0x72, 0x32, 0x92, 0xeb, 0x9e, 0x0c, 0x8d, 0xd9, 0x35, 0x42, 0x84, - 0xa4, 0x1c, 0x7e, 0xd6, 0xae, 0xd1, 0xbc, 0x2e, 0x32, 0xf7, 0x5a, 0xd2, 0x1a, 0xd9, 0xeb, 0x64, - 0x61, 0x60, 0xd4, 0x5a, 0x6e, 0xcb, 0x0f, 0x07, 0xa2, 0xfc, 0x50, 0x41, 0x43, 0xdc, 0x30, 0xca, - 0x2b, 0xc5, 0x64, 0xba, 0x4c, 0x80, 0x4f, 0x45, 0x51, 0xa6, 0x78, 0x98, 0x06, 0x22, 0xa2, 0x40, - 0x16, 0x1c, 0x43, 0x60, 0x37, 0x93, 0x11, 0xf3, 0x99, 0x60, 0x51, 0xda, 0x62, 0x13, 0xf9, 0x21, - 0xb6, 0x41, 0x10, 0xc8, 0x13, 0x27, 0x26, 0xa2, 0x41, 0x50, 0x5a, 0xca, 0x28, 0xab, 0x1e, 0x57, - 0x96, 0x92, 0x7c, 0x77, 0x31, 0x92, 0x21, 0x30, 0x72, 0x4e, 0x9e, 0x18, 0x23, 0xed, 0x42, 0xf2, - 0xfe, 0x0e, 0x0b, 0xbf, 0xaa, 0x0e, 0x8a, 0xf0, 0x94, 0x88, 0xaa, 0x95, 0x75, 0xd5, 0x66, 0x8c, - 0xba, 0x87, 0x39, 0x12, 0x12, 0xfd, 0xb7, 0x85, 0x49, 0x2e, 0xe7, 0xe6, 0x40, 0x35, 0x48, 0x21, - 0x23, 0xd1, 0x35, 0x90, 0x64, 0x8d, 0xd7, 0x50, 0xe1, 0xea, 0x46, 0xe8, 0xaf, 0xbc, 0x62, 0xd6, - 0xaa, 0xd4, 0xe4, 0x05, 0x66, 0x38, 0x1d, 0xb0, 0x51, 0x08, 0xc9, 0x37, 0xc8, 0x12, 0xe3, 0x01, - 0x57, 0x2c, 0xf2, 0xc9, 0x3f, 0x0f, 0x88, 0xc2, 0xbc, 0x87, 0xb8, 0x78, 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0xd4, 0x81, 0xe3, 0x1d, 0x55, 0xab, 0x05, 0x87, 0xeb, 0xf0, 0x76, 0x1f, 0x40, 0xfe, 0x29, + 0x66, 0xd8, 0xd1, 0xb6, 0x21, 0x67, 0x4d, 0xc0, 0x6d, 0xb4, 0xa4, 0x34, 0xa9, 0xdf, 0xcd, 0xbc, + 0xf2, 0x44, 0xd9, 0xef, 0xba, 0x39, 0x43, 0x17, 0x5b, 0x96, 0x90, 0x61, 0x65, 0xa9, 0xd8, 0x71, + 0xe0, 0xa2, 0x63, 0x9d, 0xf7, 0x26, 0x2e, 0x3d, 0xad, 0x9c, 0xd1, 0x1a, 0x6f, 0xe1, 0x37, 0x2c, + 0x99, 0xad, 0xd2, 0x88, 0x48, 0x82, 0xdb, 0x3b, 0xf4, 0x9a, 0x12, 0x91, 0x0c, 0xab, 0x09, 0x31, + 0x11, 0xfc, 0x9f, 0x6a, 0x25, 0x8c, 0x7d, 0x72, 0x2c, 0x32, 0xa1, 0x14, 0xf0, 0x27, 0xbb, 0x6a, + 0x99, 0x7f, 0x11, 0x85, 0x43, 0xf0, 0x5e, 0x1d, 0x11, 0x1a, 0x4a, 0xd9, 0x3c, 0xe1, 0x02, 0x4f, + 0x79, 0x06, 0xdc, 0x8d, 0x69, 0xb2, 0x0c, 0x44, 0x76, 0x8b, 0xe5, 0xdb, 0x51, 0x03, 0x7f, 0x23, + 0x75, 0x38, 0x48, 0x79, 0x0d, 0x23, 0x94, 0x58, 0xcf, 0xd8, 0xbe, 0x8e, 0xc3, 0x31, 0xbe, 0x02, + 0x69, 0xd7, 0x09, 0x1f, 0xe1, 0x0f, 0x58, 0x97, 0x7f, 0xf6, 0x68, 0xac, 0x2c, 0x6c, 0xe3, 0x66, + 0x68, 0x62, 0x91, 0x0b, 0x4c, 0x9c, 0x50, 0x51, 0x41, 0xb9, 0x84, 0x07, 0xe4, 0x86, 0x20, 0x64, + 0x20, 0xf1, 0x9f, 0xe0, 0xcd, 0xaa, 0x05, 0xb6, 0xb9, 0x1e, 0xd0, 0xd2, 0x7c, 0x4f, 0xd4, 0x04, + 0x3c, 0x61, 0x89, 0xf9, 0xf7, 0xc6, 0x06, 0xe1, 0xca, 0xa3, 0x53, 0x9c, 0xba, 0x47, 0xc6, 0xb9, + 0x4d, 0x3a, 0x7c, 0xb6, 0x9d, 0x92, 0x6c, 0x8f, 0xaf, 0xe4, 0x89, 0xd9, 0x91, 0x0d, 0xf0, 0x69, + 0x06, 0x0b, 0xfd, 0xa0, 0xf2, 0x56, 0x49, 0xb4, 0x5c, 0xf4, 0x07, 0x71, 0x22, 0xe1, 0x77, 0x09, + 0xdc, 0x80, 0x5b, 0xf8, 0x2b, 0x47, 0x35, 0x13, 0xe6, 0x23, 0x41, 0xc9, 0xb6, 0x36, 0x49, 0x25, + 0xb6, 0x2c, 0xfd, 0x2e, 0x35, 0x35, 0x1d, 0xfc, 0x84, 0x92, 0x8b, 0x78, 0x84, 0x74, 0xa2, 0xf1, + 0x00, 0xf7, 0xe7, 0x4f, 0x74, 0xad, 0x55, 0x50, 0x82, 0xa4, 0xd9, 0x48, 0x7e, 0x73, 0x3d, 0x6b, + 0x44, 0x91, 0x66, 0x3c, 0x59, 0x6f, 0x8d, 0x0e, 0xc9, 0x73, 0xa4, 0x39, 0x8f, 0x87, 0xc4, 0xd3, + 0x1d, 0xb5, 0xb3, 0xd6, 0xf4, 0x84, 0x45, 0x83, 0xf0, 0xdc, 0x04, 0xcc, 0x6f, 0x75, 0xee, 0xcb, + 0x94, 0xd6, 0xce, 0xa0, 0xe7, 0x5d, 0x59, 0x6f, 0xf6, 0x9e, 0xb9, 0x1f, 0xb5, 0x7a, 0x9e, 0x3f, + 0x9a, 0x0b, 0xc4, 0xcb, 0xce, 0xe9, 0x22, 0x62, 0xbc, 0x3d, 0xb0, 0x82, 0x6c, 0x6e, 0x7e, 0x2f, + 0xeb, 0x7a, 0xb4, 0xd0, 0xc9, 0x16, 0x58, 0x72, 0x58, 0x59, 0xd0, 0x7e, 0x78, 0xca, 0x0b, 0x78, + 0xa6, 0x67, 0xbc, 0x47, 0x5a, 0x37, 0xdd, 0x27, 0xbf, 0x9c, 0xc8, 0x99, 0xa7, 0x7e, 0x52, 0xdf, + 0x4a, 0x8c, 0x79, 0x7d, 0xc9, 0x11, 0x28, 0x25, 0xa4, 0x41, 0xba, 0x9b, 0x6e, 0x8f, 0x90, 0xe4, + 0x0b, 0xa6, 0xc3, 0xf3, 0x6e, 0x79, 0xd2, 0x0b, 0xc5, 0x17, 0x16, 0xc6, 0x9c, 0x5c, 0x44, 0x90, + 0x4e, 0xb5, 0x86, 0xa9, 0xe5, 0xc6, 0x78, 0x79, 0xc3, 0x2c, 0xe2, 0x80, 0x26, 0x3e, 0x08, 0x47, + 0x82, 0xe2, 0xb8, 0xdf, 0xdf, 0xe1, 0x6c, 0x81, 0xc9, 0xfc, 0xcd, 0xa2, 0x6d, 0x1c, 0x3e, 0x7e, + 0x9e, 0xde, 0x01, 0x58, 0xd2, 0x65, 0xe5, 0xbc, 0x14, 0x53, 0x18, 0x86, 0xaa, 0xbc, 0x1d, 0xc0, + 0x48, 0x84, 0x86, 0x22, 0x51, 0x1e, 0xae, 0x41, 0xfa, 0x59, 0x73, 0x2a, 0x8b, 0x9b, 0x53, 0x70, + 0xea, 0x52, 0x74, 0x4a, 0xff, 0xbf, 0x0f, 0x73, 0x8f, 0xe9, 0xff, 0x81, 0x9a, 0x6c, 0xa8, 0x27, + 0xd4, 0x80, 0x10, 0xaf, 0x3b, 0x7a, 0xe9, 0x8a, 0x0c, 0xce, 0xf6, 0x9d, 0xaa, 0x42, 0xa9, 0xad, + 0x11, 0xa7, 0x51, 0xad, 0x93, 0x33, 0xb4, 0x03, 0x97, 0x3e, 0x06, 0x13, 0xfc, 0x1d, 0x2e, 0x3b, + 0x1e, 0x70, 0xc7, 0xf0, 0x52, 0x3e, 0xac, 0xbe, 0xf0, 0x2a, 0x51, 0x65, 0x2e, 0xa3, 0x91, 0xea, + 0xe8, 0x4c, 0x64, 0xbf, 0x3b, 0x90, 0xb5, 0x1b, 0x93, 0xf6, 0xea, 0x45, 0x4a, 0x70, 0x91, 0xaa, + 0x77, 0x09, 0xea, 0x1f, 0xb7, 0xa4, 0x37, 0xac, 0x8b, 0x81, 0xef, 0x8a, 0xd6, 0xd0, 0x0c, 0x8f, + 0x92, 0x7d, 0x09, 0x35, 0x6b, 0x8f, 0xa9, 0x2b, 0x5c, 0x97, 0xef, 0xf7, 0x1a, 0x32, 0xed, 0xd4, + 0x60, 0xa0, 0x2a, 0x02, 0xdc, 0x9e, 0xa6, 0x22, 0x5e, 0x57, 0x05, 0x4b, 0x67, 0x6d, 0x9c, 0xa0, + 0xa4, 0x64, 0xb5, 0x1b, 0xde, 0x82, 0xe2, 0x57, 0x84, 0x0d, 0x17, 0x1d, 0x62, 0x9d, 0x64, 0x88, + 0x26, 0xb8, 0x66, 0x87, 0x53, 0xb9, 0x70, 0x4f, 0x9a, 0x70, 0x87, 0x4f, 0x80, 0x0c, 0xcb, 0x4d, + 0x76, 0xc4, 0x15, 0x36, 0x26, 0x2a, 0x54, 0x4a, 0x38, 0x8c, 0x1d, 0x33, 0x04, 0x6e, 0xb6, 0xdb, + 0xd4, 0x2f, 0xb5, 0x7e, 0x94, 0x03, 0x36, 0x36, 0x75, 0x21, 0x8b, 0x2a, 0x71, 0x18, 0x25, 0x10, + 0xbe, 0xce, 0xf0, 0xd9, 0x77, 0xe8, 0x1d, 0x56, 0xe9, 0x0b, 0x3a, 0x89, 0x41, 0x88, 0xbc, 0x2d, + 0x4d, 0xa1, 0xc4, 0x69, 0xd9, 0x9d, 0xa0, 0x2b, 0x49, 0x10, 0x99, 0xc2, 0xe4, 0xd5, 0x6f, 0xd4, + 0xd2, 0xb0, 0x90, 0x6f, 0x02, 0xbd, 0x5b, 0xcc, 0xad, 0xb4, 0x8f, 0xec, 0xbb, 0xaf, 0x87, 0xcf, + 0x3a, 0xf4, 0xef, 0x02, 0xac, 0x7a, 0x54, 0x5a, 0x68, 0x65, 0xe6, 0x7a, 0xfd, 0x80, 0xc2, 0x0b, + 0xd9, 0x3f, 0x15, 0x4a, 0xac, 0x1c, 0x1a, 0x00, 0x8e, 0xe5, 0x0b, 0xb0, 0x06, 0x84, 0x2d, 0x42, + 0xe1, 0x72, 0x1f, 0xe9, 0xb2, 0xf3, 0x2f, 0xfe, 0x04, 0x36, 0xa0, 0x89, 0x32, 0x2d, 0xd1, 0xcb, + 0xad, 0xcb, 0x9c, 0x4f, 0x99, 0xcc, 0x83, 0xa4, 0x65, 0xb2, 0x69, 0xa2, 0x01, 0x18, 0xa0, 0x5d, + 0x5b, 0x5e, 0x34, 0x66, 0x33, 0x90, 0xce, 0xfc, 0xb1, 0xca, 0xcf, 0x8d, 0x77, 0x4f, 0x4b, 0x72, + 0x90, 0x9e, 0x9a, 0x1b, 0x00, 0xa9, 0x8a, 0x1c, 0xe1, 0x68, 0xa0, 0x32, 0x82, 0x37, 0x49, 0x7d, + 0xd5, 0xde, 0x60, 0x88, 0x75, 0xcd, 0xab, 0x24, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12428,9 +12428,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_BINDATA_LABEL_UCO // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_BINDATA_LABEL_UCODE_HASH_data[] = { - 0x9a, 0x53, 0xf9, 0x0d, 0xb4, 0x33, 0xdc, 0x0a, 0x84, 0x32, 0x0a, 0x2e, 0xeb, 0x75, 0x62, 0x95, - 0xdd, 0xa7, 0xa2, 0x4b, 0x52, 0xea, 0x62, 0x70, 0xb6, 0xd0, 0xc3, 0x29, 0x5e, 0x2b, 0x81, 0x17, - 0xeb, 0xa4, 0x03, 0xd0, 0x06, 0xdb, 0x41, 0x34, 0xb0, 0xea, 0x11, 0x50, 0x13, 0x2b, 0xde, 0x1e, + 0x23, 0x77, 0xcf, 0x83, 0xeb, 0xc6, 0x6b, 0x87, 0xd0, 0x83, 0x6e, 0x48, 0x30, 0x18, 0x0d, 0xd1, + 0xf3, 0x8a, 0xc0, 0x6c, 0x1f, 0x9c, 0x47, 0x18, 0xd7, 0x3d, 0xb3, 0xd2, 0x11, 0x9f, 0x76, 0x51, + 0xfe, 0x15, 0x05, 0xeb, 0x21, 0x3b, 0xf7, 0x56, 0x44, 0x37, 0x76, 0x4f, 0xf9, 0xad, 0x85, 0x92, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12463,12 +12463,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_BINDATA_LABEL_UCO // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB100_BINDATA_LABEL_UCODE_SIG_data[] = { - 0x4d, 0x98, 0x83, 0x52, 0x5f, 0x8b, 0x16, 0x2f, 0x99, 0x93, 0x17, 0x67, 0x21, 0x9d, 0xeb, 0x6c, - 0x6e, 0x29, 0xdd, 0x8d, 0xd9, 0x45, 0x6f, 0x9f, 0x2b, 0x5a, 0x55, 0x7f, 0x55, 0x73, 0x8e, 0x9d, - 0x64, 0x94, 0x7f, 0x68, 0xa8, 0x60, 0x47, 0x9b, 0x62, 0x35, 0xcf, 0x0e, 0x0a, 0x1c, 0x66, 0xb1, - 0x13, 0x68, 0x41, 0x6f, 0xdc, 0x63, 0xe0, 0x30, 0x9f, 0x70, 0x75, 0xad, 0x08, 0x11, 0x47, 0xd8, - 0x97, 0x84, 0x9a, 0x3b, 0x34, 0x79, 0x3f, 0x83, 0xc9, 0x3b, 0x02, 0x1d, 0x69, 0xce, 0x73, 0xf4, - 0x5f, 0xe3, 0x7b, 0x10, 0x71, 0x08, 0xd8, 0xcd, 0x75, 0x26, 0xca, 0xbf, 0x70, 0x97, 0xe7, 0x61, + 0xbf, 0x5e, 0x99, 0x96, 0x4c, 0xd4, 0x88, 0xb2, 0xd2, 0x79, 0x46, 0x0e, 0xc4, 0x18, 0xd4, 0x6c, + 0x8d, 0xb3, 0x18, 0x61, 0x5b, 0xd9, 0x08, 0xfb, 0x09, 0xce, 0x4a, 0xf0, 0xb3, 0xd8, 0x4f, 0x57, + 0xb6, 0x05, 0x7b, 0x92, 0x90, 0x61, 0x7a, 0x47, 0xcd, 0x99, 0xe7, 0xfc, 0xf2, 0xe3, 0xc7, 0x79, + 0x43, 0x50, 0xc2, 0xef, 0x0f, 0xa7, 0xee, 0x60, 0x06, 0x69, 0xbe, 0x07, 0xa7, 0x44, 0x13, 0x40, + 0xc2, 0xc4, 0x92, 0x66, 0xd8, 0xae, 0xad, 0x51, 0xf8, 0x6d, 0x0f, 0x8e, 0x23, 0x1b, 0x94, 0xd6, + 0x7d, 0xc1, 0x6d, 0xb3, 0xf0, 0xe3, 0x62, 0x85, 0xe4, 0x1c, 0x2c, 0xed, 0xf0, 0xbb, 0x01, 0xda, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB202.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB202.c index 609737be2..5649898c7 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB202.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwDebugSigned_GB202.c @@ -43,13319 +43,13319 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB202_BINDATA_LAB 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -13379,143 +13379,143 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB202_BINDATA_LAB 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc6, 0x01, 0xc4, 0xf0, 0x7d, 0x31, 0xf6, 0x25, - 0x3c, 0xa2, 0xd5, 0x59, 0xe2, 0x8a, 0xf5, 0x99, 0x86, 0x61, 0x42, 0x37, 0xaa, 0xf9, 0x59, 0x70, - 0x1b, 0xb8, 0x09, 0x0c, 0x2e, 0xd3, 0xc8, 0x4c, 0xc2, 0xe9, 0xd5, 0x6b, 0xf7, 0x32, 0xfc, 0xe5, - 0xaf, 0x1d, 0x2f, 0x2a, 0x3f, 0x89, 0x2a, 0x8f, 0xaf, 0xe9, 0xd3, 0xb8, 0xae, 0x23, 0x89, 0x7b, - 0xa9, 0x49, 0xec, 0x86, 0x81, 0x6c, 0x36, 0xe8, 0xa5, 0x62, 0x05, 0x01, 0x17, 0xb2, 0x89, 0xd8, - 0x97, 0x4f, 0x68, 0xf5, 0x25, 0x8b, 0x32, 0x9f, 0x81, 0x8f, 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0x70, 0xe0, 0x0b, 0x55, + 0x21, 0xb7, 0xc8, 0x36, 0x27, 0xb6, 0x93, 0x62, 0x83, 0xe5, 0x8e, 0x56, 0x09, 0x07, 0x92, 0x32, + 0xd3, 0x79, 0xa8, 0x28, 0x20, 0xb1, 0x01, 0x22, 0x83, 0x24, 0x2e, 0x0b, 0x63, 0x16, 0xc6, 0xcf, + 0xcb, 0x24, 0xfe, 0x33, 0x01, 0x0d, 0xc9, 0x0a, 0x43, 0x6e, 0xc6, 0x45, 0x8e, 0x42, 0x42, 0xdf, + 0x4c, 0x76, 0xbb, 0x73, 0xa1, 0x3a, 0xa4, 0xfd, 0xc4, 0x8b, 0xc0, 0x5b, 0x1b, 0xe2, 0x91, 0x00, + 0x62, 0x85, 0x14, 0x81, 0x0e, 0x7e, 0x9b, 0x8a, 0x77, 0x92, 0xaf, 0x67, 0xf2, 0x4b, 0x89, 0x31, + 0x8d, 0x49, 0xcd, 0x89, 0x85, 0x3f, 0x3f, 0x02, 0xda, 0x71, 0xe5, 0x57, 0xb3, 0x9f, 0x6f, 0x7b, + 0xc1, 0x89, 0xa9, 0xa7, 0x6f, 0xd8, 0x23, 0x9b, 0x1a, 0x46, 0x0f, 0x9e, 0x3f, 0xab, 0xa7, 0x3c, + 0x01, 0xe5, 0x5a, 0x2e, 0x8e, 0xb5, 0x1c, 0x3c, 0x23, 0x1a, 0x98, 0x38, 0x05, 0xa7, 0x4d, 0xbb, + 0xe8, 0x34, 0x45, 0x1c, 0x7c, 0x17, 0x95, 0x86, 0x3a, 0x35, 0x65, 0x27, 0x17, 0x50, 0xed, 0xad, + 0xa2, 0x78, 0x21, 0x3d, 0xf4, 0x86, 0xd8, 0x2c, 0xde, 0xfd, 0x9c, 0x45, 0x44, 0x25, 0x09, 0x90, + 0x99, 0xb9, 0xfb, 0x4c, 0x7d, 0x16, 0xe5, 0xa4, 0x2a, 0x93, 0x24, 0x6d, 0x7d, 0x8c, 0x7d, 0x71, + 0x20, 0x4f, 0xfc, 0x7d, 0x15, 0xea, 0x25, 0x52, 0x55, 0xd0, 0xcf, 0x0e, 0xf7, 0x40, 0x09, 0xe4, + 0x51, 0x17, 0x5d, 0x29, 0x0e, 0x7c, 0xdd, 0xb6, 0x02, 0x8c, 0x5d, 0x44, 0x67, 0x59, 0x99, 0xbd, + 0x1a, 0xab, 0xbd, 0x4b, 0x5f, 0x15, 0xea, 0xec, 0xa3, 0x30, 0x79, 0x55, 0x49, 0xe3, 0x1e, 0x71, + 0xa9, 0xd0, 0x20, 0xb4, 0x33, 0x4a, 0x31, 0x30, 0xdb, 0x62, 0x98, 0xf9, 0xc3, 0x56, 0x4c, 0x44, + 0x57, 0xd6, 0xec, 0x7a, 0x6b, 0xcb, 0xa5, 0x6a, 0x0d, 0xea, 0x63, 0xe3, 0x8a, 0x86, 0x95, 0x35, + 0x86, 0xdc, 0x7c, 0x69, 0xb3, 0x7e, 0xe0, 0x68, 0x7d, 0x7e, 0xac, 0x78, 0x03, 0xfc, 0xb7, 0x48, + 0x73, 0xd6, 0x61, 0xc1, 0xfd, 0x5a, 0x2d, 0x2f, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -13548,9 +13548,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GB202_BINDATA_LABEL_UCO // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB202_BINDATA_LABEL_UCODE_HASH_data[] = { - 0x17, 0x98, 0x32, 0x02, 0xf0, 0x3b, 0xfb, 0xe2, 0x3b, 0x99, 0xbc, 0x28, 0x31, 0x20, 0x81, 0x8d, - 0x3f, 0x3e, 0x91, 0xe6, 0x52, 0x7b, 0x5c, 0x2d, 0xc9, 0xb7, 0x81, 0x91, 0x4f, 0x6f, 0x2e, 0x3b, - 0xc5, 0x9b, 0x76, 0x86, 0xe1, 0x76, 0x8c, 0x0f, 0x07, 0x12, 0xb7, 0x12, 0x44, 0xd7, 0x5c, 0x1f, + 0x61, 0x01, 0xfe, 0x5e, 0xfd, 0x54, 0x85, 0x2b, 0x95, 0x98, 0xbb, 0x09, 0x21, 0xd1, 0xbb, 0x91, + 0x44, 0x89, 0x5a, 0xc1, 0xe4, 0x96, 0xe0, 0x61, 0x8c, 0x99, 0xbb, 0x91, 0xf7, 0x04, 0xde, 0x0b, + 0xaa, 0x83, 0x01, 0x65, 0xbe, 0x4b, 0x14, 0x9a, 0x22, 0xdc, 0xee, 0xed, 0x2c, 0x0e, 0x60, 0x6f, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -13583,12 +13583,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwDebugSigned_GB202_BINDATA_LABEL_UCO // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwDebugSigned_GB202_BINDATA_LABEL_UCODE_SIG_data[] = { - 0x6d, 0x60, 0x58, 0x01, 0x2c, 0x9b, 0x06, 0xcb, 0x46, 0xa4, 0xb8, 0x3b, 0xfd, 0xc7, 0xb0, 0xca, - 0xf8, 0x7d, 0xe6, 0xb7, 0xa4, 0x42, 0x76, 0x36, 0x95, 0xa4, 0xb8, 0x0f, 0x84, 0x55, 0x8e, 0x3b, - 0xbc, 0x79, 0xe0, 0x75, 0xe4, 0xdf, 0x8b, 0xba, 0xb3, 0xb6, 0xd0, 0xfd, 0xb9, 0xdd, 0x42, 0x59, - 0x99, 0xdc, 0x56, 0x8a, 0x7d, 0x64, 0x95, 0xbb, 0xdf, 0x6e, 0x0a, 0xad, 0xc7, 0xa2, 0x68, 0xc1, - 0xbb, 0x14, 0x5a, 0x43, 0x04, 0x89, 0x29, 0x9e, 0x9d, 0x4a, 0xf5, 0x20, 0x0b, 0x3c, 0x9d, 0x17, - 0x40, 0x8d, 0x56, 0x93, 0x73, 0x1b, 0xf9, 0x45, 0xff, 0xca, 0x44, 0x35, 0x37, 0x99, 0xb4, 0x77, + 0x5e, 0x9a, 0xcf, 0xed, 0x4b, 0x10, 0x64, 0x36, 0xda, 0x7c, 0x88, 0x96, 0xb7, 0xee, 0x0e, 0x38, + 0xbd, 0x67, 0x76, 0x1c, 0xc1, 0xc5, 0xe5, 0xc0, 0x83, 0xbf, 0xa5, 0x6b, 0x73, 0x81, 0xef, 0xf7, + 0xf7, 0xe0, 0xd6, 0x83, 0xcf, 0x21, 0x0a, 0xda, 0xdc, 0x38, 0xf0, 0xa3, 0x1d, 0xe3, 0x08, 0x83, + 0x0d, 0xfa, 0xb0, 0x66, 0x2a, 0x5d, 0xdf, 0x3e, 0x98, 0xb0, 0xd0, 0x2d, 0x95, 0xcb, 0x74, 0x5c, + 0xb0, 0x5b, 0x28, 0xb1, 0x66, 0x39, 0x0c, 0x57, 0x7d, 0x7e, 0x14, 0x79, 0xfc, 0x4d, 0x0f, 0xe4, + 0x1c, 0xe7, 0xed, 0xfe, 0x3b, 0x57, 0x11, 0x3c, 0x0e, 0xf1, 0x75, 0x91, 0xb4, 0xae, 0x5f, 0x0f, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c index c1a549ec4..08dfd6de1 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB100.c @@ -43,12359 +43,12359 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB100_BINDATA_LABE 0x00, 0x00, 0x00, 0x00, 0x00, 0xa7, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x2a, 0x8f, 0xc4, 0x55, 0xf9, 0x3d, 0xfe, - 0x08, 0xfc, 0xd5, 0x1a, 0xbc, 0xfa, 0x84, 0x7d, 0x40, 0x5f, 0x1a, 0xab, 0x9a, 0x5f, 0x61, 0x56, - 0x21, 0x2e, 0x03, 0x00, 0xd4, 0xd7, 0x5a, 0x84, 0x3d, 0x9f, 0x05, 0xa9, 0xc4, 0xe9, 0x0b, 0x3d, - 0x1c, 0x6c, 0x81, 0xb1, 0x08, 0x8e, 0x4b, 0xd0, 0xe1, 0x1d, 0x51, 0xda, 0x6b, 0x9f, 0x67, 0x7f, - 0x81, 0x8a, 0xe7, 0x2c, 0x1d, 0xe8, 0xa5, 0x67, 0x45, 0xb6, 0x35, 0x33, 0x34, 0x79, 0x65, 0x64, - 0x84, 0xa9, 0x82, 0xf3, 0xaf, 0x58, 0x53, 0x9a, 0xae, 0x6f, 0x03, 0x68, 0x37, 0x62, 0x09, 0x43, - 0x29, 0x7c, 0xba, 0xdd, 0x12, 0xec, 0xa9, 0x5c, 0x8b, 0x62, 0xbc, 0xe0, 0xc6, 0xce, 0xc2, 0x9c, - 0xb5, 0xfe, 0x8e, 0xbb, 0x7c, 0x69, 0xa9, 0x98, 0x18, 0x58, 0xe4, 0x91, 0x0f, 0x4c, 0xf0, 0x20, - 0xaf, 0xcb, 0xe5, 0x48, 0xb2, 0xb8, 0x7c, 0x6d, 0x90, 0x88, 0x98, 0x20, 0xbe, 0xc3, 0xb2, 0x16, - 0x0c, 0x45, 0x97, 0x33, 0xf9, 0x09, 0xb7, 0x0f, 0xd0, 0xe4, 0x91, 0x9e, 0x9e, 0x2e, 0xf4, 0x47, - 0x7f, 0x6c, 0x13, 0x18, 0x34, 0x0f, 0xc0, 0x23, 0x02, 0xf1, 0xd4, 0xb6, 0xa2, 0x32, 0x12, 0xea, - 0x63, 0x0e, 0x4f, 0x13, 0x52, 0x01, 0x11, 0xff, 0x8f, 0xfd, 0x2c, 0xf4, 0x65, 0x68, 0x2c, 0x6d, - 0x26, 0x60, 0xc6, 0x86, 0x4e, 0xd1, 0x44, 0xee, 0x77, 0x99, 0x6e, 0xad, 0xfe, 0x12, 0x9e, 0xcb, - 0xfe, 0x5c, 0xc7, 0xac, 0x5d, 0x2f, 0x8c, 0xd0, 0x7b, 0x28, 0x4a, 0x4b, 0x4c, 0x63, 0xe5, 0xef, - 0xd0, 0x66, 0x50, 0x2f, 0x0c, 0xd5, 0x1e, 0xd5, 0x6d, 0x6e, 0x74, 0xf6, 0x6a, 0x82, 0x29, 0x1c, - 0x63, 0x96, 0x34, 0xa5, 0x5c, 0x87, 0x22, 0x7d, 0x32, 0xc3, 0x4d, 0x40, 0x5c, 0xc0, 0x2c, 0x4a, - 0x76, 0x57, 0x62, 0x92, 0x2d, 0x47, 0xdd, 0x3b, 0xd3, 0x17, 0x3e, 0xa7, 0xb0, 0xd3, 0xf4, 0x75, - 0x40, 0xba, 0xa0, 0x13, 0x5e, 0x63, 0x70, 0xac, 0xe7, 0xfe, 0x36, 0x9b, 0xd9, 0x5c, 0x69, 0xca, - 0x7e, 0x77, 0x90, 0x91, 0x90, 0xa5, 0xb1, 0xc3, 0xc4, 0x71, 0x6b, 0x65, 0x3b, 0x4a, 0xc9, 0xe1, - 0x91, 0x0b, 0x90, 0xe9, 0x5e, 0xa9, 0x44, 0x7e, 0x92, 0x6f, 0xfe, 0xcc, 0x4c, 0x21, 0x5f, 0xbd, - 0x2f, 0x34, 0x38, 0x48, 0xf7, 0xc2, 0x50, 0x0d, 0x1e, 0x0e, 0x60, 0x1e, 0x14, 0xb2, 0xe4, 0xee, - 0xe6, 0x6a, 0x03, 0x30, 0xc2, 0x30, 0x17, 0x73, 0x21, 0xf7, 0x99, 0x11, 0xd4, 0xb2, 0xd5, 0x90, - 0x22, 0x57, 0x7a, 0x5c, 0xb9, 0x90, 0x8b, 0x5e, 0x5a, 0x7a, 0x36, 0xe1, 0xb8, 0x72, 0xc3, 0x4b, - 0x01, 0x1e, 0xdc, 0x9f, 0xb2, 0xdb, 0x60, 0xaa, 0xca, 0x49, 0x4e, 0xba, 0xa9, 0x5a, 0xa7, 0x67, - 0x55, 0x84, 0x68, 0x46, 0x88, 0xea, 0x86, 0xf2, 0x05, 0x2b, 0x5e, 0xdd, 0x2b, 0x16, 0x2f, 0xf6, - 0x07, 0x32, 0xd4, 0xcc, 0x09, 0x4c, 0x85, 0x33, 0xa3, 0x88, 0x6d, 0x71, 0x03, 0x15, 0x91, 0x03, - 0x94, 0xc5, 0xea, 0x5c, 0x43, 0x66, 0x32, 0x86, 0xee, 0x64, 0x25, 0xa4, 0x67, 0x7d, 0x07, 0x99, - 0xd8, 0x21, 0x1c, 0xe7, 0x2e, 0x66, 0x73, 0x5d, 0x57, 0xaa, 0x9a, 0xd7, 0x34, 0xd8, 0x9a, 0xcc, - 0xd4, 0x0a, 0x5e, 0xea, 0xd1, 0x03, 0xe3, 0x4a, 0x50, 0x73, 0x3a, 0x02, 0x0a, 0x63, 0x19, 0x3e, - 0x98, 0x4f, 0xaf, 0x7d, 0x83, 0x8e, 0xe3, 0x1e, 0xa5, 0x55, 0x48, 0x53, 0xec, 0x1f, 0xc4, 0x17, - 0xa3, 0xfa, 0x2b, 0xdf, 0x07, 0xb3, 0x53, 0x45, 0x47, 0xcd, 0x72, 0xe3, 0x44, 0x63, 0xce, 0x5f, - 0x43, 0x79, 0xbf, 0x4c, 0x09, 0xc9, 0xbc, 0xd6, 0x81, 0x51, 0x89, 0x3c, 0xd6, 0x23, 0xc7, 0x07, - 0x12, 0x45, 0xfa, 0xab, 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0x81, 0x2e, 0x73, 0xe3, + 0x6c, 0xf0, 0x8e, 0x3f, 0x28, 0x0c, 0x9c, 0x30, 0xb8, 0x22, 0xd2, 0xd5, 0xf6, 0x46, 0xf8, 0xa9, + 0xf7, 0x02, 0x2b, 0x7f, 0x6b, 0x1e, 0x6a, 0xf1, 0x69, 0x50, 0x6a, 0xf8, 0xf0, 0x38, 0x8e, 0x0e, + 0xd7, 0xbe, 0x53, 0x54, 0xc8, 0x3d, 0x8c, 0xe4, 0xf1, 0x1b, 0x86, 0xe2, 0x4e, 0x5c, 0xa3, 0x02, + 0x12, 0x08, 0x35, 0x56, 0x29, 0xec, 0x1f, 0x21, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12428,9 +12428,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GB100_BINDATA_LABEL_UCOD // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB100_BINDATA_LABEL_UCODE_HASH_data[] = { - 0xa3, 0xf9, 0x5a, 0x82, 0xb4, 0x1c, 0xf4, 0x30, 0x3a, 0x3d, 0xd9, 0x14, 0xdc, 0xc2, 0xde, 0x98, - 0xe3, 0x5e, 0x7a, 0x7d, 0x99, 0x59, 0xf2, 0x0e, 0x1e, 0x1a, 0xc5, 0xa5, 0xef, 0x87, 0x99, 0x90, - 0x19, 0x5d, 0xc8, 0x28, 0x17, 0x1e, 0x9b, 0x3b, 0x12, 0xfb, 0xb9, 0xc0, 0xfa, 0xb8, 0xba, 0x0a, + 0xb1, 0x52, 0xd0, 0xd0, 0x43, 0x07, 0x1b, 0xab, 0x60, 0x0f, 0x1b, 0xd4, 0xd0, 0xca, 0xff, 0x7f, + 0x35, 0x24, 0x61, 0x51, 0x8f, 0xb7, 0xac, 0xc5, 0x4c, 0xed, 0xd1, 0x58, 0xb9, 0x18, 0xb8, 0xc3, + 0x6b, 0xa6, 0x15, 0x4f, 0x89, 0x4c, 0x4e, 0x90, 0x20, 0x91, 0x87, 0xcf, 0xeb, 0x8c, 0x08, 0xae, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -12463,12 +12463,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GB100_BINDATA_LABEL_UCOD // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB100_BINDATA_LABEL_UCODE_SIG_data[] = { - 0x35, 0x42, 0x9a, 0x63, 0xb3, 0x81, 0x84, 0x3a, 0x57, 0xe0, 0x3f, 0xa3, 0x18, 0x8f, 0x45, 0xae, - 0xad, 0x1d, 0x8e, 0x47, 0x5d, 0xda, 0x98, 0xe2, 0xae, 0xcb, 0x45, 0x17, 0xda, 0xc4, 0xfb, 0x39, - 0xaf, 0x8b, 0x50, 0x7c, 0x3d, 0x17, 0x43, 0x50, 0x53, 0x90, 0x4a, 0x92, 0x51, 0xb5, 0x6f, 0xec, - 0xe8, 0x81, 0xb9, 0xed, 0xec, 0xfc, 0xb6, 0x6c, 0xd3, 0x1e, 0xc5, 0xb3, 0xc9, 0xe1, 0xa5, 0x54, - 0xe2, 0xbc, 0x93, 0x41, 0x9f, 0xdc, 0x0d, 0x52, 0xa9, 0x48, 0x85, 0xc4, 0xe5, 0x08, 0xb1, 0x13, - 0xf7, 0xd8, 0xb8, 0xc6, 0x55, 0xf6, 0xba, 0xce, 0x6e, 0xe8, 0xca, 0xf9, 0x62, 0x25, 0x39, 0x54, + 0xcd, 0xc4, 0x60, 0x41, 0xc2, 0xa1, 0xd5, 0xa2, 0x1d, 0xe1, 0xed, 0x85, 0x93, 0x64, 0x77, 0xd4, + 0x81, 0xfd, 0x4e, 0x4a, 0x5c, 0x36, 0x41, 0xad, 0x3d, 0xdc, 0x51, 0x32, 0x9b, 0xa0, 0x26, 0x04, + 0xbe, 0x12, 0x61, 0xef, 0xfb, 0x0e, 0x6f, 0x84, 0x5f, 0xa6, 0xed, 0xb1, 0x06, 0x37, 0x4b, 0xca, + 0x4c, 0xe9, 0xe7, 0xd2, 0x4a, 0x7a, 0xa8, 0xf0, 0x49, 0x08, 0xb2, 0xe5, 0xb7, 0x1a, 0x2d, 0xad, + 0x7c, 0xd1, 0x07, 0x7d, 0xe7, 0xb9, 0xdc, 0x78, 0x2d, 0x55, 0x31, 0x59, 0xae, 0x57, 0x47, 0x1c, + 0x87, 0xd5, 0x8a, 0xca, 0x6d, 0xce, 0x4e, 0x68, 0xea, 0x31, 0x09, 0xad, 0x69, 0xfb, 0x2c, 0x5a, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB202.c b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB202.c index 1d00cc123..b0558276e 100644 --- a/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB202.c +++ b/src/nvidia/generated/g_bindata_kgspGetBinArchiveGspRmFmcGfwProdSigned_GB202.c @@ -43,13479 +43,13479 @@ static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB202_BINDATA_LABE 0x00, 0x00, 0x00, 0x00, 0x00, 0xe8, 0x00, 0x00, 0x04, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xee, 0x15, 0xd0, 0x34, 0x12, 0xa8, 0x20, 0x6c, - 0xd5, 0x65, 0xbe, 0x2a, 0xa5, 0x25, 0x74, 0x18, 0x54, 0x4c, 0xd2, 0xd4, 0xd4, 0xf6, 0xae, 0x3a, - 0x57, 0x23, 0xbb, 0x1e, 0x44, 0xa4, 0x9e, 0xfd, 0x56, 0xdc, 0x49, 0x16, 0xf5, 0x32, 0xb6, 0x00, - 0xfd, 0x76, 0xce, 0x81, 0x89, 0xb5, 0x38, 0x4a, 0x2b, 0x19, 0xb3, 0xa2, 0xd8, 0x02, 0x72, 0xc5, - 0x58, 0xf6, 0x57, 0x06, 0xc7, 0x2c, 0x15, 0x9b, 0x48, 0x7f, 0x42, 0x7d, 0x37, 0x7d, 0x43, 0xdd, - 0xea, 0x09, 0xcb, 0x50, 0xe2, 0x80, 0x59, 0xbd, 0x26, 0x96, 0x6c, 0x76, 0x95, 0xcf, 0xbe, 0x07, - 0xe1, 0x30, 0x28, 0xf9, 0xe7, 0xab, 0x6d, 0x40, 0x27, 0x4b, 0xa3, 0xc4, 0xe7, 0xb5, 0x50, 0x36, - 0xfa, 0xcc, 0x2e, 0xd4, 0x33, 0x07, 0x7f, 0x9a, 0xac, 0x4e, 0xe3, 0x0f, 0x3c, 0x57, 0xf2, 0xea, - 0xe7, 0x9b, 0xd1, 0x5c, 0x0a, 0xdb, 0x76, 0xa6, 0x51, 0xeb, 0xc7, 0xe1, 0x9b, 0xf1, 0x0e, 0x43, - 0x6f, 0x6e, 0xb8, 0x27, 0x17, 0xfe, 0xe1, 0x10, 0x88, 0x85, 0xcc, 0x49, 0x96, 0x1b, 0x71, 0xfa, - 0x42, 0xc9, 0xef, 0x5a, 0x68, 0x82, 0xe2, 0x3e, 0xd4, 0x84, 0x5c, 0x79, 0x80, 0x06, 0xe0, 0xfc, - 0xba, 0x6d, 0x9e, 0x62, 0x5e, 0x0c, 0xd9, 0xc9, 0x6e, 0x04, 0xd5, 0x57, 0xc6, 0x5f, 0x35, 0xe9, - 0x2b, 0x88, 0x0e, 0xe6, 0x47, 0x74, 0xfb, 0xbe, 0xf5, 0x99, 0x27, 0x53, 0xa5, 0x71, 0x00, 0x2c, - 0x5e, 0xaf, 0xe3, 0x35, 0x5c, 0x49, 0xbd, 0xc8, 0xd1, 0xdb, 0x7a, 0x1c, 0xea, 0xdf, 0x73, 0xdf, - 0x01, 0x5f, 0xb5, 0x2b, 0xa7, 0x4a, 0x6f, 0xe6, 0x33, 0xcd, 0xd1, 0x59, 0x6f, 0x54, 0x75, 0xeb, - 0xe0, 0xb7, 0xe2, 0x17, 0x47, 0x4d, 0x5d, 0x95, 0x06, 0xfa, 0x64, 0xd7, 0x39, 0x09, 0x6c, 0xd0, - 0xbf, 0xe7, 0x64, 0x60, 0x93, 0xfc, 0xba, 0xaa, 0x97, 0x3b, 0x12, 0x22, 0x7b, 0x44, 0xc5, 0x44, - 0x94, 0xcb, 0x33, 0x23, 0x9a, 0xcb, 0x5f, 0x1f, 0xb1, 0x32, 0xe8, 0xd8, 0xa3, 0x2d, 0x2a, 0x62, - 0x2b, 0x28, 0x64, 0xf1, 0x45, 0x48, 0xf1, 0x46, 0x6a, 0x1f, 0xd6, 0xb4, 0x9e, 0xb5, 0x6c, 0xc2, - 0x5f, 0xc9, 0xb1, 0x35, 0x2e, 0x3e, 0xb7, 0x68, 0xaf, 0xb3, 0x6c, 0x4a, 0x08, 0xd5, 0xd0, 0xfd, - 0xa6, 0x0f, 0xd2, 0x45, 0xc7, 0x86, 0xd5, 0xfd, 0x46, 0xee, 0x23, 0x12, 0xb5, 0x78, 0x58, 0x6e, - 0xc5, 0x06, 0xca, 0x30, 0x47, 0xac, 0x5b, 0xbc, 0x5d, 0x34, 0x58, 0x13, 0xa0, 0x0b, 0xb2, 0xe3, - 0x22, 0x72, 0x0e, 0xc7, 0xa3, 0xde, 0xa8, 0xf3, 0x83, 0x73, 0x4a, 0x69, 0xf3, 0x21, 0x83, 0xf2, - 0xab, 0x23, 0x5f, 0x18, 0x8e, 0xf5, 0x33, 0xe0, 0xe8, 0x4f, 0xbb, 0x44, 0xdb, 0xc1, 0x5f, 0x50, - 0x92, 0xcf, 0x98, 0xa3, 0x0c, 0x07, 0xfb, 0xce, 0x84, 0x8a, 0x05, 0x34, 0x28, 0xf6, 0xed, 0x24, - 0x38, 0xbd, 0x36, 0x3b, 0x4d, 0xce, 0x38, 0xe8, 0x1b, 0xb6, 0xab, 0xaa, 0x1b, 0x47, 0x7e, 0xe8, - 0x3a, 0x52, 0x32, 0x28, 0x83, 0x11, 0x01, 0xd8, 0x59, 0x71, 0x32, 0x57, 0x4e, 0x77, 0x83, 0x76, - 0x96, 0x47, 0x28, 0xa1, 0x6c, 0xb8, 0xf9, 0x9b, 0xf1, 0x4a, 0x5f, 0x0a, 0x01, 0x8d, 0x90, 0x21, - 0xfd, 0xda, 0x38, 0xe0, 0x10, 0x18, 0xcd, 0x15, 0xa4, 0x23, 0x3a, 0x13, 0x34, 0xfa, 0x8d, 0xf1, - 0x1d, 0x39, 0x8a, 0x51, 0x07, 0x1e, 0x29, 0xc8, 0x17, 0x8b, 0x08, 0x11, 0xc5, 0xde, 0x6a, 0x49, - 0x72, 0x50, 0xe0, 0x19, 0x82, 0x7e, 0x81, 0x1c, 0x2f, 0x4e, 0xbe, 0x98, 0x97, 0xce, 0x08, 0x6b, - 0xdd, 0xe0, 0x2e, 0xab, 0x41, 0x58, 0xc1, 0xd0, 0x7d, 0xbc, 0x0d, 0x32, 0x54, 0x42, 0x9a, 0xb9, - 0xae, 0x0a, 0xc8, 0xdf, 0xb0, 0x6e, 0x67, 0xf8, 0xff, 0x98, 0x51, 0x3e, 0x0b, 0x61, 0x4d, 0xba, - 0x05, 0xae, 0xaf, 0xe9, 0xb7, 0x97, 0x27, 0x3f, 0xbd, 0xa4, 0xbd, 0x51, 0x6f, 0xd7, 0x0b, 0xcf, - 0x14, 0xd0, 0xdd, 0xe9, 0xc4, 0x89, 0xfa, 0x0f, 0x24, 0x79, 0xd3, 0xed, 0x32, 0x83, 0xb2, 0xcb, - 0x7a, 0x18, 0xf4, 0xdb, 0xdf, 0xff, 0xe0, 0xc2, 0x9c, 0x9e, 0xc1, 0x26, 0x5e, 0xb9, 0xd6, 0x32, - 0x65, 0x6b, 0x90, 0xd7, 0x4d, 0x68, 0x7b, 0x96, 0x38, 0x05, 0x75, 0x7f, 0x76, 0x15, 0x92, 0xab, - 0xea, 0xeb, 0x63, 0x23, 0x8c, 0x72, 0x0c, 0x4b, 0x4a, 0xf1, 0xdc, 0x6b, 0x3e, 0xbe, 0xe6, 0x93, - 0x4a, 0x36, 0x53, 0xf9, 0x7c, 0x0a, 0x40, 0xa3, 0x76, 0x3e, 0x85, 0x0b, 0x2d, 0x15, 0x76, 0xc0, - 0x83, 0x0d, 0x63, 0x30, 0x4a, 0x21, 0x5a, 0xee, 0x41, 0x3b, 0x0c, 0xaa, 0x7f, 0x0b, 0x5e, 0x57, - 0x3f, 0x3c, 0x10, 0xf5, 0x94, 0x67, 0x6e, 0xc8, 0x41, 0x49, 0xf2, 0x0e, 0x83, 0x4b, 0x9e, 0x92, - 0x77, 0x07, 0xaf, 0x9c, 0x25, 0x9c, 0x25, 0x48, 0xf1, 0x2e, 0xf5, 0x33, 0xf4, 0x92, 0xbf, 0x6f, - 0x97, 0xb7, 0x8a, 0x66, 0x6e, 0xe7, 0x97, 0x16, 0x42, 0xf7, 0x13, 0x33, 0xaf, 0x3e, 0x4d, 0x01, - 0x61, 0x86, 0x83, 0x91, 0xca, 0x65, 0x99, 0x4a, 0xb5, 0x20, 0xf4, 0xdf, 0x07, 0xbc, 0xa8, 0xc3, - 0x38, 0xe4, 0x82, 0x62, 0x03, 0xa2, 0x9c, 0x91, 0x13, 0x4f, 0xf1, 0x33, 0x0a, 0xa6, 0xaa, 0xf7, - 0xd6, 0xf9, 0xcf, 0xc4, 0x26, 0x64, 0x03, 0xe5, 0x6d, 0x58, 0xe5, 0x70, 0xd2, 0xc4, 0x3c, 0x4a, - 0x82, 0x4e, 0xa0, 0x23, 0x6e, 0x0b, 0xe3, 0x78, 0xcc, 0xb0, 0x7b, 0x27, 0xd7, 0x89, 0xa3, 0x70, - 0x8d, 0x08, 0xaf, 0xe3, 0xd8, 0xb5, 0x4e, 0x74, 0x5c, 0x8b, 0xdf, 0x61, 0xd1, 0xf4, 0x08, 0xd0, - 0xd1, 0x6f, 0xfc, 0x52, 0x9e, 0x0e, 0x8a, 0x43, 0xc7, 0xda, 0x71, 0xce, 0x0f, 0x1b, 0xec, 0x86, - 0xcb, 0xae, 0xbb, 0x10, 0x8f, 0x01, 0x5f, 0x07, 0x31, 0xe3, 0x9a, 0x7f, 0xb3, 0x5a, 0xc5, 0x2b, - 0x6d, 0x6e, 0xa5, 0x15, 0xf8, 0xf1, 0x88, 0x13, 0xf5, 0x73, 0xc1, 0x2b, 0xab, 0x55, 0x33, 0x59, - 0x31, 0x17, 0x94, 0xec, 0x5a, 0xc6, 0x11, 0xcf, 0xe4, 0xda, 0x0a, 0x4a, 0x8e, 0x5a, 0xb2, 0x4c, - 0x92, 0x9a, 0xeb, 0xff, 0x8c, 0x88, 0x7b, 0xfe, 0xa0, 0xac, 0x4f, 0x62, 0xab, 0x12, 0x35, 0x17, - 0x09, 0x09, 0xe6, 0xed, 0xc8, 0x35, 0x0b, 0xc9, 0xe7, 0xbd, 0x4b, 0xe7, 0x29, 0x6c, 0x1e, 0xb2, - 0x6f, 0x69, 0xfa, 0x5c, 0x73, 0x73, 0x32, 0x87, 0x10, 0x2e, 0x3e, 0x30, 0x55, 0x51, 0x68, 0x8c, - 0x98, 0x3e, 0x6a, 0xc7, 0x9c, 0x5f, 0x5a, 0xc7, 0xb1, 0xaf, 0xb2, 0x84, 0xf0, 0x5c, 0xbc, 0x93, - 0x09, 0x8b, 0x0a, 0x7c, 0xcf, 0x2a, 0xa2, 0xbe, 0xf8, 0x9f, 0x57, 0x11, 0x99, 0xb4, 0xe0, 0xe4, - 0x4d, 0x55, 0xc7, 0xd0, 0xed, 0xd8, 0xde, 0x60, 0x63, 0x20, 0x42, 0x05, 0x42, 0x32, 0xeb, 0x79, - 0x1f, 0x2d, 0x5e, 0xcb, 0x58, 0x92, 0xf1, 0xa0, 0x64, 0xbf, 0x43, 0x2e, 0x3c, 0xce, 0x1d, 0x63, - 0xbf, 0xd6, 0x36, 0xca, 0x22, 0xef, 0x07, 0x10, 0x06, 0x8f, 0x49, 0x85, 0x94, 0x90, 0xde, 0x70, - 0x59, 0x2c, 0x2c, 0xa4, 0xa8, 0xca, 0x30, 0x02, 0x19, 0x1d, 0x45, 0xaf, 0x7f, 0xff, 0x08, 0xda, - 0x0c, 0x80, 0xdb, 0x39, 0xbb, 0xd6, 0xa4, 0x52, 0x1a, 0xc6, 0xb8, 0xfa, 0x64, 0xb7, 0x44, 0x3a, - 0xb1, 0xd1, 0x91, 0xa5, 0x4d, 0xc9, 0x55, 0x12, 0xf6, 0x5e, 0xd3, 0x1b, 0x53, 0xa8, 0x2c, 0xd8, - 0xf0, 0x4a, 0xa3, 0x94, 0xef, 0x77, 0xac, 0x83, 0x18, 0xa2, 0x92, 0x4e, 0x0c, 0x87, 0x0e, 0x07, - 0xdf, 0x34, 0x5b, 0x8c, 0xae, 0x21, 0x42, 0x36, 0x63, 0xef, 0xd7, 0x06, 0x62, 0x89, 0x8b, 0x33, - 0x16, 0x30, 0xaa, 0x55, 0xc4, 0xbc, 0xb3, 0xe8, 0x04, 0x07, 0x51, 0xf1, 0x9d, 0x2f, 0xd6, 0xe1, - 0xe3, 0xb4, 0xab, 0x4e, 0xcf, 0xeb, 0x25, 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0x07, 0x35, 0x4f, 0x8d, 0x30, 0x9c, 0x55, 0x8c, 0xeb, + 0xa6, 0xe0, 0xe5, 0x1e, 0x04, 0x06, 0x8d, 0x04, 0x53, 0x13, 0x17, 0x5f, 0xe5, 0x4b, 0xe8, 0x83, + 0x1d, 0xba, 0x78, 0x53, 0xb5, 0x61, 0xd5, 0xbf, 0x6c, 0x4d, 0xfc, 0x99, 0x76, 0x78, 0xb5, 0xd8, + 0x9b, 0xc2, 0x65, 0x49, 0x7c, 0x43, 0xa9, 0x7c, 0x1f, 0xcb, 0x7b, 0xea, 0x87, 0xe9, 0x25, 0x50, + 0xbb, 0x36, 0xed, 0xb2, 0xfe, 0x9b, 0x68, 0x99, 0xe8, 0x18, 0xfd, 0x41, 0x9e, 0x57, 0x14, 0x94, + 0xef, 0xde, 0x3e, 0xdb, 0xe2, 0xc2, 0x90, 0xc1, 0x3a, 0x27, 0xc1, 0xee, 0x4f, 0x0e, 0x3b, 0xea, + 0x9b, 0xa9, 0xb9, 0x91, 0x05, 0xb9, 0xb0, 0xf6, 0x7a, 0xc6, 0xd9, 0x5f, 0x7c, 0xb6, 0x44, 0x5c, + 0xe6, 0xa6, 0x66, 0x9d, 0x39, 0x42, 0x9d, 0x75, 0x8b, 0xae, 0xb3, 0xf5, 0xca, 0x6c, 0x58, 0x7b, + 0x3c, 0xf6, 0xd8, 0x45, 0x7c, 0xe0, 0xe7, 0x74, 0x73, 0x57, 0xda, 0x24, 0xcf, 0xeb, 0xa0, 0xb5, + 0xb1, 0x7b, 0x5b, 0x26, 0x4f, 0x01, 0x5c, 0xf9, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -13548,9 +13548,9 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GB202_BINDATA_LABEL_UCOD // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB202_BINDATA_LABEL_UCODE_HASH_data[] = { - 0xdf, 0x3b, 0x6e, 0xc5, 0xaf, 0x1e, 0xbc, 0x6b, 0x13, 0x42, 0xd2, 0xcb, 0xc6, 0xe4, 0x72, 0xfb, - 0x9c, 0x34, 0x8f, 0x50, 0x8f, 0xa9, 0x1e, 0x62, 0x5f, 0x75, 0x42, 0x46, 0xc7, 0xbc, 0x4f, 0xda, - 0x81, 0xe8, 0x2f, 0x0d, 0x8d, 0x8d, 0x44, 0x34, 0xd2, 0x93, 0x7d, 0x03, 0x86, 0xa1, 0x53, 0xee, + 0x53, 0x91, 0xdd, 0x27, 0x2d, 0x8a, 0x55, 0xb8, 0x9b, 0x4c, 0x3b, 0x76, 0x14, 0x3e, 0xee, 0x47, + 0xbe, 0xad, 0xe9, 0xb4, 0xdc, 0xef, 0x75, 0x3a, 0x25, 0xe3, 0x76, 0x58, 0xed, 0xab, 0x12, 0x3f, + 0x0d, 0x82, 0x53, 0x8a, 0xb2, 0x74, 0xd4, 0xd7, 0x89, 0xef, 0x41, 0xd8, 0x8c, 0x2f, 0x3e, 0xfc, }; #endif // defined(BINDATA_INCLUDE_DATA) @@ -13583,12 +13583,12 @@ BINDATA_STORAGE_PVT kgspBinArchiveGspRmFmcGfwProdSigned_GB202_BINDATA_LABEL_UCOD // static BINDATA_CONST NvU8 kgspBinArchiveGspRmFmcGfwProdSigned_GB202_BINDATA_LABEL_UCODE_SIG_data[] = { - 0x64, 0xb3, 0x03, 0xb1, 0xb1, 0x95, 0x7c, 0xc0, 0xee, 0xf1, 0xaa, 0xc2, 0xbc, 0x3b, 0x98, 0x1e, - 0x50, 0xdd, 0xec, 0x7f, 0x51, 0x0f, 0xcc, 0xdb, 0x2c, 0xe0, 0xd6, 0xb5, 0xd8, 0x5a, 0xd3, 0x86, - 0xf8, 0xd7, 0x4b, 0x3c, 0xf2, 0xe9, 0x1d, 0x9e, 0x5f, 0x7d, 0xcc, 0xd7, 0xe3, 0x39, 0x33, 0xe8, - 0xcc, 0x15, 0xf7, 0xdc, 0x8b, 0x18, 0xef, 0x02, 0xd6, 0xfe, 0x53, 0xe3, 0x2e, 0x6b, 0x6a, 0x29, - 0x4e, 0x2f, 0x20, 0x05, 0xf9, 0x7c, 0xae, 0x2d, 0x6f, 0x96, 0xb5, 0x52, 0x55, 0xad, 0xaa, 0x53, - 0xfd, 0x13, 0xa7, 0xe0, 0xbb, 0x57, 0xde, 0xf9, 0x2f, 0xc8, 0x9c, 0xe5, 0x7c, 0x7c, 0x42, 0x30, + 0xdb, 0x88, 0x2b, 0xce, 0xa8, 0xef, 0x53, 0xa9, 0x96, 0x4c, 0x1b, 0x41, 0x3a, 0xa9, 0xdf, 0x38, + 0xc7, 0x3b, 0x6b, 0xbc, 0x14, 0x9d, 0xca, 0xe0, 0xd4, 0x99, 0xc7, 0x7f, 0xf4, 0xdb, 0x43, 0x31, + 0xa2, 0xef, 0xf8, 0xb6, 0xd3, 0x7e, 0xb8, 0xd2, 0xaf, 0xd6, 0xa3, 0xa6, 0xef, 0xe2, 0xaa, 0xfe, + 0x57, 0x8f, 0x00, 0xfd, 0xc5, 0x08, 0x6c, 0xf3, 0x2b, 0xf1, 0x69, 0x38, 0x59, 0x54, 0x57, 0xc5, + 0x31, 0x58, 0x92, 0x51, 0x58, 0xfb, 0x4b, 0x53, 0x56, 0xed, 0x8f, 0x1f, 0x11, 0x75, 0x14, 0x3d, + 0x2f, 0xe2, 0xf0, 0x6d, 0x28, 0xbb, 0x66, 0xb3, 0x47, 0x95, 0xac, 0x36, 0x31, 0x44, 0x3f, 0x18, }; #endif // defined(BINDATA_INCLUDE_DATA) diff --git a/src/nvidia/generated/g_client_nvoc.h b/src/nvidia/generated/g_client_nvoc.h index 45f9b640a..4c8c9727a 100644 --- a/src/nvidia/generated/g_client_nvoc.h +++ b/src/nvidia/generated/g_client_nvoc.h @@ -203,6 +203,7 @@ struct RmClient { PSECURITY_TOKEN pSecurityToken; struct UserInfo *pUserInfo; NvBool bIsClientVirtualMode; + NvU32 clientGfid; NvS32 imexChannel; PNODE pCliSyncGpuBoostTree; NvS32 lockStressCounter; diff --git a/src/nvidia/generated/g_gpu_class_list.c b/src/nvidia/generated/g_gpu_class_list.c index f13015d77..5a4b15dfb 100644 --- a/src/nvidia/generated/g_gpu_class_list.c +++ b/src/nvidia/generated/g_gpu_class_list.c @@ -136,6 +136,8 @@ gpuGetEngClassDescriptorList_TU102(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC57B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_A, ENG_GR(0) }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -238,6 +240,8 @@ gpuGetEngClassDescriptorList_TU104(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC57B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_A, ENG_GR(0) }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -341,6 +345,8 @@ gpuGetEngClassDescriptorList_TU106(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC57B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_A, ENG_GR(0) }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -442,6 +448,8 @@ gpuGetEngClassDescriptorList_TU116(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC57B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_A, ENG_GR(0) }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -543,6 +551,8 @@ gpuGetEngClassDescriptorList_TU117(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC57B_WINDOW_IMM_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57D_CORE_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, { NVC57E_WINDOW_CHANNEL_DMA, ENG_KERNEL_DISPLAY }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_A, ENG_GR(0) }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -669,6 +679,8 @@ gpuGetEngClassDescriptorList_GA100(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC6B0_VIDEO_DECODER, ENG_NVDEC(3) }, { NVC6B0_VIDEO_DECODER, ENG_NVDEC(4) }, { NVC6FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -787,6 +799,8 @@ gpuGetEngClassDescriptorList_GA102(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) }, { NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVC7FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -905,6 +919,8 @@ gpuGetEngClassDescriptorList_GA103(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) }, { NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVC7FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1023,6 +1039,8 @@ gpuGetEngClassDescriptorList_GA104(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) }, { NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVC7FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1141,6 +1159,8 @@ gpuGetEngClassDescriptorList_GA106(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) }, { NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVC7FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1259,6 +1279,8 @@ gpuGetEngClassDescriptorList_GA107(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC7B0_VIDEO_DECODER, ENG_NVDEC(1) }, { NVC7B7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVC7FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1385,6 +1407,8 @@ gpuGetEngClassDescriptorList_AD102(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVC9FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1511,6 +1535,8 @@ gpuGetEngClassDescriptorList_AD103(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVC9FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1637,6 +1663,8 @@ gpuGetEngClassDescriptorList_AD104(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVC9FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1763,6 +1791,8 @@ gpuGetEngClassDescriptorList_AD106(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVC9FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -1889,6 +1919,8 @@ gpuGetEngClassDescriptorList_AD107(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVC9D1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVC9FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -2027,6 +2059,8 @@ gpuGetEngClassDescriptorList_GH100(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVB8D1_VIDEO_NVJPG, ENG_NVJPEG(6) }, { NVB8D1_VIDEO_NVJPG, ENG_NVJPEG(7) }, { NVB8FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -2177,6 +2211,8 @@ gpuGetEngClassDescriptorList_GB100(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCDD1_VIDEO_NVJPG, ENG_NVJPEG(7) }, { NVCDFA_VIDEO_OFA, ENG_OFA(0) }, { NVCDFA_VIDEO_OFA, ENG_OFA(1) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -2308,6 +2344,8 @@ gpuGetEngClassDescriptorList_GB102(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCDD1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVCDD1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVCDFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -2436,6 +2474,8 @@ gpuGetEngClassDescriptorList_GB10B(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCED0_VIDEO_NVJPG, ENG_NVJPEG(0) }, { NVCED0_VIDEO_NVJPG, ENG_NVJPEG(1) }, { NVCEFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -2586,6 +2626,8 @@ gpuGetEngClassDescriptorList_GB110(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCDD1_VIDEO_NVJPG, ENG_NVJPEG(7) }, { NVCDFA_VIDEO_OFA, ENG_OFA(0) }, { NVCDFA_VIDEO_OFA, ENG_OFA(1) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -2717,6 +2759,8 @@ gpuGetEngClassDescriptorList_GB112(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCDD1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVCDD1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVCDFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -2879,6 +2923,8 @@ gpuGetEngClassDescriptorList_GB202(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(2) }, { NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(3) }, { NVCFFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -3036,6 +3082,8 @@ gpuGetEngClassDescriptorList_GB203(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(0) }, { NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(1) }, { NVCFFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -3189,6 +3237,8 @@ gpuGetEngClassDescriptorList_GB205(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(0) }, { NVCFFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -3342,6 +3392,8 @@ gpuGetEngClassDescriptorList_GB206(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVCFD1_VIDEO_NVJPG, ENG_NVJPEG(0) }, { NVCFFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -3494,6 +3546,8 @@ gpuGetEngClassDescriptorList_GB207(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVCFB0_VIDEO_DECODER, ENG_NVDEC(0) }, { NVCFB7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVCFFA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -3659,6 +3713,8 @@ gpuGetEngClassDescriptorList_GB20B(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVD1B0_VIDEO_DECODER, ENG_NVDEC(0) }, { NVD1B7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVD1FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -3824,6 +3880,8 @@ gpuGetEngClassDescriptorList_GB20C(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) { NVD1B0_VIDEO_DECODER, ENG_NVDEC(0) }, { NVD1B7_VIDEO_ENCODER, ENG_NVENC(0) }, { NVD1FA_VIDEO_OFA, ENG_OFA(0) }, + { NVENC_SW_SESSION, ENG_SW }, + { NVFBC_SW_SESSION, ENG_SW }, { NV_CONFIDENTIAL_COMPUTE, ENG_CONF_COMPUTE }, { RM_USER_SHARED_DATA, ENG_GPU }, { TURING_CHANNEL_GPFIFO_A, ENG_KERNEL_FIFO }, @@ -3900,4 +3958,4 @@ gpuGetEngClassDescriptorList_T264D(OBJGPU *pGpu, NvU32 *pNumClassDescriptors) return halT264DClassDescriptorList; } -ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= (15 /* generic */ + 114 /* GB20B */)); +ct_assert(NV0080_CTRL_GPU_CLASSLIST_MAX_SIZE >= (15 /* generic */ + 116 /* GB20B */)); diff --git a/src/nvidia/generated/g_kern_bus_nvoc.h b/src/nvidia/generated/g_kern_bus_nvoc.h index 0e59286bd..d798e84b1 100644 --- a/src/nvidia/generated/g_kern_bus_nvoc.h +++ b/src/nvidia/generated/g_kern_bus_nvoc.h @@ -363,6 +363,8 @@ struct __nvoc_inner_struc_KernelBus_3__ { NvU64 base; NvU64 size; NvBool bToggleBindPoint; + RmPhysAddr imbPhysAddress; + NvU32 imbAddrSpace; }; struct __nvoc_inner_struc_KernelBus_4__ { diff --git a/src/nvidia/generated/g_kern_mem_sys_nvoc.c b/src/nvidia/generated/g_kern_mem_sys_nvoc.c index 1f0400e95..a123e2288 100644 --- a/src/nvidia/generated/g_kern_mem_sys_nvoc.c +++ b/src/nvidia/generated/g_kern_mem_sys_nvoc.c @@ -372,6 +372,18 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis pThis->__kmemsysGetUsableFbSize__ = &kmemsysGetUsableFbSize_KERNEL; } + // kmemsysReadHdmTopFromVbios -- halified (2 hals) body + if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x60000000UL) ) || + ( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000006UL) )) /* ChipHal: GB100 | GB102 | GB110 | GB112 */ + { + pThis->__kmemsysReadHdmTopFromVbios__ = &kmemsysReadHdmTopFromVbios_GB100; + } + // default + else + { + pThis->__kmemsysReadHdmTopFromVbios__ = &kmemsysReadHdmTopFromVbios_2e93d0; + } + // kmemsysCacheOp -- halified (2 hals) body if (( ((chipHal_HalVarIdx >> 5) == 1UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0xf0000000UL) ) || ( ((chipHal_HalVarIdx >> 5) == 2UL) && ((1UL << (chipHal_HalVarIdx & 0x1f)) & 0x00000fe6UL) )) /* ChipHal: GH100 | GB100 | GB102 | GB10B | GB110 | GB112 | GB202 | GB203 | GB205 | GB206 | GB207 | GB20B | GB20C */ @@ -845,13 +857,13 @@ static void __nvoc_init_funcTable_KernelMemorySystem_1(KernelMemorySystem *pThis { pThis->__kmemsysIsNonPasidAtsSupported__ = &kmemsysIsNonPasidAtsSupported_3dd2c9; } -} // End __nvoc_init_funcTable_KernelMemorySystem_1 with approximately 93 basic block(s). +} // End __nvoc_init_funcTable_KernelMemorySystem_1 with approximately 95 basic block(s). -// Initialize vtable(s) for 50 virtual method(s). +// Initialize vtable(s) for 51 virtual method(s). void __nvoc_init_funcTable_KernelMemorySystem(KernelMemorySystem *pThis, GpuHalspecOwner *pGpuhalspecowner, RmHalspecOwner *pRmhalspecowner) { - // Initialize vtable(s) with 36 per-object function pointer(s). + // Initialize vtable(s) with 37 per-object function pointer(s). __nvoc_init_funcTable_KernelMemorySystem_1(pThis, pGpuhalspecowner, pRmhalspecowner); } diff --git a/src/nvidia/generated/g_kern_mem_sys_nvoc.h b/src/nvidia/generated/g_kern_mem_sys_nvoc.h index a6136aede..ac6ffc7a2 100644 --- a/src/nvidia/generated/g_kern_mem_sys_nvoc.h +++ b/src/nvidia/generated/g_kern_mem_sys_nvoc.h @@ -247,10 +247,11 @@ struct KernelMemorySystem { struct OBJENGSTATE *__nvoc_pbase_OBJENGSTATE; // engstate super struct KernelMemorySystem *__nvoc_pbase_KernelMemorySystem; // kmemsys - // Vtable with 36 per-object function pointers - NV_STATUS (*__kmemsysGetFbNumaInfo__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *, NvU64 *, NvS32 *); // halified (2 hals) body + // Vtable with 37 per-object function pointers + NV_STATUS (*__kmemsysGetFbNumaInfo__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *, NvU64 *, NvU64 *, NvS32 *); // halified (2 hals) body NV_STATUS (*__kmemsysReadUsableFbSize__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *); // halified (3 hals) body NV_STATUS (*__kmemsysGetUsableFbSize__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *); // halified (2 hals) body + NV_STATUS (*__kmemsysReadHdmTopFromVbios__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU64 *); // halified (2 hals) body NV_STATUS (*__kmemsysCacheOp__)(OBJGPU *, struct KernelMemorySystem * /*this*/, PMEMORY_DESCRIPTOR, FB_CACHE_MEMTYPE, FB_CACHE_OP); // halified (2 hals) body NV_STATUS (*__kmemsysDoCacheOp__)(OBJGPU *, struct KernelMemorySystem * /*this*/, NvU32, NvU32, NvU32, PRMTIMEOUT); // halified (2 hals) body NvU32 (*__kmemsysReadL2SysmemInvalidateReg__)(OBJGPU *, struct KernelMemorySystem * /*this*/); // halified (2 hals) body @@ -430,6 +431,16 @@ static inline void kmemsysTeardownCoherentCpuLink(OBJGPU *pGpu, struct KernelMem #define kmemsysTeardownCoherentCpuLink(pGpu, pKernelMemorySystem, bFlush) kmemsysTeardownCoherentCpuLink_IMPL(pGpu, pKernelMemorySystem, bFlush) #endif // __nvoc_kern_mem_sys_h_disabled +NV_STATUS kmemsysGetCpuCoherentFbRange_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pCpuCoherentFbBase, NvU64 *pCpuCoherentFbEnd); +#ifdef __nvoc_kern_mem_sys_h_disabled +static inline NV_STATUS kmemsysGetCpuCoherentFbRange(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pCpuCoherentFbBase, NvU64 *pCpuCoherentFbEnd) { + NV_ASSERT_FAILED_PRECOMP("KernelMemorySystem was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else // __nvoc_kern_mem_sys_h_disabled +#define kmemsysGetCpuCoherentFbRange(pGpu, pKernelMemorySystem, pCpuCoherentFbBase, pCpuCoherentFbEnd) kmemsysGetCpuCoherentFbRange_IMPL(pGpu, pKernelMemorySystem, pCpuCoherentFbBase, pCpuCoherentFbEnd) +#endif // __nvoc_kern_mem_sys_h_disabled + NV_STATUS kmemsysSendL2InvalidateEvict_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags); #ifdef __nvoc_kern_mem_sys_h_disabled static inline NV_STATUS kmemsysSendL2InvalidateEvict(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU32 flags) { @@ -618,14 +629,17 @@ static inline NV_STATUS kmemsysInitMIGGPUInstanceMemConfigForSwizzId(OBJGPU *arg #define kmemsysStateDestroy_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__nvoc_metadata_ptr->vtable.__kmemsysStateDestroy__ #define kmemsysStateDestroy(pGpu, pKernelMemorySystem) kmemsysStateDestroy_DISPATCH(pGpu, pKernelMemorySystem) #define kmemsysGetFbNumaInfo_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetFbNumaInfo__ -#define kmemsysGetFbNumaInfo(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) kmemsysGetFbNumaInfo_DISPATCH(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) -#define kmemsysGetFbNumaInfo_HAL(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) kmemsysGetFbNumaInfo_DISPATCH(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId) +#define kmemsysGetFbNumaInfo(pGpu, pKernelMemorySystem, physAddr, physSize, rsvdPhysAddr, numaNodeId) kmemsysGetFbNumaInfo_DISPATCH(pGpu, pKernelMemorySystem, physAddr, physSize, rsvdPhysAddr, numaNodeId) +#define kmemsysGetFbNumaInfo_HAL(pGpu, pKernelMemorySystem, physAddr, physSize, rsvdPhysAddr, numaNodeId) kmemsysGetFbNumaInfo_DISPATCH(pGpu, pKernelMemorySystem, physAddr, physSize, rsvdPhysAddr, numaNodeId) #define kmemsysReadUsableFbSize_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysReadUsableFbSize__ #define kmemsysReadUsableFbSize(pGpu, pKernelMemorySystem, pFbSize) kmemsysReadUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) #define kmemsysReadUsableFbSize_HAL(pGpu, pKernelMemorySystem, pFbSize) kmemsysReadUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) #define kmemsysGetUsableFbSize_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysGetUsableFbSize__ #define kmemsysGetUsableFbSize(pGpu, pKernelMemorySystem, pFbSize) kmemsysGetUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) #define kmemsysGetUsableFbSize_HAL(pGpu, pKernelMemorySystem, pFbSize) kmemsysGetUsableFbSize_DISPATCH(pGpu, pKernelMemorySystem, pFbSize) +#define kmemsysReadHdmTopFromVbios_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysReadHdmTopFromVbios__ +#define kmemsysReadHdmTopFromVbios(pGpu, pKernelMemorySystem, pHdmTop) kmemsysReadHdmTopFromVbios_DISPATCH(pGpu, pKernelMemorySystem, pHdmTop) +#define kmemsysReadHdmTopFromVbios_HAL(pGpu, pKernelMemorySystem, pHdmTop) kmemsysReadHdmTopFromVbios_DISPATCH(pGpu, pKernelMemorySystem, pHdmTop) #define kmemsysCacheOp_FNPTR(pKernelMemorySystem) pKernelMemorySystem->__kmemsysCacheOp__ #define kmemsysCacheOp(pGpu, pKernelMemorySystem, arg3, arg4, operation) kmemsysCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg3, arg4, operation) #define kmemsysCacheOp_HAL(pGpu, pKernelMemorySystem, arg3, arg4, operation) kmemsysCacheOp_DISPATCH(pGpu, pKernelMemorySystem, arg3, arg4, operation) @@ -784,8 +798,8 @@ static inline void kmemsysStateDestroy_DISPATCH(OBJGPU *pGpu, struct KernelMemor pKernelMemorySystem->__nvoc_metadata_ptr->vtable.__kmemsysStateDestroy__(pGpu, pKernelMemorySystem); } -static inline NV_STATUS kmemsysGetFbNumaInfo_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { - return pKernelMemorySystem->__kmemsysGetFbNumaInfo__(pGpu, pKernelMemorySystem, physAddr, rsvdPhysAddr, numaNodeId); +static inline NV_STATUS kmemsysGetFbNumaInfo_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *physSize, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { + return pKernelMemorySystem->__kmemsysGetFbNumaInfo__(pGpu, pKernelMemorySystem, physAddr, physSize, rsvdPhysAddr, numaNodeId); } static inline NV_STATUS kmemsysReadUsableFbSize_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pFbSize) { @@ -796,6 +810,10 @@ static inline NV_STATUS kmemsysGetUsableFbSize_DISPATCH(OBJGPU *pGpu, struct Ker return pKernelMemorySystem->__kmemsysGetUsableFbSize__(pGpu, pKernelMemorySystem, pFbSize); } +static inline NV_STATUS kmemsysReadHdmTopFromVbios_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pHdmTop) { + return pKernelMemorySystem->__kmemsysReadHdmTopFromVbios__(pGpu, pKernelMemorySystem, pHdmTop); +} + static inline NV_STATUS kmemsysCacheOp_DISPATCH(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg3, FB_CACHE_MEMTYPE arg4, FB_CACHE_OP operation) { return pKernelMemorySystem->__kmemsysCacheOp__(pGpu, pKernelMemorySystem, arg3, arg4, operation); } @@ -1025,9 +1043,9 @@ NV_STATUS kmemsysStateUnload_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKern void kmemsysStateDestroy_IMPL(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem); -NV_STATUS kmemsysGetFbNumaInfo_GV100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId); +NV_STATUS kmemsysGetFbNumaInfo_GV100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *physSize, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId); -static inline NV_STATUS kmemsysGetFbNumaInfo_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { +static inline NV_STATUS kmemsysGetFbNumaInfo_56cd7a(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, NvU64 *physSize, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId) { return NV_OK; } @@ -1045,6 +1063,13 @@ static inline NV_STATUS kmemsysGetUsableFbSize_5baef9(OBJGPU *pGpu, struct Kerne NV_ASSERT_OR_RETURN_PRECOMP(0, NV_ERR_NOT_SUPPORTED); } +NV_STATUS kmemsysReadHdmTopFromVbios_GB100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pHdmTop); + +static inline NV_STATUS kmemsysReadHdmTopFromVbios_2e93d0(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, NvU64 *pHdmTop) { + *pHdmTop = 0; + return NV_OK; +} + NV_STATUS kmemsysCacheOp_GM200(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg3, FB_CACHE_MEMTYPE arg4, FB_CACHE_OP operation); NV_STATUS kmemsysCacheOp_GH100(OBJGPU *pGpu, struct KernelMemorySystem *pKernelMemorySystem, PMEMORY_DESCRIPTOR arg3, FB_CACHE_MEMTYPE arg4, FB_CACHE_OP operation); diff --git a/src/nvidia/generated/g_nv_name_released.h b/src/nvidia/generated/g_nv_name_released.h index 6b6da3681..259583aeb 100644 --- a/src/nvidia/generated/g_nv_name_released.h +++ b/src/nvidia/generated/g_nv_name_released.h @@ -5213,7 +5213,6 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x2236, 0x1482, 0x10de, "NVIDIA A10" }, { 0x2237, 0x152f, 0x10de, "NVIDIA A10G" }, { 0x2238, 0x1677, 0x10de, "NVIDIA A10M" }, - { 0x230E, 0x20df, 0x10de, "NVIDIA H20 NVL16" }, { 0x2321, 0x1839, 0x10de, "NVIDIA H100 NVL" }, { 0x2322, 0x17a4, 0x10de, "NVIDIA H800 PCIe" }, { 0x2324, 0x17a6, 0x10de, "NVIDIA H800" }, @@ -5414,28 +5413,21 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x2941, 0x20d5, 0x10de, "NVIDIA GB200" }, { 0x2941, 0x21c9, 0x10de, "NVIDIA GB200" }, { 0x2941, 0x21ca, 0x10de, "NVIDIA GB200" }, - { 0x29BB, 0x207c, 0x10de, "NVIDIA DRIVE P2021" }, { 0x2B85, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090" }, { 0x2B87, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 D" }, - { 0x2B8C, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 D v2" }, + { 0x2B8C, 0x530c, 0x17aa, "NVIDIA GeForce RTX 5090 D v2" }, { 0x2BB1, 0x204b, 0x1028, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" }, { 0x2BB1, 0x204b, 0x103c, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" }, { 0x2BB1, 0x204b, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" }, { 0x2BB1, 0x204b, 0x17aa, "NVIDIA RTX PRO 6000 Blackwell Workstation Edition" }, { 0x2BB3, 0x204d, 0x1028, "NVIDIA RTX PRO 5000 Blackwell" }, - { 0x2BB3, 0x227a, 0x1028, "NVIDIA RTX PRO 5000 72GB Blackwell" }, { 0x2BB3, 0x204d, 0x103c, "NVIDIA RTX PRO 5000 Blackwell" }, - { 0x2BB3, 0x227a, 0x103c, "NVIDIA RTX PRO 5000 72GB Blackwell" }, { 0x2BB3, 0x204d, 0x10de, "NVIDIA RTX PRO 5000 Blackwell" }, - { 0x2BB3, 0x227a, 0x10de, "NVIDIA RTX PRO 5000 72GB Blackwell" }, { 0x2BB3, 0x204d, 0x17aa, "NVIDIA RTX PRO 5000 Blackwell" }, - { 0x2BB3, 0x227a, 0x17aa, "NVIDIA RTX PRO 5000 72GB Blackwell" }, { 0x2BB4, 0x204c, 0x1028, "NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition" }, { 0x2BB4, 0x204c, 0x103c, "NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition" }, { 0x2BB4, 0x204c, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition" }, { 0x2BB4, 0x204c, 0x17aa, "NVIDIA RTX PRO 6000 Blackwell Max-Q Workstation Edition" }, - { 0x2BB5, 0x204e, 0x10de, "NVIDIA RTX PRO 6000 Blackwell Server Edition" }, - { 0x2BB9, 0x2091, 0x10de, "NVIDIA RTX 6000D" }, { 0x2C02, 0x0000, 0x0000, "NVIDIA GeForce RTX 5080" }, { 0x2C05, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti" }, { 0x2C18, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 Laptop GPU" }, @@ -5446,7 +5438,6 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x2C31, 0x2051, 0x17aa, "NVIDIA RTX PRO 4500 Blackwell" }, { 0x2C33, 0x2053, 0x1028, "NVIDIA RTX PRO 4000 Blackwell SFF Edition" }, { 0x2C33, 0x2053, 0x103c, "NVIDIA RTX PRO 4000 Blackwell SFF Edition" }, - { 0x2C33, 0x2053, 0x10de, "NVIDIA RTX PRO 4000 Blackwell SFF Edition" }, { 0x2C33, 0x2053, 0x17aa, "NVIDIA RTX PRO 4000 Blackwell SFF Edition" }, { 0x2C34, 0x2052, 0x1028, "NVIDIA RTX PRO 4000 Blackwell" }, { 0x2C34, 0x2052, 0x103c, "NVIDIA RTX PRO 4000 Blackwell" }, @@ -5456,7 +5447,6 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x2C39, 0x0000, 0x0000, "NVIDIA RTX PRO 4000 Blackwell Generation Laptop GPU" }, { 0x2C58, 0x0000, 0x0000, "NVIDIA GeForce RTX 5090 Laptop GPU" }, { 0x2C59, 0x0000, 0x0000, "NVIDIA GeForce RTX 5080 Laptop GPU" }, - { 0x2C77, 0x0000, 0x0000, "NVIDIA RTX PRO 5000 Blackwell Embedded GPU" }, { 0x2C79, 0x0000, 0x0000, "NVIDIA RTX PRO 4000 Blackwell Embedded GPU" }, { 0x2D04, 0x0000, 0x0000, "NVIDIA GeForce RTX 5060 Ti" }, { 0x2D05, 0x0000, 0x0000, "NVIDIA GeForce RTX 5060" }, @@ -5464,25 +5454,21 @@ static const CHIPS_RELEASED sChipsReleased[] = { { 0x2D19, 0x0000, 0x0000, "NVIDIA GeForce RTX 5060 Laptop GPU" }, { 0x2D30, 0x2054, 0x1028, "NVIDIA RTX PRO 2000 Blackwell" }, { 0x2D30, 0x2054, 0x103c, "NVIDIA RTX PRO 2000 Blackwell" }, - { 0x2D30, 0x2054, 0x10de, "NVIDIA RTX PRO 2000 Blackwell" }, { 0x2D30, 0x2054, 0x17aa, "NVIDIA RTX PRO 2000 Blackwell" }, { 0x2D39, 0x0000, 0x0000, "NVIDIA RTX PRO 2000 Blackwell Generation Laptop GPU" }, { 0x2D58, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Laptop GPU" }, { 0x2D59, 0x0000, 0x0000, "NVIDIA GeForce RTX 5060 Laptop GPU" }, { 0x2D79, 0x0000, 0x0000, "NVIDIA RTX PRO 2000 Blackwell Embedded GPU" }, - { 0x2D83, 0x0000, 0x0000, "NVIDIA GeForce RTX 5050" }, + { 0x2D83, 0xc791, 0x17aa, "NVIDIA GeForce RTX 5050" }, { 0x2D98, 0x0000, 0x0000, "NVIDIA GeForce RTX 5050 Laptop GPU" }, { 0x2DB8, 0x0000, 0x0000, "NVIDIA RTX PRO 1000 Blackwell Generation Laptop GPU" }, { 0x2DB9, 0x0000, 0x0000, "NVIDIA RTX PRO 500 Blackwell Generation Laptop GPU" }, { 0x2DD8, 0x0000, 0x0000, "NVIDIA GeForce RTX 5050 Laptop GPU" }, { 0x2DF9, 0x0000, 0x0000, "NVIDIA RTX PRO 500 Blackwell Embedded GPU" }, - { 0x2E12, 0x21ec, 0x10de, "NVIDIA GB10" }, { 0x2F04, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070" }, { 0x2F18, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti Laptop GPU" }, { 0x2F38, 0x0000, 0x0000, "NVIDIA RTX PRO 3000 Blackwell Generation Laptop GPU" }, { 0x2F58, 0x0000, 0x0000, "NVIDIA GeForce RTX 5070 Ti Laptop GPU" }, - { 0x3182, 0x20e6, 0x10de, "NVIDIA B300 SXM6 AC" }, - { 0x31C2, 0x21f1, 0x10de, "NVIDIA GB300" }, { 0x13BD, 0x11cc, 0x10DE, "GRID M10-0B" }, { 0x13BD, 0x11cd, 0x10DE, "GRID M10-1B" }, { 0x13BD, 0x11ce, 0x10DE, "GRID M10-0Q" }, diff --git a/src/nvidia/generated/g_os_nvoc.h b/src/nvidia/generated/g_os_nvoc.h index 2c08adfd2..55d4aaf29 100644 --- a/src/nvidia/generated/g_os_nvoc.h +++ b/src/nvidia/generated/g_os_nvoc.h @@ -768,6 +768,7 @@ NV_STATUS osGetAtsTargetAddressRange(OBJGPU *pGpu, NvU32 peerIndex); NV_STATUS osGetFbNumaInfo(OBJGPU *pGpu, NvU64 *pAddrPhys, + NvU64 *pSizePhys, NvU64 *pAddrRsvdPhys, NvS32 *pNodeId); NV_STATUS osGetEgmInfo(OBJGPU *pGpu, diff --git a/src/nvidia/generated/g_rpc-message-header.h b/src/nvidia/generated/g_rpc-message-header.h index 4d188b95a..8ee6a9e57 100644 --- a/src/nvidia/generated/g_rpc-message-header.h +++ b/src/nvidia/generated/g_rpc-message-header.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/generated/g_rpc-structures.h b/src/nvidia/generated/g_rpc-structures.h index f2ca7dc4e..cdcef0bda 100644 --- a/src/nvidia/generated/g_rpc-structures.h +++ b/src/nvidia/generated/g_rpc-structures.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/generated/g_sdk-structures.h b/src/nvidia/generated/g_sdk-structures.h index 8f58c3a44..a38c47b2e 100644 --- a/src/nvidia/generated/g_sdk-structures.h +++ b/src/nvidia/generated/g_sdk-structures.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: Copyright (c) 2008-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved. + * SPDX-FileCopyrightText: Copyright (c) 2008-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved. * SPDX-License-Identifier: MIT * * Permission is hereby granted, free of charge, to any person obtaining a diff --git a/src/nvidia/generated/g_subdevice_nvoc.c b/src/nvidia/generated/g_subdevice_nvoc.c index 45a2f94b4..762f91630 100644 --- a/src/nvidia/generated/g_subdevice_nvoc.c +++ b/src/nvidia/generated/g_subdevice_nvoc.c @@ -6113,12 +6113,12 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [398] */ -#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) /*pFunc=*/ (void (*)(void)) NULL, #else /*pFunc=*/ (void (*)(void)) &subdeviceCtrlCmdFbGetMemAlignment_IMPL, -#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) - /*flags=*/ 0x18u, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x109u) + /*flags=*/ 0x109u, /*accessRight=*/0x0u, /*methodId=*/ 0x20801342u, /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_MEM_ALIGNMENT_PARAMS), @@ -6338,6 +6338,36 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic #endif }, { /* [413] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x514u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) &subdeviceCtrlCmdFbGetCpuCoherentRange_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x514u) + /*flags=*/ 0x514u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20801361u, + /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdFbGetCpuCoherentRange" +#endif + }, + { /* [414] */ +#if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x554u) + /*pFunc=*/ (void (*)(void)) NULL, +#else + /*pFunc=*/ (void (*)(void)) &subdeviceCtrlCmdFbGetWprRegionInfo_IMPL, +#endif // NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x554u) + /*flags=*/ 0x554u, + /*accessRight=*/0x0u, + /*methodId=*/ 0x20801362u, + /*paramSize=*/ sizeof(NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS), + /*pClassInfo=*/ &(__nvoc_class_def_Subdevice.classInfo), +#if NV_PRINTF_STRINGS_ALLOWED + /*func=*/ "subdeviceCtrlCmdFbGetWprRegionInfo" +#endif + }, + { /* [415] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1050bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6352,7 +6382,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetArchInfo" #endif }, - { /* [414] */ + { /* [416] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6367,7 +6397,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcServiceInterrupts" #endif }, - { /* [415] */ + { /* [417] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6382,7 +6412,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetManufacturer" #endif }, - { /* [416] */ + { /* [418] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6397,7 +6427,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcChangeReplayableFaultOwnership" #endif }, - { /* [417] */ + { /* [419] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6412,7 +6442,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetEngineNotificationIntrVectors" #endif }, - { /* [418] */ + { /* [420] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6427,7 +6457,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetStaticIntrTable" #endif }, - { /* [419] */ + { /* [421] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6442,7 +6472,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdMcGetIntrCategorySubtreeMap" #endif }, - { /* [420] */ + { /* [422] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10518u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6457,7 +6487,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPciInfo" #endif }, - { /* [421] */ + { /* [423] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10518u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6472,7 +6502,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPciBarInfo" #endif }, - { /* [422] */ + { /* [424] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6487,7 +6517,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetPcieLinkWidth" #endif }, - { /* [423] */ + { /* [425] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6502,7 +6532,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetPcieSpeed" #endif }, - { /* [424] */ + { /* [426] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6517,7 +6547,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusServiceGpuMultifunctionState" #endif }, - { /* [425] */ + { /* [427] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6532,7 +6562,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexCounters" #endif }, - { /* [426] */ + { /* [428] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6547,7 +6577,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusClearPexCounters" #endif }, - { /* [427] */ + { /* [429] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6562,7 +6592,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusFreezePexCounters" #endif }, - { /* [428] */ + { /* [430] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6577,7 +6607,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexLaneCounters" #endif }, - { /* [429] */ + { /* [431] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6592,7 +6622,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieLtrLatency" #endif }, - { /* [430] */ + { /* [432] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6607,7 +6637,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetPcieLtrLatency" #endif }, - { /* [431] */ + { /* [433] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6622,7 +6652,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPexUtilCounters" #endif }, - { /* [432] */ + { /* [434] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6637,7 +6667,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusClearPexUtilCounters" #endif }, - { /* [433] */ + { /* [435] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6652,7 +6682,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetBFD" #endif }, - { /* [434] */ + { /* [436] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6667,7 +6697,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetAspmDisableFlags" #endif }, - { /* [435] */ + { /* [437] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6682,7 +6712,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetInfoV2" #endif }, - { /* [436] */ + { /* [438] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6697,7 +6727,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusControlPublicAspmBits" #endif }, - { /* [437] */ + { /* [439] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6712,7 +6742,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkPeerIdMask" #endif }, - { /* [438] */ + { /* [440] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6727,7 +6757,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetEomParameters" #endif }, - { /* [439] */ + { /* [441] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6742,7 +6772,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetUphyDlnCfgSpace" #endif }, - { /* [440] */ + { /* [442] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6757,7 +6787,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetEomStatus" #endif }, - { /* [441] */ + { /* [443] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6772,7 +6802,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieReqAtomicsCaps" #endif }, - { /* [442] */ + { /* [444] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6787,7 +6817,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieSupportedGpuAtomics" #endif }, - { /* [443] */ + { /* [445] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6802,7 +6832,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetC2CInfo" #endif }, - { /* [444] */ + { /* [446] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1000u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6817,7 +6847,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSysmemAccess" #endif }, - { /* [445] */ + { /* [447] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6832,7 +6862,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetC2CErrorInfo" #endif }, - { /* [446] */ + { /* [448] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6847,7 +6877,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetP2pMapping" #endif }, - { /* [447] */ + { /* [449] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6862,7 +6892,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusUnsetP2pMapping" #endif }, - { /* [448] */ + { /* [450] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40448u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6877,7 +6907,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetPcieCplAtomicsCaps" #endif }, - { /* [449] */ + { /* [451] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6892,7 +6922,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetC2CLpwrStats" #endif }, - { /* [450] */ + { /* [452] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6907,7 +6937,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusSetC2CLpwrStateVote" #endif }, - { /* [451] */ + { /* [453] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10318u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6922,7 +6952,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdKPerfBoost" #endif }, - { /* [452] */ + { /* [454] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6937,7 +6967,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetLevelInfo_V2" #endif }, - { /* [453] */ + { /* [455] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6952,7 +6982,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetPowerstate" #endif }, - { /* [454] */ + { /* [456] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6967,7 +6997,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfSetPowerstate" #endif }, - { /* [455] */ + { /* [457] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6982,7 +7012,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfNotifyVideoevent" #endif }, - { /* [456] */ + { /* [458] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -6997,7 +7027,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetCurrentPstate" #endif }, - { /* [457] */ + { /* [459] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7012,7 +7042,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetTegraPerfmonSample" #endif }, - { /* [458] */ + { /* [460] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4au) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7027,7 +7057,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfRatedTdpGetControl" #endif }, - { /* [459] */ + { /* [461] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10008u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7042,7 +7072,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfRatedTdpSetControl" #endif }, - { /* [460] */ + { /* [462] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40048u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7057,7 +7087,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetVideoEnginePerfmonSample" #endif }, - { /* [461] */ + { /* [463] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7072,7 +7102,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfSetAuxPowerState" #endif }, - { /* [462] */ + { /* [464] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7087,7 +7117,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfReservePerfmonHw" #endif }, - { /* [463] */ + { /* [465] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x50008u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7102,7 +7132,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPerfGetGpumonPerfmonUtilSamplesV2" #endif }, - { /* [464] */ + { /* [466] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7117,7 +7147,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcReadVirtualMem" #endif }, - { /* [465] */ + { /* [467] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7132,7 +7162,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetErrorCount" #endif }, - { /* [466] */ + { /* [468] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7147,7 +7177,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcSetCleanErrorHistory" #endif }, - { /* [467] */ + { /* [469] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7162,7 +7192,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetWatchdogInfo" #endif }, - { /* [468] */ + { /* [470] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7177,7 +7207,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcDisableWatchdog" #endif }, - { /* [469] */ + { /* [471] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7192,7 +7222,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcEnableWatchdog" #endif }, - { /* [470] */ + { /* [472] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7207,7 +7237,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcReleaseWatchdogRequests" #endif }, - { /* [471] */ + { /* [473] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40154u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7222,7 +7252,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetRcRecovery" #endif }, - { /* [472] */ + { /* [474] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40154u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7237,7 +7267,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetRcRecovery" #endif }, - { /* [473] */ + { /* [475] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x18u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7252,7 +7282,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcSoftDisableWatchdog" #endif }, - { /* [474] */ + { /* [476] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7267,7 +7297,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetRcInfo" #endif }, - { /* [475] */ + { /* [477] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7282,7 +7312,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetRcInfo" #endif }, - { /* [476] */ + { /* [478] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7297,7 +7327,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRcGetErrorV2" #endif }, - { /* [477] */ + { /* [479] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7312,7 +7342,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioProgramDirection" #endif }, - { /* [478] */ + { /* [480] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7327,7 +7357,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioProgramOutput" #endif }, - { /* [479] */ + { /* [481] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7342,7 +7372,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioReadInput" #endif }, - { /* [480] */ + { /* [482] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7357,7 +7387,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdInternalGpioActivateHwFunction" #endif }, - { /* [481] */ + { /* [483] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7372,7 +7402,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetDumpSize" #endif }, - { /* [482] */ + { /* [484] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7387,7 +7417,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetDump" #endif }, - { /* [483] */ + { /* [485] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7402,7 +7432,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdGetNocatJournalRpt" #endif }, - { /* [484] */ + { /* [486] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7417,7 +7447,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdSetNocatJournalData" #endif }, - { /* [485] */ + { /* [487] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7432,7 +7462,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvdInsertNocatJournalRecord" #endif }, - { /* [486] */ + { /* [488] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10008u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7447,7 +7477,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDmaInvalidateTLB" #endif }, - { /* [487] */ + { /* [489] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10008u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7462,7 +7492,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdDmaGetInfo" #endif }, - { /* [488] */ + { /* [490] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7477,7 +7507,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdPmgrGetModuleInfo" #endif }, - { /* [489] */ + { /* [491] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7492,7 +7522,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGc6Entry" #endif }, - { /* [490] */ + { /* [492] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x2u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7507,7 +7537,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGc6Exit" #endif }, - { /* [491] */ + { /* [493] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7522,7 +7552,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdLpwrDifrCtrl" #endif }, - { /* [492] */ + { /* [494] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7537,7 +7567,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdLpwrDifrPrefetchResponse" #endif }, - { /* [493] */ + { /* [495] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7552,7 +7582,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCaps" #endif }, - { /* [494] */ + { /* [496] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x30349u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7567,7 +7597,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCePceMask" #endif }, - { /* [495] */ + { /* [497] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7582,7 +7612,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetCapsV2" #endif }, - { /* [496] */ + { /* [498] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7597,7 +7627,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdatePceLceMappings" #endif }, - { /* [497] */ + { /* [499] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7612,7 +7642,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdateClassDB" #endif }, - { /* [498] */ + { /* [500] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x301d0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7627,7 +7657,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetPhysicalCaps" #endif }, - { /* [499] */ + { /* [501] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1c040u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7642,7 +7672,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetFaultMethodBufferSize" #endif }, - { /* [500] */ + { /* [502] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7657,7 +7687,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetHubPceMask" #endif }, - { /* [501] */ + { /* [503] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7672,7 +7702,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetAllCaps" #endif }, - { /* [502] */ + { /* [504] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x101d0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7687,7 +7717,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetAllPhysicalCaps" #endif }, - { /* [503] */ + { /* [505] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x145u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7702,7 +7732,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetLceShimInfo" #endif }, - { /* [504] */ + { /* [506] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7717,7 +7747,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeUpdatePceLceMappingsV2" #endif }, - { /* [505] */ + { /* [507] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7732,7 +7762,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetHubPceMaskV2" #endif }, - { /* [506] */ + { /* [508] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x100c0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7747,7 +7777,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetPceConfigForLceType" #endif }, - { /* [507] */ + { /* [509] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7762,7 +7792,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeGetDecompLceMask" #endif }, - { /* [508] */ + { /* [510] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x154u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7777,7 +7807,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdCeIsDecompLceEnabled" #endif }, - { /* [509] */ + { /* [511] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10118u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7792,7 +7822,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkCaps" #endif }, - { /* [510] */ + { /* [512] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7807,7 +7837,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkStatus" #endif }, - { /* [511] */ + { /* [513] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7822,7 +7852,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdBusGetNvlinkErrInfo" #endif }, - { /* [512] */ + { /* [514] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7837,7 +7867,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetNvlinkCounters" #endif }, - { /* [513] */ + { /* [515] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7852,7 +7882,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdClearNvlinkCounters" #endif }, - { /* [514] */ + { /* [516] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7867,7 +7897,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLinkFatalErrorCounts" #endif }, - { /* [515] */ + { /* [517] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7882,7 +7912,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetupEom" #endif }, - { /* [516] */ + { /* [518] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7897,7 +7927,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetPowerState" #endif }, - { /* [517] */ + { /* [519] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7912,7 +7942,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinGetLinkFomValues" #endif }, - { /* [518] */ + { /* [520] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7927,7 +7957,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetNvlinkEccErrors" #endif }, - { /* [519] */ + { /* [521] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7942,7 +7972,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkReadTpCounters" #endif }, - { /* [520] */ + { /* [522] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7957,7 +7987,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLpCounters" #endif }, - { /* [521] */ + { /* [523] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7972,7 +8002,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetLoopbackMode" #endif }, - { /* [522] */ + { /* [524] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -7987,7 +8017,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetRefreshCounters" #endif }, - { /* [523] */ + { /* [525] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8002,7 +8032,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkClearRefreshCounters" #endif }, - { /* [524] */ + { /* [526] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8017,7 +8047,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetSetNvswitchFlaAddr" #endif }, - { /* [525] */ + { /* [527] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10041u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8032,7 +8062,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSyncLinkMasksAndVbiosInfo" #endif }, - { /* [526] */ + { /* [528] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8047,7 +8077,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEnableLinks" #endif }, - { /* [527] */ + { /* [529] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8062,7 +8092,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkProcessInitDisabledLinks" #endif }, - { /* [528] */ + { /* [530] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8077,7 +8107,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkEomControl" #endif }, - { /* [529] */ + { /* [531] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8092,7 +8122,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetL1Threshold" #endif }, - { /* [530] */ + { /* [532] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8107,7 +8137,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetL1Threshold" #endif }, - { /* [531] */ + { /* [533] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10250u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8122,7 +8152,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkInbandSendData" #endif }, - { /* [532] */ + { /* [534] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8137,7 +8167,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkIsGpuDegraded" #endif }, - { /* [533] */ + { /* [535] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8152,7 +8182,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkDirectConnectCheck" #endif }, - { /* [534] */ + { /* [536] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8167,7 +8197,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPostFaultUp" #endif }, - { /* [535] */ + { /* [537] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8182,7 +8212,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetPortEvents" #endif }, - { /* [536] */ + { /* [538] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8197,7 +8227,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdIsNvlinkReducedConfig" #endif }, - { /* [537] */ + { /* [539] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8212,7 +8242,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPAOS" #endif }, - { /* [538] */ + { /* [540] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8227,7 +8257,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetNvlinkCountersV2" #endif }, - { /* [539] */ + { /* [541] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8242,7 +8272,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdClearNvlinkCountersV2" #endif }, - { /* [540] */ + { /* [542] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8257,7 +8287,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkClearLpCounters" #endif }, - { /* [541] */ + { /* [543] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8272,7 +8302,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPLTC" #endif }, - { /* [542] */ + { /* [544] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8287,7 +8317,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPLM" #endif }, - { /* [543] */ + { /* [545] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8302,7 +8332,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPSLC" #endif }, - { /* [544] */ + { /* [546] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8317,7 +8347,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMCAM" #endif }, - { /* [545] */ + { /* [547] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8332,7 +8362,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTECR" #endif }, - { /* [546] */ + { /* [548] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8347,7 +8377,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTEWE" #endif }, - { /* [547] */ + { /* [549] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8362,7 +8392,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTSDE" #endif }, - { /* [548] */ + { /* [550] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8377,7 +8407,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTCAP" #endif }, - { /* [549] */ + { /* [551] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8392,7 +8422,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPMTU" #endif }, - { /* [550] */ + { /* [552] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8407,7 +8437,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPMLP" #endif }, - { /* [551] */ + { /* [553] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8422,7 +8452,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessGHPKT" #endif }, - { /* [552] */ + { /* [554] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8437,7 +8467,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPDDR" #endif }, - { /* [553] */ + { /* [555] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8452,7 +8482,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPTT" #endif }, - { /* [554] */ + { /* [556] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8467,7 +8497,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPCNT" #endif }, - { /* [555] */ + { /* [557] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8482,7 +8512,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMGIR" #endif }, - { /* [556] */ + { /* [558] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8497,7 +8527,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPAOS" #endif }, - { /* [557] */ + { /* [559] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8512,7 +8542,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPHCR" #endif }, - { /* [558] */ + { /* [560] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8527,7 +8557,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessSLTP" #endif }, - { /* [559] */ + { /* [561] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8542,7 +8572,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPGUID" #endif }, - { /* [560] */ + { /* [562] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8557,7 +8587,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPRT" #endif }, - { /* [561] */ + { /* [563] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8572,7 +8602,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPTYS" #endif }, - { /* [562] */ + { /* [564] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8587,7 +8617,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessSLRG" #endif }, - { /* [563] */ + { /* [565] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8602,7 +8632,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPMAOS" #endif }, - { /* [564] */ + { /* [566] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8617,7 +8647,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPLR" #endif }, - { /* [565] */ + { /* [567] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8632,7 +8662,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetSupportedCounters" #endif }, - { /* [566] */ + { /* [568] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8647,7 +8677,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMORD" #endif }, - { /* [567] */ + { /* [569] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8662,7 +8692,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTRC_CAP" #endif }, - { /* [568] */ + { /* [570] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8677,7 +8707,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTRC_CONF" #endif }, - { /* [569] */ + { /* [571] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8692,7 +8722,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTRC_CTRL" #endif }, - { /* [570] */ + { /* [572] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8707,7 +8737,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTEIM" #endif }, - { /* [571] */ + { /* [573] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8722,7 +8752,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTIE" #endif }, - { /* [572] */ + { /* [574] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8737,7 +8767,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTIM" #endif }, - { /* [573] */ + { /* [575] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8752,7 +8782,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMPSCR" #endif }, - { /* [574] */ + { /* [576] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8767,7 +8797,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMTSR" #endif }, - { /* [575] */ + { /* [577] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8782,7 +8812,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPSLS" #endif }, - { /* [576] */ + { /* [578] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8797,7 +8827,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMLPC" #endif }, - { /* [577] */ + { /* [579] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8812,7 +8842,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPLIB" #endif }, - { /* [578] */ + { /* [580] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8827,7 +8857,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdSetNvlinkHwErrorInjectSettings" #endif }, - { /* [579] */ + { /* [581] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8842,7 +8872,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetNvlinkHwErrorInjectSettings" #endif }, - { /* [580] */ + { /* [582] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8857,7 +8887,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetPlatformInfo" #endif }, - { /* [581] */ + { /* [583] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8872,7 +8902,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetSupportedBWMode" #endif }, - { /* [582] */ + { /* [584] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x4u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8887,7 +8917,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetBWMode" #endif }, - { /* [583] */ + { /* [585] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8902,7 +8932,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetBWMode" #endif }, - { /* [584] */ + { /* [586] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8917,7 +8947,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetLocalDeviceInfo" #endif }, - { /* [585] */ + { /* [587] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8932,7 +8962,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkInjectSWError" #endif }, - { /* [586] */ + { /* [588] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8947,7 +8977,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPostLazyErrorRecovery" #endif }, - { /* [587] */ + { /* [589] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8962,7 +8992,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetNvleEncryptEnInfo" #endif }, - { /* [588] */ + { /* [590] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8977,7 +9007,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkUpdateNvleTopology" #endif }, - { /* [589] */ + { /* [591] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -8992,7 +9022,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetNvleLids" #endif }, - { /* [590] */ + { /* [592] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9007,7 +9037,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkConfigureL1Toggle" #endif }, - { /* [591] */ + { /* [593] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9022,7 +9052,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlNvlinkGetL1Toggle" #endif }, - { /* [592] */ + { /* [594] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9037,7 +9067,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessMCSR" #endif }, - { /* [593] */ + { /* [595] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9052,7 +9082,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetFirmwareVersionInfo" #endif }, - { /* [594] */ + { /* [596] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9067,7 +9097,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSetNvleEnabledState" #endif }, - { /* [595] */ + { /* [597] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9082,7 +9112,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPTASV2" #endif }, - { /* [596] */ + { /* [598] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9097,7 +9127,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessSLLM_5NM" #endif }, - { /* [597] */ + { /* [599] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9112,7 +9142,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccess" #endif }, - { /* [598] */ + { /* [600] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9127,7 +9157,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkPRMAccessPPRM" #endif }, - { /* [599] */ + { /* [601] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9142,7 +9172,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkSaveNodeHostname_IMPL" #endif }, - { /* [600] */ + { /* [602] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9157,7 +9187,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdNvlinkGetSavedNodeHostname_IMPL" #endif }, - { /* [601] */ + { /* [603] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9172,7 +9202,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetDmemUsage" #endif }, - { /* [602] */ + { /* [604] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9187,7 +9217,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetEngineArch" #endif }, - { /* [603] */ + { /* [605] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9202,7 +9232,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerQueueInfo" #endif }, - { /* [604] */ + { /* [606] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9217,7 +9247,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerControlGet" #endif }, - { /* [605] */ + { /* [607] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9232,7 +9262,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnUstreamerControlSet" #endif }, - { /* [606] */ + { /* [608] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9247,7 +9277,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetCtxBufferInfo" #endif }, - { /* [607] */ + { /* [609] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x8u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9262,7 +9292,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlcnGetCtxBufferSize" #endif }, - { /* [608] */ + { /* [610] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9277,7 +9307,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetClientExposedCounters" #endif }, - { /* [609] */ + { /* [611] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9292,7 +9322,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetVolatileCounts" #endif }, - { /* [610] */ + { /* [612] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9307,7 +9337,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetSramUniqueUncorrCounts" #endif }, - { /* [611] */ + { /* [613] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x44u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9322,7 +9352,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccInjectError" #endif }, - { /* [612] */ + { /* [614] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9337,7 +9367,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdEccGetRepairStatus" #endif }, - { /* [613] */ + { /* [615] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10008u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9352,7 +9382,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaRange" #endif }, - { /* [614] */ + { /* [616] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10244u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9367,7 +9397,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaSetupInstanceMemBlock" #endif }, - { /* [615] */ + { /* [617] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10004u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9382,7 +9412,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaGetRange" #endif }, - { /* [616] */ + { /* [618] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10108u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9397,7 +9427,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdFlaGetFabricMemStats" #endif }, - { /* [617] */ + { /* [619] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x40549u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9412,7 +9442,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGspGetFeatures" #endif }, - { /* [618] */ + { /* [620] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x48u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9427,7 +9457,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGspGetRmHeapStats" #endif }, - { /* [619] */ + { /* [621] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x204u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9442,7 +9472,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGpuGetVgpuHeapStats" #endif }, - { /* [620] */ + { /* [622] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9457,7 +9487,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdLibosGetHeapStats" #endif }, - { /* [621] */ + { /* [623] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10248u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9472,7 +9502,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGrmgrGetGrFsInfo" #endif }, - { /* [622] */ + { /* [624] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x3u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9487,7 +9517,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixGc6BlockerRefCnt" #endif }, - { /* [623] */ + { /* [625] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x9u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9502,7 +9532,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixAllowDisallowGcoff" #endif }, - { /* [624] */ + { /* [626] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9517,7 +9547,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixAudioDynamicPower" #endif }, - { /* [625] */ + { /* [627] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xbu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9532,7 +9562,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixVidmemPersistenceStatus" #endif }, - { /* [626] */ + { /* [628] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x7u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9547,7 +9577,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdOsUnixUpdateTgpStatus" #endif }, - { /* [627] */ + { /* [629] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9562,7 +9592,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalBootloadGspVgpuPluginTask" #endif }, - { /* [628] */ + { /* [630] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9577,7 +9607,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalShutdownGspVgpuPluginTask" #endif }, - { /* [629] */ + { /* [631] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9592,7 +9622,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalPgpuAddVgpuType" #endif }, - { /* [630] */ + { /* [632] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9607,7 +9637,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalEnumerateVgpuPerPgpu" #endif }, - { /* [631] */ + { /* [633] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9622,7 +9652,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalClearGuestVmInfo" #endif }, - { /* [632] */ + { /* [634] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9637,7 +9667,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetVgpuFbUsage" #endif }, - { /* [633] */ + { /* [635] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x1d0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9652,7 +9682,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuEncoderCapacity" #endif }, - { /* [634] */ + { /* [636] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9667,7 +9697,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalCleanupGspVgpuPluginResources" #endif }, - { /* [635] */ + { /* [637] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9682,7 +9712,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetPgpuFsEncoding" #endif }, - { /* [636] */ + { /* [638] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9697,7 +9727,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetPgpuMigrationSupport" #endif }, - { /* [637] */ + { /* [639] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9712,7 +9742,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuMgrConfig" #endif }, - { /* [638] */ + { /* [640] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9727,7 +9757,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalFreeStates" #endif }, - { /* [639] */ + { /* [641] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9742,7 +9772,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalGetFrameRateLimiterStatus" #endif }, - { /* [640] */ + { /* [642] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9757,7 +9787,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuHeterogeneousMode" #endif }, - { /* [641] */ + { /* [643] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9772,7 +9802,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdVgpuMgrInternalSetVgpuMigTimesliceMode" #endif }, - { /* [642] */ + { /* [644] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9787,7 +9817,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdGetAvailableHshubMask" #endif }, - { /* [643] */ + { /* [645] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x158u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9802,7 +9832,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlSetEcThrottleMode" #endif }, - { /* [644] */ + { /* [646] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0x10bu) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -9817,7 +9847,7 @@ static const struct NVOC_EXPORTED_METHOD_DEF __nvoc_exported_method_def_Subdevic /*func=*/ "subdeviceCtrlCmdRusdGetSupportedFeatures" #endif }, - { /* [645] */ + { /* [647] */ #if NVOC_EXPORTED_METHOD_DISABLED_BY_FLAG(0xc0u) /*pFunc=*/ (void (*)(void)) NULL, #else @@ -10142,7 +10172,7 @@ NV_STATUS __nvoc_up_thunk_Notifier_subdeviceGetOrAllocNotifShare(struct Subdevic const struct NVOC_EXPORT_INFO __nvoc_export_info__Subdevice = { - /*numEntries=*/ 646, + /*numEntries=*/ 648, /*pExportEntries=*/ __nvoc_exported_method_def_Subdevice }; diff --git a/src/nvidia/generated/g_subdevice_nvoc.h b/src/nvidia/generated/g_subdevice_nvoc.h index b163e8cf9..cbd8ff6d0 100644 --- a/src/nvidia/generated/g_subdevice_nvoc.h +++ b/src/nvidia/generated/g_subdevice_nvoc.h @@ -1823,6 +1823,26 @@ static inline NV_STATUS subdeviceCtrlCmdFbGetCarveoutRegionInfo(struct Subdevice #define subdeviceCtrlCmdFbGetCarveoutRegionInfo(pSubdevice, pParams) subdeviceCtrlCmdFbGetCarveoutRegionInfo_IMPL(pSubdevice, pParams) #endif // __nvoc_subdevice_h_disabled +NV_STATUS subdeviceCtrlCmdFbGetCpuCoherentRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS *pParams); +#ifdef __nvoc_subdevice_h_disabled +static inline NV_STATUS subdeviceCtrlCmdFbGetCpuCoherentRange(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS *pParams) { + NV_ASSERT_FAILED_PRECOMP("Subdevice was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else // __nvoc_subdevice_h_disabled +#define subdeviceCtrlCmdFbGetCpuCoherentRange(pSubdevice, pParams) subdeviceCtrlCmdFbGetCpuCoherentRange_IMPL(pSubdevice, pParams) +#endif // __nvoc_subdevice_h_disabled + +NV_STATUS subdeviceCtrlCmdFbGetWprRegionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS *pParams); +#ifdef __nvoc_subdevice_h_disabled +static inline NV_STATUS subdeviceCtrlCmdFbGetWprRegionInfo(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS *pParams) { + NV_ASSERT_FAILED_PRECOMP("Subdevice was disabled!"); + return NV_ERR_NOT_SUPPORTED; +} +#else // __nvoc_subdevice_h_disabled +#define subdeviceCtrlCmdFbGetWprRegionInfo(pSubdevice, pParams) subdeviceCtrlCmdFbGetWprRegionInfo_IMPL(pSubdevice, pParams) +#endif // __nvoc_subdevice_h_disabled + NV_STATUS subdeviceCtrlCmdFbGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pFbInfoParams); #ifdef __nvoc_subdevice_h_disabled static inline NV_STATUS subdeviceCtrlCmdFbGetInfoV2(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pFbInfoParams) { @@ -7280,6 +7300,10 @@ static inline NV_STATUS subdeviceCtrlCmdInternalMemmgrMemoryTransferWithGsp_46f6 NV_STATUS subdeviceCtrlCmdFbGetCarveoutRegionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CARVEOUT_REGION_INFO_PARAMS *pParams); +NV_STATUS subdeviceCtrlCmdFbGetCpuCoherentRange_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS *pParams); + +NV_STATUS subdeviceCtrlCmdFbGetWprRegionInfo_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_WPR_REGION_INFO_PARAMS *pParams); + NV_STATUS subdeviceCtrlCmdFbGetInfoV2_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_INFO_V2_PARAMS *pFbInfoParams); NV_STATUS subdeviceCtrlCmdFbGetCalibrationLockFailed_IMPL(struct Subdevice *pSubdevice, NV2080_CTRL_FB_GET_CALIBRATION_LOCK_FAILED_PARAMS *pGCLFParams); diff --git a/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c b/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c index 6cc75cb38..88fe0f6b6 100644 --- a/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c +++ b/src/nvidia/src/kernel/gpu/fsp/arch/hopper/kern_fsp_gh100.c @@ -971,7 +971,6 @@ kfspGetGspBootArgs return status; } - /*! * @brief Set up GSP-FMC and boot args for FSP command * @@ -1001,7 +1000,6 @@ kfspSetupGspImages NvP64 pVaKernel = NULL; NvP64 pPrivKernel = NULL; NvU64 flags = MEMDESC_FLAGS_NONE; - // // On systems with SEV enabled, the GSP-FMC image has to be accessible // to FSP (an unit inside GPU) and hence placed in unprotected sysmem diff --git a/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c b/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c index 3829b6fa3..6bf068407 100644 --- a/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c +++ b/src/nvidia/src/kernel/gpu/gpu_fabric_probe.c @@ -111,8 +111,8 @@ _gpuFabricProbeCheckResetRequired nvlink_inband_gpu_probe_rsp_msg_t *pProbeRespMsg ) { - if (REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY, pProbeRespMsg->probeRsp.fabricHealthMask) == - NVLINK_INBAND_FABRIC_HEALTH_MASK_CONNECTION_UNHEALTHY_TRUE_RESET_REQUIRED) + if (REF_VAL(NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION, pProbeRespMsg->probeRsp.fabricHealthMask) == + NVLINK_INBAND_FABRIC_HEALTH_MASK_INCORRECT_CONFIGURATION_GPU_STATE_INVALID) { pGpu->setProperty(pGpu, PDB_PROP_GPU_RECOVERY_SQUASH_XID154, NV_TRUE); gpuMarkDeviceForDrainAndReset(pGpu); diff --git a/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c b/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c index 54566851d..2ddf52797 100644 --- a/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c +++ b/src/nvidia/src/kernel/gpu/gsp/arch/turing/kernel_gsp_tu102.c @@ -54,6 +54,8 @@ #include "g_all_dcl_pb.h" #include "lib/protobuf/prb.h" +static NvBool _kgspIsProcessorSuspended(OBJGPU *pGpu, void *pVoid); + void kgspConfigureFalcon_TU102 ( @@ -544,8 +546,9 @@ kgspBootstrap_TU102 RM_RISCV_UCODE_DESC *pRiscvDesc = pKernelGsp->pGspRmBootUcodeDesc; kflcnRegWrite_HAL(pGpu, pKernelFalcon, NV_PFALCON_FALCON_OS, pRiscvDesc->appVersion); - // Ensure the CPU is started - if (kflcnIsRiscvActive_HAL(pGpu, pKernelFalcon)) + // Ensure the CPU has started + // Note: In rare cases, GSP-RM may make enough progress by this point to suspend waiting for Kernel RM. + if (kflcnIsRiscvActive_HAL(pGpu, pKernelFalcon) || _kgspIsProcessorSuspended(pGpu, pKernelGsp)) { NV_PRINTF(LEVEL_INFO, "GSP ucode loaded and RISCV started.\n"); } diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/heap.c b/src/nvidia/src/kernel/gpu/mem_mgr/heap.c index 6b93a035d..f7b0fe653 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/heap.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/heap.c @@ -2769,16 +2769,6 @@ NV_STATUS heapAllocHint_IMPL alignment = memUtilsLeastCommonAlignment(alignment, hostPageSize); } - if (memmgrAllocGetAddrSpace(pMemoryManager, pAllocHint->flags, *pAllocHint->pAttr) == ADDR_FBMEM) - { - if (alignment >= pHeap->total) - { - status = NV_ERR_INVALID_ARGUMENT; - NV_PRINTF(LEVEL_ERROR, "heapAllocHint failed due to alignmend >= pHeap->total\n"); - goto exit; - } - } - *pAllocHint->pHeight = pFbAllocInfo->height; pAllocHint->pad = pFbAllocInfo->pad; diff --git a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c index 77b46b8cb..ff97d1943 100644 --- a/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c +++ b/src/nvidia/src/kernel/gpu/mem_mgr/mem_mgr_ctrl.c @@ -768,3 +768,18 @@ subdeviceCtrlCmdGbGetSemaphoreSurfaceLayout_IMPL return NV_OK; } +NV_STATUS subdeviceCtrlCmdFbGetCpuCoherentRange_IMPL +( + Subdevice *pSubdevice, + NV2080_CTRL_FB_GET_CPU_COHERENT_RANGE_PARAMS *pParams +) +{ + OBJSYS *pSys = SYS_GET_INSTANCE(); + OBJGPU *pGpu = GPU_RES_GET_GPU(pSubdevice); + KernelMemorySystem *pKernelMemorySystem = GPU_GET_KERNEL_MEMORY_SYSTEM(pGpu); + + NV_CHECK_OR_RETURN(LEVEL_INFO, pSys->getProperty(pSys, PDB_PROP_SYS_ENABLE_RM_TEST_ONLY_CODE), NV_ERR_NOT_SUPPORTED); + + return kmemsysGetCpuCoherentFbRange_IMPL(pGpu, pKernelMemorySystem, &pParams->coherentCpuFbBase, &pParams->coherentCpuFbEnd); +} + diff --git a/src/nvidia/src/kernel/gpu/mem_sys/arch/blackwell/kern_mem_sys_gb100.c b/src/nvidia/src/kernel/gpu/mem_sys/arch/blackwell/kern_mem_sys_gb100.c index 2ec0db08f..33985e874 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/arch/blackwell/kern_mem_sys_gb100.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/arch/blackwell/kern_mem_sys_gb100.c @@ -31,6 +31,10 @@ #include "published/blackwell/gb100/dev_top.h" #include "published/blackwell/gb100/dev_hshub_base.h" +#include "published/blackwell/gb100/dev_fb.h" +#include "published/blackwell/gb100/dev_gc6_island.h" +#include "published/blackwell/gb100/dev_gc6_island_addendum.h" + /*! * @brief Function used to return the HSHUB0 IoAperture * Used by sysmem flush buffer code, since it gets called @@ -233,3 +237,52 @@ kmemsysAssertFbAckTimeoutPending_GB100 return NV_FALSE; #endif } + +/*! + * @brief Extract FB offset from LOCAL_MEMORY_RANGE register value + */ +static inline NvU64 _kmemsysGetFbOffsetFromLocalMemoryRangeRegVal_GB100(NvU32 regVal) +{ + NvU32 lowerRangeMag = DRF_VAL(_PFB, _PRI_MMU_LOCAL_MEMORY_RANGE, _LOWER_MAG, regVal); + NvU32 lowerRangeScale = DRF_VAL(_PFB, _PRI_MMU_LOCAL_MEMORY_RANGE, _LOWER_SCALE, regVal); + return ((NvU64) lowerRangeMag << (lowerRangeScale + 20)); +} + +/*! + * @brief Read HDM top address from VBIOS (or 0 if not supported) + */ +NV_STATUS +kmemsysReadHdmTopFromVbios_GB100 +( + OBJGPU *pGpu, + KernelMemorySystem *pKernelMemorySystem, + NvU64 *pHdmTopOut +) +{ + /* + * On GB100, some VBIOS versions emulate an HDM top by setting + * LOCAL_MEMORY_RANGE to a smaller value after reset, then restoring + * the true LOCAL_MEMORY_RANGE value after FSP boot commands. VBIOS then + * stores the emulated HDM top value in a secure scratch register. + * + * Compare secure scratch vs. local memory range to determine if emulated + * HDM top is present. + */ + + NvU64 localMemoryRange = _kmemsysGetFbOffsetFromLocalMemoryRangeRegVal_GB100( + GPU_REG_RD32(pGpu, NV_PFB_PRI_MMU_LOCAL_MEMORY_RANGE)); + + NvU64 scratchHdmTop = _kmemsysGetFbOffsetFromLocalMemoryRangeRegVal_GB100( + GPU_REG_RD32(pGpu, NV_PGC6_BSI_SECURE_SCRATCH_MMU_LOCAL_MEMORY_RANGE)); + + if (localMemoryRange != scratchHdmTop) + { + *pHdmTopOut = scratchHdmTop; + } + else + { + *pHdmTopOut = 0; + } + + return NV_OK; +} \ No newline at end of file diff --git a/src/nvidia/src/kernel/gpu/mem_sys/arch/volta/kern_mem_sys_gv100.c b/src/nvidia/src/kernel/gpu/mem_sys/arch/volta/kern_mem_sys_gv100.c index 3e44aa2ad..065d16ebc 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/arch/volta/kern_mem_sys_gv100.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/arch/volta/kern_mem_sys_gv100.c @@ -38,6 +38,7 @@ * @param[in] pGpu OBJGPU pointer * @param[in] pKernelMemorySystem pointer to the kernel side KernelMemorySystem instance. * @param[in] physAddr Physical Address of FB memory + * @param[in] physSize Size of FB memory onlined to the OS * @param[in] numaNodeId NUMA node id where FB memory is added to the * kernel * @@ -49,13 +50,14 @@ kmemsysGetFbNumaInfo_GV100 OBJGPU *pGpu, KernelMemorySystem *pKernelMemorySystem, NvU64 *physAddr, + NvU64 *physSize, NvU64 *rsvdPhysAddr, NvS32 *numaNodeId ) { NV_STATUS status; - status = osGetFbNumaInfo(pGpu, physAddr, rsvdPhysAddr, numaNodeId); + status = osGetFbNumaInfo(pGpu, physAddr, physSize, rsvdPhysAddr, numaNodeId); if (status == NV_OK) { if (pKernelMemorySystem->coherentCpuFbBaseOverride.bEnabled) @@ -65,8 +67,8 @@ kmemsysGetFbNumaInfo_GV100 *physAddr); } - NV_PRINTF(LEVEL_INFO, "NUMA FB Physical address: 0x%llx Node ID: 0x%x\n", - *physAddr, *numaNodeId); + NV_PRINTF(LEVEL_INFO, "NUMA FB Physical address: 0x%llx Size: 0x%llxsNode ID: 0x%x\n", + *physAddr, *physSize, *numaNodeId); } return status; diff --git a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c index 88c777319..ccb8649f6 100644 --- a/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c +++ b/src/nvidia/src/kernel/gpu/mem_sys/kern_mem_sys.c @@ -896,7 +896,7 @@ kmemsysSetupCoherentCpuLink_IMPL KernelBus *pKernelBus = GPU_GET_KERNEL_BUS(pGpu); MemoryManager *pMemoryManager = GPU_GET_MEMORY_MANAGER(pGpu); NvU64 numaOnlineSize = 0; - NvU64 fbSize = (pMemoryManager->Ram.fbTotalMemSizeMb << 20); + NvU64 coherentCpuFbSize = 0; NvU32 data32; NvS32 numaNodeId = NV0000_CTRL_NO_NUMA_NODE; NvU64 memblockSize = 0; @@ -917,9 +917,28 @@ kmemsysSetupCoherentCpuLink_IMPL NV_ASSERT_OK_OR_RETURN(kmemsysGetFbNumaInfo_HAL(pGpu, pKernelMemorySystem, &pKernelMemorySystem->coherentCpuFbBase, + &coherentCpuFbSize, &pKernelMemorySystem->coherentRsvdFbBase, &numaNodeId)); + if (coherentCpuFbSize == 0) + { + // + // For passthrough, OS layer may be unable to provide the CPU-coherent size of FB (as it + // won't be available in ACPI DSD), so try to determine it from VBIOS scratch. + // + if (IS_PASSTHRU(pGpu)) + { + NV_ASSERT_OK_OR_RETURN(kmemsysReadHdmTopFromVbios_HAL(pGpu, pKernelMemorySystem, &coherentCpuFbSize)); + } + + // Otherwise, if we are still unable to determine the CPU-coherent size, assume whole FB is CPU-coherent + if (coherentCpuFbSize == 0) + { + coherentCpuFbSize = (pMemoryManager->Ram.fbTotalMemSizeMb << 20); + } + } + if ((osReadRegistryDword(pGpu, NV_REG_STR_OVERRIDE_GPU_NUMA_NODE_ID, &data32)) == NV_OK) { @@ -955,7 +974,7 @@ kmemsysSetupCoherentCpuLink_IMPL return NV_ERR_INVALID_STATE; } - pKernelMemorySystem->coherentCpuFbEnd = pKernelMemorySystem->coherentCpuFbBase + fbSize; + pKernelMemorySystem->coherentCpuFbEnd = pKernelMemorySystem->coherentCpuFbBase + coherentCpuFbSize; NV_ASSERT_OK_OR_RETURN(osNumaMemblockSize(&memblockSize)); @@ -984,7 +1003,7 @@ kmemsysSetupCoherentCpuLink_IMPL // one can access it. If FB size itself is memblock size unaligned(because // of CBC and row remapper deductions), then the memory wastage is unavoidable. // - numaOnlineSize = KMEMSYS_FB_NUMA_ONLINE_SIZE(fbSize - totalRsvdBytes, memblockSize); + numaOnlineSize = KMEMSYS_FB_NUMA_ONLINE_SIZE(coherentCpuFbSize - totalRsvdBytes, memblockSize); if (IS_PASSTHRU(pGpu) && pKernelMemorySystem->bBug3656943WAR) { @@ -1000,12 +1019,12 @@ kmemsysSetupCoherentCpuLink_IMPL // wasted being part of non onlined region which can't be avoided // per the design. // - numaOnlineSize = KMEMSYS_FB_NUMA_ONLINE_SIZE(fbSize - totalRsvdBytes, 512 * 1024 * 1024); + numaOnlineSize = KMEMSYS_FB_NUMA_ONLINE_SIZE(coherentCpuFbSize - totalRsvdBytes, 512 * 1024 * 1024); } NV_PRINTF(LEVEL_INFO, - "fbSize: 0x%llx NUMA reserved memory size: 0x%llx online memory size: 0x%llx\n", - fbSize, totalRsvdBytes, numaOnlineSize); + "coherentCpuFbSize: 0x%llx NUMA reserved memory size: 0x%llx online memory size: 0x%llx\n", + coherentCpuFbSize, totalRsvdBytes, numaOnlineSize); if (osNumaOnliningEnabled(pGpu->pOsGpuInfo)) { @@ -1161,4 +1180,38 @@ kmemsysPostHeapCreate_KERNEL return NV_OK; } +NV_STATUS +kmemsysGetCpuCoherentFbRange_IMPL +( + OBJGPU *pGpu, + KernelMemorySystem *pKernelMemorySystem, + NvU64 *pCpuCoherentFbBase, + NvU64 *pCpuCoherentFbEnd +) +{ + if ((pCpuCoherentFbBase == NULL) || (pCpuCoherentFbEnd == NULL)) + { + return NV_ERR_INVALID_ARGUMENT; + } + + // CPU-coherent FB memory only applicable to Self-Hosted platforms + if (!gpuIsSelfHosted(pGpu)) + { + return NV_ERR_NOT_SUPPORTED; + } + + if (pKernelMemorySystem->coherentCpuFbBase != 0) + { + *pCpuCoherentFbBase = pKernelMemorySystem->coherentCpuFbBase; + *pCpuCoherentFbEnd = pKernelMemorySystem->coherentCpuFbEnd; + } + else + { + *pCpuCoherentFbBase = 0; + *pCpuCoherentFbEnd = 0; + } + + return NV_OK; +} + diff --git a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c index 3967086d3..51b67a74c 100644 --- a/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c +++ b/src/nvidia/src/kernel/gpu/subdevice/subdevice_ctrl_gpu_kernel.c @@ -3424,12 +3424,6 @@ subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL healthMask |= FLD_SET_DRF(2080, _CTRL_GPU_FABRIC_HEALTH_MASK, _CONNECTION_UNHEALTHY, _FALSE, healthMask); } - else if (FLD_TEST_DRF(LINK, _INBAND_FABRIC_HEALTH_MASK, _CONNECTION_UNHEALTHY, - _TRUE_RESET_REQUIRED, mask)) - { - healthMask |= FLD_SET_DRF(2080, _CTRL_GPU_FABRIC_HEALTH_MASK, - _CONNECTION_UNHEALTHY, _TRUE, healthMask); - } else if (FLD_TEST_DRF(LINK, _INBAND_FABRIC_HEALTH_MASK, _CONNECTION_UNHEALTHY, _NOT_SUPPORTED, mask)) { @@ -3480,6 +3474,12 @@ subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL healthMask |= FLD_SET_DRF(2080, _CTRL_GPU_FABRIC_HEALTH_MASK, _INCORRECT_CONFIGURATION, _INVALID_LOCATION, healthMask); } + else if (FLD_TEST_DRF(LINK, _INBAND_FABRIC_HEALTH_MASK, _INCORRECT_CONFIGURATION, + _GPU_STATE_INVALID, mask)) + { + healthMask |= FLD_SET_DRF(2080, _CTRL_GPU_FABRIC_HEALTH_MASK, + _INCORRECT_CONFIGURATION, _GPU_STATE_INVALID, healthMask); + } else if (FLD_TEST_DRF(LINK, _INBAND_FABRIC_HEALTH_MASK, _INCORRECT_CONFIGURATION, _NOT_SUPPORTED, mask)) { @@ -3487,6 +3487,26 @@ subdeviceCtrlCmdGetGpuFabricProbeInfo_IMPL _INCORRECT_CONFIGURATION, _NOT_SUPPORTED, healthMask); } + // Fabric Partition Assigned + if (FLD_TEST_DRF(LINK, _INBAND_FABRIC_HEALTH_MASK, _PARTITION_ASSIGNED, _TRUE, + mask)) + { + healthMask |= FLD_SET_DRF(2080, _CTRL_GPU_FABRIC_HEALTH_MASK, + _PARTITION_ASSIGNED, _TRUE, healthMask); + } + else if (FLD_TEST_DRF(LINK, _INBAND_FABRIC_HEALTH_MASK, _PARTITION_ASSIGNED, + _FALSE, mask)) + { + healthMask |= FLD_SET_DRF(2080, _CTRL_GPU_FABRIC_HEALTH_MASK, + _PARTITION_ASSIGNED, _FALSE, healthMask); + } + else if (FLD_TEST_DRF(LINK, _INBAND_FABRIC_HEALTH_MASK, _PARTITION_ASSIGNED, + _NOT_SUPPORTED, mask)) + { + healthMask |= FLD_SET_DRF(2080, _CTRL_GPU_FABRIC_HEALTH_MASK, + _PARTITION_ASSIGNED, _NOT_SUPPORTED, healthMask); + } + if (gpuGetChipArch(pGpu) >= GPU_ARCHITECTURE_BLACKWELL_GB1XX) { pRmApi = rmapiGetInterface(RMAPI_GPU_LOCK_INTERNAL); diff --git a/src/nvidia/src/kernel/os/os_init.c b/src/nvidia/src/kernel/os/os_init.c index c442f8c80..07818969f 100644 --- a/src/nvidia/src/kernel/os/os_init.c +++ b/src/nvidia/src/kernel/os/os_init.c @@ -219,9 +219,8 @@ void vgpuDevWriteReg032( OBJSYS *pSys = SYS_GET_INSTANCE(); OBJHYPERVISOR *pHypervisor = SYS_GET_HYPERVISOR(pSys); - if(!pGpu || - !pHypervisor || !pHypervisor->bDetected || !pHypervisor->bIsHVMGuest || - !GPU_GET_KERNEL_BIF(pGpu)) + if (!pGpu || !GPU_GET_KERNEL_BIF(pGpu) || + (!IS_VIRTUAL(pGpu) && !(pHypervisor && pHypervisor->bDetected && pHypervisor->bIsHVMGuest))) { *vgpuHandled = NV_FALSE; return; @@ -299,7 +298,6 @@ NvU32 vgpuDevReadReg032( OBJSYS *pSys = SYS_GET_INSTANCE(); OBJHYPERVISOR *pHypervisor = SYS_GET_HYPERVISOR(pSys); - if (!pGpu || !GPU_GET_KERNEL_BIF(pGpu) || (!IS_VIRTUAL(pGpu) && !(pHypervisor && pHypervisor->bDetected && pHypervisor->bIsHVMGuest))) { diff --git a/src/nvidia/src/kernel/rmapi/client.c b/src/nvidia/src/kernel/rmapi/client.c index 20c382d2c..a98c75fc9 100644 --- a/src/nvidia/src/kernel/rmapi/client.c +++ b/src/nvidia/src/kernel/rmapi/client.c @@ -90,6 +90,7 @@ rmclientConstruct_IMPL pClient->pSecurityToken = NULL; pClient->pOSInfo = pSecInfo->clientOSInfo; pClient->imexChannel = -1; + pClient->clientGfid = GPU_GFID_PF; pClient->cachedPrivilege = pSecInfo->privLevel; diff --git a/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c b/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c index ab3a108f9..56e9805d2 100644 --- a/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c +++ b/src/nvidia/src/kernel/rmapi/nv_gpu_ops.c @@ -8877,7 +8877,7 @@ NV_STATUS nvGpuOpsSetPageDirectory(struct gpuAddressSpace *vaSpace, // RM clients must not unmap this address, and instead rely on RM to unmap // it when nvGpuOpsUnsetPageDirectory() is called. // - *dmaAddress = memdescGetPtePhysAddr(vaspaceGetPageDirBase(pVAS, pGpu), AT_GPU, 0); + *dmaAddress = memdescGetPhysAddr(vaspaceGetPageDirBase(pVAS, pGpu), AT_GPU, 0); if (vaspaceIsExternallyOwned(pVAS)) { diff --git a/src/nvidia/src/kernel/vgpu/rpc.c b/src/nvidia/src/kernel/vgpu/rpc.c index e19b1efc6..f00c038ef 100644 --- a/src/nvidia/src/kernel/vgpu/rpc.c +++ b/src/nvidia/src/kernel/vgpu/rpc.c @@ -588,7 +588,6 @@ static NV_STATUS _setupGspHibernateShrdBuff(OBJGPU *pGpu, OBJVGPU *pVGpu) NV_STATUS status; NvU32 memFlags = 0; - portDbgPrintf("Alloc shared hibernation buffer for vGPU GSP\n"); status = _allocRpcMemDesc(pGpu, VGPU_GSP_HIBERNATION_SHRD_BUFF_SIZE, NV_MEMORY_CONTIGUOUS, diff --git a/version.mk b/version.mk index 805ff1b70..070d6d691 100644 --- a/version.mk +++ b/version.mk @@ -1,5 +1,5 @@ -NVIDIA_VERSION = 580.94.13 -NVIDIA_NVID_VERSION = 580.94.13 +NVIDIA_VERSION = 580.94.16 +NVIDIA_NVID_VERSION = 580.94.16 NVIDIA_NVID_EXTRA = # This file.