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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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570.133.07
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@@ -2347,6 +2347,7 @@ DSC_GeneratePPS
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in->bits_per_component = pModesetInfo->bitsPerComponent;
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in->linebuf_depth = MIN((pDscInfo->sinkCaps.lineBufferBitDepth), (pDscInfo->gpuCaps.lineBufferBitDepth));
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in->block_pred_enable = pDscInfo->sinkCaps.bBlockPrediction;
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in->multi_tile = (pDscInfo->gpuCaps.maxNumHztSlices > 4U) ? 1 : 0;
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switch (pModesetInfo->colorFormat)
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{
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@@ -2526,8 +2527,9 @@ DSC_GeneratePPS
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// because of architectural limitation we can't use bits_per_pixel
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// more than 16.
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//
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if ((pModesetInfo->bDualMode || (pDscInfo->gpuCaps.maxNumHztSlices > 4U)) &&
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(in->bits_per_pixel > 256 /*bits_per_pixel = 16*/))
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if ((pModesetInfo->bDualMode ||
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(in->multi_tile && (!pWARData || (pWARData && !pWARData->dpData.bDisableDscMaxBppLimit))))
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&& (in->bits_per_pixel > 256 /*bits_per_pixel = 16*/))
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{
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ret = NVT_STATUS_INVALID_BPP;
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goto done;
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@@ -2547,8 +2549,9 @@ DSC_GeneratePPS
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// because of architectural limitation we can't use bits_per_pixel more
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// than 16. So forcing it to 16.
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//
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if ((pModesetInfo->bDualMode || (pDscInfo->gpuCaps.maxNumHztSlices > 4U)) &&
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(in->bits_per_pixel > 256 /*bits_per_pixel = 16*/))
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if ((pModesetInfo->bDualMode ||
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(in->multi_tile && (!pWARData || (pWARData && !pWARData->dpData.bDisableDscMaxBppLimit))))
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&& (in->bits_per_pixel > 256 /*bits_per_pixel = 16*/))
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{
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// ERROR - DSC Dual Mode, because of architectural limitation we can't use bits_per_pixel more than 16.
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// ERROR - Forcing it to 16.
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@@ -2590,7 +2593,6 @@ DSC_GeneratePPS
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in->pixel_clkMHz = (NvU32)(pModesetInfo->pixelClockHz / 1000000L);
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in->dual_mode = pModesetInfo->bDualMode;
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in->drop_mode = pModesetInfo->bDropMode;
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in->multi_tile = (pDscInfo->gpuCaps.maxNumHztSlices > 4U) ? 1 : 0;
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in->slice_count_mask = pDscInfo->sinkCaps.sliceCountSupportedMask;
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in->peak_throughput_mode0 = pDscInfo->sinkCaps.peakThroughputMode0;
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in->peak_throughput_mode1 = pDscInfo->sinkCaps.peakThroughputMode1;
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@@ -254,6 +254,7 @@ typedef struct
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DSC_DP_MODE dpMode;
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NvU32 hBlank;
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NvBool bIsEdp;
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NvBool bDisableDscMaxBppLimit;
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NvBool bIs128b132bChannelCoding;
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}dpData;
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} WAR_DATA;
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